1/* 2 * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder registers 3 * 4 * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org) 5 * This code is placed under the terms of the GNU General Public License v2 6 */ 7 8#define TVP5150_VD_IN_SRC_SEL_1 0x00 /* Video input source selection #1 */ 9#define TVP5150_ANAL_CHL_CTL 0x01 /* Analog channel controls */ 10#define TVP5150_OP_MODE_CTL 0x02 /* Operation mode controls */ 11#define TVP5150_MISC_CTL 0x03 /* Miscellaneous controls */ 12#define TVP5150_AUTOSW_MSK 0x04 /* Autoswitch mask: TVP5150A / TVP5150AM */ 13 14/* Reserved 05h */ 15 16#define TVP5150_COLOR_KIL_THSH_CTL 0x06 /* Color killer threshold control */ 17#define TVP5150_LUMA_PROC_CTL_1 0x07 /* Luminance processing control #1 */ 18#define TVP5150_LUMA_PROC_CTL_2 0x08 /* Luminance processing control #2 */ 19#define TVP5150_BRIGHT_CTL 0x09 /* Brightness control */ 20#define TVP5150_SATURATION_CTL 0x0a /* Color saturation control */ 21#define TVP5150_HUE_CTL 0x0b /* Hue control */ 22#define TVP5150_CONTRAST_CTL 0x0c /* Contrast control */ 23#define TVP5150_DATA_RATE_SEL 0x0d /* Outputs and data rates select */ 24#define TVP5150_LUMA_PROC_CTL_3 0x0e /* Luminance processing control #3 */ 25#define TVP5150_CONF_SHARED_PIN 0x0f /* Configuration shared pins */ 26 27/* Reserved 10h */ 28 29#define TVP5150_ACT_VD_CROP_ST_MSB 0x11 /* Active video cropping start MSB */ 30#define TVP5150_ACT_VD_CROP_ST_LSB 0x12 /* Active video cropping start LSB */ 31#define TVP5150_ACT_VD_CROP_STP_MSB 0x13 /* Active video cropping stop MSB */ 32#define TVP5150_ACT_VD_CROP_STP_LSB 0x14 /* Active video cropping stop LSB */ 33#define TVP5150_GENLOCK 0x15 /* Genlock/RTC */ 34#define TVP5150_HORIZ_SYNC_START 0x16 /* Horizontal sync start */ 35 36/* Reserved 17h */ 37 38#define TVP5150_VERT_BLANKING_START 0x18 /* Vertical blanking start */ 39#define TVP5150_VERT_BLANKING_STOP 0x19 /* Vertical blanking stop */ 40#define TVP5150_CHROMA_PROC_CTL_1 0x1a /* Chrominance processing control #1 */ 41#define TVP5150_CHROMA_PROC_CTL_2 0x1b /* Chrominance processing control #2 */ 42#define TVP5150_INT_RESET_REG_B 0x1c /* Interrupt reset register B */ 43#define TVP5150_INT_ENABLE_REG_B 0x1d /* Interrupt enable register B */ 44#define TVP5150_INTT_CONFIG_REG_B 0x1e /* Interrupt configuration register B */ 45 46/* Reserved 1Fh-27h */ 47 48#define TVP5150_VIDEO_STD 0x28 /* Video standard */ 49 50/* Reserved 29h-2bh */ 51 52#define TVP5150_CB_GAIN_FACT 0x2c /* Cb gain factor */ 53#define TVP5150_CR_GAIN_FACTOR 0x2d /* Cr gain factor */ 54#define TVP5150_MACROVISION_ON_CTR 0x2e /* Macrovision on counter */ 55#define TVP5150_MACROVISION_OFF_CTR 0x2f /* Macrovision off counter */ 56#define TVP5150_REV_SELECT 0x30 /* revision select (TVP5150AM1 only) */ 57 58/* Reserved 31h-7Fh */ 59 60#define TVP5150_MSB_DEV_ID 0x80 /* MSB of device ID */ 61#define TVP5150_LSB_DEV_ID 0x81 /* LSB of device ID */ 62#define TVP5150_ROM_MAJOR_VER 0x82 /* ROM major version */ 63#define TVP5150_ROM_MINOR_VER 0x83 /* ROM minor version */ 64#define TVP5150_VERT_LN_COUNT_MSB 0x84 /* Vertical line count MSB */ 65#define TVP5150_VERT_LN_COUNT_LSB 0x85 /* Vertical line count LSB */ 66#define TVP5150_INT_STATUS_REG_B 0x86 /* Interrupt status register B */ 67#define TVP5150_INT_ACTIVE_REG_B 0x87 /* Interrupt active register B */ 68#define TVP5150_STATUS_REG_1 0x88 /* Status register #1 */ 69#define TVP5150_STATUS_REG_2 0x89 /* Status register #2 */ 70#define TVP5150_STATUS_REG_3 0x8a /* Status register #3 */ 71#define TVP5150_STATUS_REG_4 0x8b /* Status register #4 */ 72#define TVP5150_STATUS_REG_5 0x8c /* Status register #5 */ 73/* Reserved 8Dh-8Fh */ 74 /* Closed caption data registers */ 75#define TVP5150_CC_DATA_INI 0x90 76#define TVP5150_CC_DATA_END 0x93 77 78 /* WSS data registers */ 79#define TVP5150_WSS_DATA_INI 0x94 80#define TVP5150_WSS_DATA_END 0x99 81 82/* VPS data registers */ 83#define TVP5150_VPS_DATA_INI 0x9a 84#define TVP5150_VPS_DATA_END 0xa6 85 86/* VITC data registers */ 87#define TVP5150_VITC_DATA_INI 0xa7 88#define TVP5150_VITC_DATA_END 0xaf 89 90#define TVP5150_VBI_FIFO_READ_DATA 0xb0 /* VBI FIFO read data */ 91 92/* Teletext filter 1 */ 93#define TVP5150_TELETEXT_FIL1_INI 0xb1 94#define TVP5150_TELETEXT_FIL1_END 0xb5 95 96/* Teletext filter 2 */ 97#define TVP5150_TELETEXT_FIL2_INI 0xb6 98#define TVP5150_TELETEXT_FIL2_END 0xba 99 100#define TVP5150_TELETEXT_FIL_ENA 0xbb /* Teletext filter enable */ 101/* Reserved BCh-BFh */ 102#define TVP5150_INT_STATUS_REG_A 0xc0 /* Interrupt status register A */ 103#define TVP5150_INT_ENABLE_REG_A 0xc1 /* Interrupt enable register A */ 104#define TVP5150_INT_CONF 0xc2 /* Interrupt configuration */ 105#define TVP5150_VDP_CONF_RAM_DATA 0xc3 /* VDP configuration RAM data */ 106#define TVP5150_CONF_RAM_ADDR_LOW 0xc4 /* Configuration RAM address low byte */ 107#define TVP5150_CONF_RAM_ADDR_HIGH 0xc5 /* Configuration RAM address high byte */ 108#define TVP5150_VDP_STATUS_REG 0xc6 /* VDP status register */ 109#define TVP5150_FIFO_WORD_COUNT 0xc7 /* FIFO word count */ 110#define TVP5150_FIFO_INT_THRESHOLD 0xc8 /* FIFO interrupt threshold */ 111#define TVP5150_FIFO_RESET 0xc9 /* FIFO reset */ 112#define TVP5150_LINE_NUMBER_INT 0xca /* Line number interrupt */ 113#define TVP5150_PIX_ALIGN_REG_LOW 0xcb /* Pixel alignment register low byte */ 114#define TVP5150_PIX_ALIGN_REG_HIGH 0xcc /* Pixel alignment register high byte */ 115#define TVP5150_FIFO_OUT_CTRL 0xcd /* FIFO output control */ 116/* Reserved CEh */ 117#define TVP5150_FULL_FIELD_ENA 0xcf /* Full field enable 1 */ 118 119/* Line mode registers */ 120#define TVP5150_LINE_MODE_INI 0xd0 121#define TVP5150_LINE_MODE_END 0xfb 122 123#define TVP5150_FULL_FIELD_MODE_REG 0xfc /* Full field mode register */ 124/* Reserved FDh-FFh */ 125