1/* 2 * A V4L2 driver for OmniVision OV7670 cameras. 3 * 4 * Copyright 2006 One Laptop Per Child Association, Inc. Written 5 * by Jonathan Corbet with substantial inspiration from Mark 6 * McClelland's ovcamchip code. 7 * 8 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> 9 * 10 * This file may be distributed under the terms of the GNU General 11 * Public License, version 2. 12 */ 13#include <linux/init.h> 14#include <linux/module.h> 15#include <linux/moduleparam.h> 16#include <linux/slab.h> 17#include <linux/delay.h> 18#include <linux/videodev.h> 19#include <media/v4l2-common.h> 20#include <media/v4l2-chip-ident.h> 21#include <linux/i2c.h> 22 23 24MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>"); 25MODULE_DESCRIPTION("A low-level driver for OmniVision ov7670 sensors"); 26MODULE_LICENSE("GPL"); 27 28/* 29 * Basic window sizes. These probably belong somewhere more globally 30 * useful. 31 */ 32#define VGA_WIDTH 640 33#define VGA_HEIGHT 480 34#define QVGA_WIDTH 320 35#define QVGA_HEIGHT 240 36#define CIF_WIDTH 352 37#define CIF_HEIGHT 288 38#define QCIF_WIDTH 176 39#define QCIF_HEIGHT 144 40 41/* 42 * Our nominal (default) frame rate. 43 */ 44#define OV7670_FRAME_RATE 30 45 46/* 47 * The 7670 sits on i2c with ID 0x42 48 */ 49#define OV7670_I2C_ADDR 0x42 50 51/* Registers */ 52#define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */ 53#define REG_BLUE 0x01 /* blue gain */ 54#define REG_RED 0x02 /* red gain */ 55#define REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */ 56#define REG_COM1 0x04 /* Control 1 */ 57#define COM1_CCIR656 0x40 /* CCIR656 enable */ 58#define REG_BAVE 0x05 /* U/B Average level */ 59#define REG_GbAVE 0x06 /* Y/Gb Average level */ 60#define REG_AECHH 0x07 /* AEC MS 5 bits */ 61#define REG_RAVE 0x08 /* V/R Average level */ 62#define REG_COM2 0x09 /* Control 2 */ 63#define COM2_SSLEEP 0x10 /* Soft sleep mode */ 64#define REG_PID 0x0a /* Product ID MSB */ 65#define REG_VER 0x0b /* Product ID LSB */ 66#define REG_COM3 0x0c /* Control 3 */ 67#define COM3_SWAP 0x40 /* Byte swap */ 68#define COM3_SCALEEN 0x08 /* Enable scaling */ 69#define COM3_DCWEN 0x04 /* Enable downsamp/crop/window */ 70#define REG_COM4 0x0d /* Control 4 */ 71#define REG_COM5 0x0e /* All "reserved" */ 72#define REG_COM6 0x0f /* Control 6 */ 73#define REG_AECH 0x10 /* More bits of AEC value */ 74#define REG_CLKRC 0x11 /* Clocl control */ 75#define CLK_EXT 0x40 /* Use external clock directly */ 76#define CLK_SCALE 0x3f /* Mask for internal clock scale */ 77#define REG_COM7 0x12 /* Control 7 */ 78#define COM7_RESET 0x80 /* Register reset */ 79#define COM7_FMT_MASK 0x38 80#define COM7_FMT_VGA 0x00 81#define COM7_FMT_CIF 0x20 /* CIF format */ 82#define COM7_FMT_QVGA 0x10 /* QVGA format */ 83#define COM7_FMT_QCIF 0x08 /* QCIF format */ 84#define COM7_RGB 0x04 /* bits 0 and 2 - RGB format */ 85#define COM7_YUV 0x00 /* YUV */ 86#define COM7_BAYER 0x01 /* Bayer format */ 87#define COM7_PBAYER 0x05 /* "Processed bayer" */ 88#define REG_COM8 0x13 /* Control 8 */ 89#define COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */ 90#define COM8_AECSTEP 0x40 /* Unlimited AEC step size */ 91#define COM8_BFILT 0x20 /* Band filter enable */ 92#define COM8_AGC 0x04 /* Auto gain enable */ 93#define COM8_AWB 0x02 /* White balance enable */ 94#define COM8_AEC 0x01 /* Auto exposure enable */ 95#define REG_COM9 0x14 /* Control 9 - gain ceiling */ 96#define REG_COM10 0x15 /* Control 10 */ 97#define COM10_HSYNC 0x40 /* HSYNC instead of HREF */ 98#define COM10_PCLK_HB 0x20 /* Suppress PCLK on horiz blank */ 99#define COM10_HREF_REV 0x08 /* Reverse HREF */ 100#define COM10_VS_LEAD 0x04 /* VSYNC on clock leading edge */ 101#define COM10_VS_NEG 0x02 /* VSYNC negative */ 102#define COM10_HS_NEG 0x01 /* HSYNC negative */ 103#define REG_HSTART 0x17 /* Horiz start high bits */ 104#define REG_HSTOP 0x18 /* Horiz stop high bits */ 105#define REG_VSTART 0x19 /* Vert start high bits */ 106#define REG_VSTOP 0x1a /* Vert stop high bits */ 107#define REG_PSHFT 0x1b /* Pixel delay after HREF */ 108#define REG_MIDH 0x1c /* Manuf. ID high */ 109#define REG_MIDL 0x1d /* Manuf. ID low */ 110#define REG_MVFP 0x1e /* Mirror / vflip */ 111#define MVFP_MIRROR 0x20 /* Mirror image */ 112#define MVFP_FLIP 0x10 /* Vertical flip */ 113 114#define REG_AEW 0x24 /* AGC upper limit */ 115#define REG_AEB 0x25 /* AGC lower limit */ 116#define REG_VPT 0x26 /* AGC/AEC fast mode op region */ 117#define REG_HSYST 0x30 /* HSYNC rising edge delay */ 118#define REG_HSYEN 0x31 /* HSYNC falling edge delay */ 119#define REG_HREF 0x32 /* HREF pieces */ 120#define REG_TSLB 0x3a /* lots of stuff */ 121#define TSLB_YLAST 0x04 /* UYVY or VYUY - see com13 */ 122#define REG_COM11 0x3b /* Control 11 */ 123#define COM11_NIGHT 0x80 /* NIght mode enable */ 124#define COM11_NMFR 0x60 /* Two bit NM frame rate */ 125#define COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */ 126#define COM11_50HZ 0x08 /* Manual 50Hz select */ 127#define COM11_EXP 0x02 128#define REG_COM12 0x3c /* Control 12 */ 129#define COM12_HREF 0x80 /* HREF always */ 130#define REG_COM13 0x3d /* Control 13 */ 131#define COM13_GAMMA 0x80 /* Gamma enable */ 132#define COM13_UVSAT 0x40 /* UV saturation auto adjustment */ 133#define COM13_UVSWAP 0x01 /* V before U - w/TSLB */ 134#define REG_COM14 0x3e /* Control 14 */ 135#define COM14_DCWEN 0x10 /* DCW/PCLK-scale enable */ 136#define REG_EDGE 0x3f /* Edge enhancement factor */ 137#define REG_COM15 0x40 /* Control 15 */ 138#define COM15_R10F0 0x00 /* Data range 10 to F0 */ 139#define COM15_R01FE 0x80 /* 01 to FE */ 140#define COM15_R00FF 0xc0 /* 00 to FF */ 141#define COM15_RGB565 0x10 /* RGB565 output */ 142#define COM15_RGB555 0x30 /* RGB555 output */ 143#define REG_COM16 0x41 /* Control 16 */ 144#define COM16_AWBGAIN 0x08 /* AWB gain enable */ 145#define REG_COM17 0x42 /* Control 17 */ 146#define COM17_AECWIN 0xc0 /* AEC window - must match COM4 */ 147#define COM17_CBAR 0x08 /* DSP Color bar */ 148 149/* 150 * This matrix defines how the colors are generated, must be 151 * tweaked to adjust hue and saturation. 152 * 153 * Order: v-red, v-green, v-blue, u-red, u-green, u-blue 154 * 155 * They are nine-bit signed quantities, with the sign bit 156 * stored in 0x58. Sign for v-red is bit 0, and up from there. 157 */ 158#define REG_CMATRIX_BASE 0x4f 159#define CMATRIX_LEN 6 160#define REG_CMATRIX_SIGN 0x58 161 162 163#define REG_BRIGHT 0x55 /* Brightness */ 164#define REG_CONTRAS 0x56 /* Contrast control */ 165 166#define REG_GFIX 0x69 /* Fix gain control */ 167 168#define REG_REG76 0x76 /* OV's name */ 169#define R76_BLKPCOR 0x80 /* Black pixel correction enable */ 170#define R76_WHTPCOR 0x40 /* White pixel correction enable */ 171 172#define REG_RGB444 0x8c /* RGB 444 control */ 173#define R444_ENABLE 0x02 /* Turn on RGB444, overrides 5x5 */ 174#define R444_RGBX 0x01 /* Empty nibble at end */ 175 176#define REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */ 177#define REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */ 178 179#define REG_BD50MAX 0xa5 /* 50hz banding step limit */ 180#define REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */ 181#define REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */ 182#define REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */ 183#define REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */ 184#define REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */ 185#define REG_BD60MAX 0xab /* 60hz banding step limit */ 186 187 188/* 189 * Information we maintain about a known sensor. 190 */ 191struct ov7670_format_struct; /* coming later */ 192struct ov7670_info { 193 struct ov7670_format_struct *fmt; /* Current format */ 194 unsigned char sat; /* Saturation value */ 195 int hue; /* Hue value */ 196}; 197 198 199 200 201/* 202 * The default register settings, as obtained from OmniVision. There 203 * is really no making sense of most of these - lots of "reserved" values 204 * and such. 205 * 206 * These settings give VGA YUYV. 207 */ 208 209struct regval_list { 210 unsigned char reg_num; 211 unsigned char value; 212}; 213 214static struct regval_list ov7670_default_regs[] = { 215 { REG_COM7, COM7_RESET }, 216/* 217 * Clock scale: 3 = 15fps 218 * 2 = 20fps 219 * 1 = 30fps 220 */ 221 { REG_CLKRC, 0x1 }, /* OV: clock scale (30 fps) */ 222 { REG_TSLB, 0x04 }, /* OV */ 223 { REG_COM7, 0 }, /* VGA */ 224 /* 225 * Set the hardware window. These values from OV don't entirely 226 * make sense - hstop is less than hstart. But they work... 227 */ 228 { REG_HSTART, 0x13 }, { REG_HSTOP, 0x01 }, 229 { REG_HREF, 0xb6 }, { REG_VSTART, 0x02 }, 230 { REG_VSTOP, 0x7a }, { REG_VREF, 0x0a }, 231 232 { REG_COM3, 0 }, { REG_COM14, 0 }, 233 /* Mystery scaling numbers */ 234 { 0x70, 0x3a }, { 0x71, 0x35 }, 235 { 0x72, 0x11 }, { 0x73, 0xf0 }, 236 { 0xa2, 0x02 }, { REG_COM10, 0x0 }, 237 238 /* Gamma curve values */ 239 { 0x7a, 0x20 }, { 0x7b, 0x10 }, 240 { 0x7c, 0x1e }, { 0x7d, 0x35 }, 241 { 0x7e, 0x5a }, { 0x7f, 0x69 }, 242 { 0x80, 0x76 }, { 0x81, 0x80 }, 243 { 0x82, 0x88 }, { 0x83, 0x8f }, 244 { 0x84, 0x96 }, { 0x85, 0xa3 }, 245 { 0x86, 0xaf }, { 0x87, 0xc4 }, 246 { 0x88, 0xd7 }, { 0x89, 0xe8 }, 247 248 /* AGC and AEC parameters. Note we start by disabling those features, 249 then turn them only after tweaking the values. */ 250 { REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT }, 251 { REG_GAIN, 0 }, { REG_AECH, 0 }, 252 { REG_COM4, 0x40 }, /* magic reserved bit */ 253 { REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */ 254 { REG_BD50MAX, 0x05 }, { REG_BD60MAX, 0x07 }, 255 { REG_AEW, 0x95 }, { REG_AEB, 0x33 }, 256 { REG_VPT, 0xe3 }, { REG_HAECC1, 0x78 }, 257 { REG_HAECC2, 0x68 }, { 0xa1, 0x03 }, /* magic */ 258 { REG_HAECC3, 0xd8 }, { REG_HAECC4, 0xd8 }, 259 { REG_HAECC5, 0xf0 }, { REG_HAECC6, 0x90 }, 260 { REG_HAECC7, 0x94 }, 261 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC }, 262 263 /* Almost all of these are magic "reserved" values. */ 264 { REG_COM5, 0x61 }, { REG_COM6, 0x4b }, 265 { 0x16, 0x02 }, { REG_MVFP, 0x07 }, 266 { 0x21, 0x02 }, { 0x22, 0x91 }, 267 { 0x29, 0x07 }, { 0x33, 0x0b }, 268 { 0x35, 0x0b }, { 0x37, 0x1d }, 269 { 0x38, 0x71 }, { 0x39, 0x2a }, 270 { REG_COM12, 0x78 }, { 0x4d, 0x40 }, 271 { 0x4e, 0x20 }, { REG_GFIX, 0 }, 272 { 0x6b, 0x4a }, { 0x74, 0x10 }, 273 { 0x8d, 0x4f }, { 0x8e, 0 }, 274 { 0x8f, 0 }, { 0x90, 0 }, 275 { 0x91, 0 }, { 0x96, 0 }, 276 { 0x9a, 0 }, { 0xb0, 0x84 }, 277 { 0xb1, 0x0c }, { 0xb2, 0x0e }, 278 { 0xb3, 0x82 }, { 0xb8, 0x0a }, 279 280 /* More reserved magic, some of which tweaks white balance */ 281 { 0x43, 0x0a }, { 0x44, 0xf0 }, 282 { 0x45, 0x34 }, { 0x46, 0x58 }, 283 { 0x47, 0x28 }, { 0x48, 0x3a }, 284 { 0x59, 0x88 }, { 0x5a, 0x88 }, 285 { 0x5b, 0x44 }, { 0x5c, 0x67 }, 286 { 0x5d, 0x49 }, { 0x5e, 0x0e }, 287 { 0x6c, 0x0a }, { 0x6d, 0x55 }, 288 { 0x6e, 0x11 }, { 0x6f, 0x9f }, /* "9e for advance AWB" */ 289 { 0x6a, 0x40 }, { REG_BLUE, 0x40 }, 290 { REG_RED, 0x60 }, 291 { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC|COM8_AWB }, 292 293 /* Matrix coefficients */ 294 { 0x4f, 0x80 }, { 0x50, 0x80 }, 295 { 0x51, 0 }, { 0x52, 0x22 }, 296 { 0x53, 0x5e }, { 0x54, 0x80 }, 297 { 0x58, 0x9e }, 298 299 { REG_COM16, COM16_AWBGAIN }, { REG_EDGE, 0 }, 300 { 0x75, 0x05 }, { 0x76, 0xe1 }, 301 { 0x4c, 0 }, { 0x77, 0x01 }, 302 { REG_COM13, 0xc3 }, { 0x4b, 0x09 }, 303 { 0xc9, 0x60 }, { REG_COM16, 0x38 }, 304 { 0x56, 0x40 }, 305 306 { 0x34, 0x11 }, { REG_COM11, COM11_EXP|COM11_HZAUTO }, 307 { 0xa4, 0x88 }, { 0x96, 0 }, 308 { 0x97, 0x30 }, { 0x98, 0x20 }, 309 { 0x99, 0x30 }, { 0x9a, 0x84 }, 310 { 0x9b, 0x29 }, { 0x9c, 0x03 }, 311 { 0x9d, 0x4c }, { 0x9e, 0x3f }, 312 { 0x78, 0x04 }, 313 314 /* Extra-weird stuff. Some sort of multiplexor register */ 315 { 0x79, 0x01 }, { 0xc8, 0xf0 }, 316 { 0x79, 0x0f }, { 0xc8, 0x00 }, 317 { 0x79, 0x10 }, { 0xc8, 0x7e }, 318 { 0x79, 0x0a }, { 0xc8, 0x80 }, 319 { 0x79, 0x0b }, { 0xc8, 0x01 }, 320 { 0x79, 0x0c }, { 0xc8, 0x0f }, 321 { 0x79, 0x0d }, { 0xc8, 0x20 }, 322 { 0x79, 0x09 }, { 0xc8, 0x80 }, 323 { 0x79, 0x02 }, { 0xc8, 0xc0 }, 324 { 0x79, 0x03 }, { 0xc8, 0x40 }, 325 { 0x79, 0x05 }, { 0xc8, 0x30 }, 326 { 0x79, 0x26 }, 327 328 { 0xff, 0xff }, /* END MARKER */ 329}; 330 331 332/* 333 * Here we'll try to encapsulate the changes for just the output 334 * video format. 335 * 336 * RGB656 and YUV422 come from OV; RGB444 is homebrewed. 337 * 338 * IMPORTANT RULE: the first entry must be for COM7, see ov7670_s_fmt for why. 339 */ 340 341 342static struct regval_list ov7670_fmt_yuv422[] = { 343 { REG_COM7, 0x0 }, /* Selects YUV mode */ 344 { REG_RGB444, 0 }, /* No RGB444 please */ 345 { REG_COM1, 0 }, 346 { REG_COM15, COM15_R00FF }, 347 { REG_COM9, 0x18 }, /* 4x gain ceiling; 0x8 is reserved bit */ 348 { 0x4f, 0x80 }, /* "matrix coefficient 1" */ 349 { 0x50, 0x80 }, /* "matrix coefficient 2" */ 350 { 0x51, 0 }, /* vb */ 351 { 0x52, 0x22 }, /* "matrix coefficient 4" */ 352 { 0x53, 0x5e }, /* "matrix coefficient 5" */ 353 { 0x54, 0x80 }, /* "matrix coefficient 6" */ 354 { REG_COM13, COM13_GAMMA|COM13_UVSAT }, 355 { 0xff, 0xff }, 356}; 357 358static struct regval_list ov7670_fmt_rgb565[] = { 359 { REG_COM7, COM7_RGB }, /* Selects RGB mode */ 360 { REG_RGB444, 0 }, /* No RGB444 please */ 361 { REG_COM1, 0x0 }, 362 { REG_COM15, COM15_RGB565 }, 363 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */ 364 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */ 365 { 0x50, 0xb3 }, /* "matrix coefficient 2" */ 366 { 0x51, 0 }, /* vb */ 367 { 0x52, 0x3d }, /* "matrix coefficient 4" */ 368 { 0x53, 0xa7 }, /* "matrix coefficient 5" */ 369 { 0x54, 0xe4 }, /* "matrix coefficient 6" */ 370 { REG_COM13, COM13_GAMMA|COM13_UVSAT }, 371 { 0xff, 0xff }, 372}; 373 374static struct regval_list ov7670_fmt_rgb444[] = { 375 { REG_COM7, COM7_RGB }, /* Selects RGB mode */ 376 { REG_RGB444, R444_ENABLE }, /* Enable xxxxrrrr ggggbbbb */ 377 { REG_COM1, 0x40 }, /* Magic reserved bit */ 378 { REG_COM15, COM15_R01FE|COM15_RGB565 }, /* Data range needed? */ 379 { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */ 380 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */ 381 { 0x50, 0xb3 }, /* "matrix coefficient 2" */ 382 { 0x51, 0 }, /* vb */ 383 { 0x52, 0x3d }, /* "matrix coefficient 4" */ 384 { 0x53, 0xa7 }, /* "matrix coefficient 5" */ 385 { 0x54, 0xe4 }, /* "matrix coefficient 6" */ 386 { REG_COM13, COM13_GAMMA|COM13_UVSAT|0x2 }, /* Magic rsvd bit */ 387 { 0xff, 0xff }, 388}; 389 390static struct regval_list ov7670_fmt_raw[] = { 391 { REG_COM7, COM7_BAYER }, 392 { REG_COM13, 0x08 }, /* No gamma, magic rsvd bit */ 393 { REG_COM16, 0x3d }, /* Edge enhancement, denoise */ 394 { REG_REG76, 0xe1 }, /* Pix correction, magic rsvd */ 395 { 0xff, 0xff }, 396}; 397 398 399 400/* 401 * Low-level register I/O. 402 */ 403 404static int ov7670_read(struct i2c_client *c, unsigned char reg, 405 unsigned char *value) 406{ 407 int ret; 408 409 ret = i2c_smbus_read_byte_data(c, reg); 410 if (ret >= 0) 411 *value = (unsigned char) ret; 412 return ret; 413} 414 415 416static int ov7670_write(struct i2c_client *c, unsigned char reg, 417 unsigned char value) 418{ 419 return i2c_smbus_write_byte_data(c, reg, value); 420} 421 422 423/* 424 * Write a list of register settings; ff/ff stops the process. 425 */ 426static int ov7670_write_array(struct i2c_client *c, struct regval_list *vals) 427{ 428 while (vals->reg_num != 0xff || vals->value != 0xff) { 429 int ret = ov7670_write(c, vals->reg_num, vals->value); 430 if (ret < 0) 431 return ret; 432 vals++; 433 } 434 return 0; 435} 436 437 438/* 439 * Stuff that knows about the sensor. 440 */ 441static void ov7670_reset(struct i2c_client *client) 442{ 443 ov7670_write(client, REG_COM7, COM7_RESET); 444 msleep(1); 445} 446 447 448static int ov7670_init(struct i2c_client *client) 449{ 450 return ov7670_write_array(client, ov7670_default_regs); 451} 452 453 454 455static int ov7670_detect(struct i2c_client *client) 456{ 457 unsigned char v; 458 int ret; 459 460 ret = ov7670_init(client); 461 if (ret < 0) 462 return ret; 463 ret = ov7670_read(client, REG_MIDH, &v); 464 if (ret < 0) 465 return ret; 466 if (v != 0x7f) /* OV manuf. id. */ 467 return -ENODEV; 468 ret = ov7670_read(client, REG_MIDL, &v); 469 if (ret < 0) 470 return ret; 471 if (v != 0xa2) 472 return -ENODEV; 473 /* 474 * OK, we know we have an OmniVision chip...but which one? 475 */ 476 ret = ov7670_read(client, REG_PID, &v); 477 if (ret < 0) 478 return ret; 479 if (v != 0x76) /* PID + VER = 0x76 / 0x73 */ 480 return -ENODEV; 481 ret = ov7670_read(client, REG_VER, &v); 482 if (ret < 0) 483 return ret; 484 if (v != 0x73) /* PID + VER = 0x76 / 0x73 */ 485 return -ENODEV; 486 return 0; 487} 488 489 490/* 491 * Store information about the video data format. The color matrix 492 * is deeply tied into the format, so keep the relevant values here. 493 * The magic matrix nubmers come from OmniVision. 494 */ 495static struct ov7670_format_struct { 496 __u8 *desc; 497 __u32 pixelformat; 498 struct regval_list *regs; 499 int cmatrix[CMATRIX_LEN]; 500 int bpp; /* Bytes per pixel */ 501} ov7670_formats[] = { 502 { 503 .desc = "YUYV 4:2:2", 504 .pixelformat = V4L2_PIX_FMT_YUYV, 505 .regs = ov7670_fmt_yuv422, 506 .cmatrix = { 128, -128, 0, -34, -94, 128 }, 507 .bpp = 2, 508 }, 509 { 510 .desc = "RGB 444", 511 .pixelformat = V4L2_PIX_FMT_RGB444, 512 .regs = ov7670_fmt_rgb444, 513 .cmatrix = { 179, -179, 0, -61, -176, 228 }, 514 .bpp = 2, 515 }, 516 { 517 .desc = "RGB 565", 518 .pixelformat = V4L2_PIX_FMT_RGB565, 519 .regs = ov7670_fmt_rgb565, 520 .cmatrix = { 179, -179, 0, -61, -176, 228 }, 521 .bpp = 2, 522 }, 523 { 524 .desc = "Raw RGB Bayer", 525 .pixelformat = V4L2_PIX_FMT_SBGGR8, 526 .regs = ov7670_fmt_raw, 527 .cmatrix = { 0, 0, 0, 0, 0, 0 }, 528 .bpp = 1 529 }, 530}; 531#define N_OV7670_FMTS ARRAY_SIZE(ov7670_formats) 532 533 534/* 535 * Then there is the issue of window sizes. Try to capture the info here. 536 */ 537 538/* 539 * QCIF mode is done (by OV) in a very strange way - it actually looks like 540 * VGA with weird scaling options - they do *not* use the canned QCIF mode 541 * which is allegedly provided by the sensor. So here's the weird register 542 * settings. 543 */ 544static struct regval_list ov7670_qcif_regs[] = { 545 { REG_COM3, COM3_SCALEEN|COM3_DCWEN }, 546 { REG_COM3, COM3_DCWEN }, 547 { REG_COM14, COM14_DCWEN | 0x01}, 548 { 0x73, 0xf1 }, 549 { 0xa2, 0x52 }, 550 { 0x7b, 0x1c }, 551 { 0x7c, 0x28 }, 552 { 0x7d, 0x3c }, 553 { 0x7f, 0x69 }, 554 { REG_COM9, 0x38 }, 555 { 0xa1, 0x0b }, 556 { 0x74, 0x19 }, 557 { 0x9a, 0x80 }, 558 { 0x43, 0x14 }, 559 { REG_COM13, 0xc0 }, 560 { 0xff, 0xff }, 561}; 562 563static struct ov7670_win_size { 564 int width; 565 int height; 566 unsigned char com7_bit; 567 int hstart; /* Start/stop values for the camera. Note */ 568 int hstop; /* that they do not always make complete */ 569 int vstart; /* sense to humans, but evidently the sensor */ 570 int vstop; /* will do the right thing... */ 571 struct regval_list *regs; /* Regs to tweak */ 572/* h/vref stuff */ 573} ov7670_win_sizes[] = { 574 /* VGA */ 575 { 576 .width = VGA_WIDTH, 577 .height = VGA_HEIGHT, 578 .com7_bit = COM7_FMT_VGA, 579 .hstart = 158, /* These values from */ 580 .hstop = 14, /* Omnivision */ 581 .vstart = 10, 582 .vstop = 490, 583 .regs = NULL, 584 }, 585 /* CIF */ 586 { 587 .width = CIF_WIDTH, 588 .height = CIF_HEIGHT, 589 .com7_bit = COM7_FMT_CIF, 590 .hstart = 170, /* Empirically determined */ 591 .hstop = 90, 592 .vstart = 14, 593 .vstop = 494, 594 .regs = NULL, 595 }, 596 /* QVGA */ 597 { 598 .width = QVGA_WIDTH, 599 .height = QVGA_HEIGHT, 600 .com7_bit = COM7_FMT_QVGA, 601 .hstart = 164, /* Empirically determined */ 602 .hstop = 20, 603 .vstart = 14, 604 .vstop = 494, 605 .regs = NULL, 606 }, 607 /* QCIF */ 608 { 609 .width = QCIF_WIDTH, 610 .height = QCIF_HEIGHT, 611 .com7_bit = COM7_FMT_VGA, /* see comment above */ 612 .hstart = 456, /* Empirically determined */ 613 .hstop = 24, 614 .vstart = 14, 615 .vstop = 494, 616 .regs = ov7670_qcif_regs, 617 }, 618}; 619 620#define N_WIN_SIZES (sizeof(ov7670_win_sizes)/sizeof(ov7670_win_sizes[0])) 621 622 623/* 624 * Store a set of start/stop values into the camera. 625 */ 626static int ov7670_set_hw(struct i2c_client *client, int hstart, int hstop, 627 int vstart, int vstop) 628{ 629 int ret; 630 unsigned char v; 631/* 632 * Horizontal: 11 bits, top 8 live in hstart and hstop. Bottom 3 of 633 * hstart are in href[2:0], bottom 3 of hstop in href[5:3]. There is 634 * a mystery "edge offset" value in the top two bits of href. 635 */ 636 ret = ov7670_write(client, REG_HSTART, (hstart >> 3) & 0xff); 637 ret += ov7670_write(client, REG_HSTOP, (hstop >> 3) & 0xff); 638 ret += ov7670_read(client, REG_HREF, &v); 639 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x7); 640 msleep(10); 641 ret += ov7670_write(client, REG_HREF, v); 642/* 643 * Vertical: similar arrangement, but only 10 bits. 644 */ 645 ret += ov7670_write(client, REG_VSTART, (vstart >> 2) & 0xff); 646 ret += ov7670_write(client, REG_VSTOP, (vstop >> 2) & 0xff); 647 ret += ov7670_read(client, REG_VREF, &v); 648 v = (v & 0xf0) | ((vstop & 0x3) << 2) | (vstart & 0x3); 649 msleep(10); 650 ret += ov7670_write(client, REG_VREF, v); 651 return ret; 652} 653 654 655static int ov7670_enum_fmt(struct i2c_client *c, struct v4l2_fmtdesc *fmt) 656{ 657 struct ov7670_format_struct *ofmt; 658 659 if (fmt->index >= N_OV7670_FMTS) 660 return -EINVAL; 661 662 ofmt = ov7670_formats + fmt->index; 663 fmt->flags = 0; 664 strcpy(fmt->description, ofmt->desc); 665 fmt->pixelformat = ofmt->pixelformat; 666 return 0; 667} 668 669 670static int ov7670_try_fmt(struct i2c_client *c, struct v4l2_format *fmt, 671 struct ov7670_format_struct **ret_fmt, 672 struct ov7670_win_size **ret_wsize) 673{ 674 int index; 675 struct ov7670_win_size *wsize; 676 struct v4l2_pix_format *pix = &fmt->fmt.pix; 677 678 for (index = 0; index < N_OV7670_FMTS; index++) 679 if (ov7670_formats[index].pixelformat == pix->pixelformat) 680 break; 681 if (index >= N_OV7670_FMTS) 682 return -EINVAL; 683 if (ret_fmt != NULL) 684 *ret_fmt = ov7670_formats + index; 685 /* 686 * Fields: the OV devices claim to be progressive. 687 */ 688 if (pix->field == V4L2_FIELD_ANY) 689 pix->field = V4L2_FIELD_NONE; 690 else if (pix->field != V4L2_FIELD_NONE) 691 return -EINVAL; 692 /* 693 * Round requested image size down to the nearest 694 * we support, but not below the smallest. 695 */ 696 for (wsize = ov7670_win_sizes; wsize < ov7670_win_sizes + N_WIN_SIZES; 697 wsize++) 698 if (pix->width >= wsize->width && pix->height >= wsize->height) 699 break; 700 if (wsize >= ov7670_win_sizes + N_WIN_SIZES) 701 wsize--; /* Take the smallest one */ 702 if (ret_wsize != NULL) 703 *ret_wsize = wsize; 704 /* 705 * Note the size we'll actually handle. 706 */ 707 pix->width = wsize->width; 708 pix->height = wsize->height; 709 pix->bytesperline = pix->width*ov7670_formats[index].bpp; 710 pix->sizeimage = pix->height*pix->bytesperline; 711 return 0; 712} 713 714/* 715 * Set a format. 716 */ 717static int ov7670_s_fmt(struct i2c_client *c, struct v4l2_format *fmt) 718{ 719 int ret; 720 struct ov7670_format_struct *ovfmt; 721 struct ov7670_win_size *wsize; 722 struct ov7670_info *info = i2c_get_clientdata(c); 723 unsigned char com7, clkrc; 724 725 ret = ov7670_try_fmt(c, fmt, &ovfmt, &wsize); 726 if (ret) 727 return ret; 728 /* 729 * HACK: if we're running rgb565 we need to grab then rewrite 730 * CLKRC. If we're *not*, however, then rewriting clkrc hoses 731 * the colors. 732 */ 733 if (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565) { 734 ret = ov7670_read(c, REG_CLKRC, &clkrc); 735 if (ret) 736 return ret; 737 } 738 /* 739 * COM7 is a pain in the ass, it doesn't like to be read then 740 * quickly written afterward. But we have everything we need 741 * to set it absolutely here, as long as the format-specific 742 * register sets list it first. 743 */ 744 com7 = ovfmt->regs[0].value; 745 com7 |= wsize->com7_bit; 746 ov7670_write(c, REG_COM7, com7); 747 /* 748 * Now write the rest of the array. Also store start/stops 749 */ 750 ov7670_write_array(c, ovfmt->regs + 1); 751 ov7670_set_hw(c, wsize->hstart, wsize->hstop, wsize->vstart, 752 wsize->vstop); 753 ret = 0; 754 if (wsize->regs) 755 ret = ov7670_write_array(c, wsize->regs); 756 info->fmt = ovfmt; 757 758 if (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565 && ret == 0) 759 ret = ov7670_write(c, REG_CLKRC, clkrc); 760 return ret; 761} 762 763/* 764 * Implement G/S_PARM. There is a "high quality" mode we could try 765 * to do someday; for now, we just do the frame rate tweak. 766 */ 767static int ov7670_g_parm(struct i2c_client *c, struct v4l2_streamparm *parms) 768{ 769 struct v4l2_captureparm *cp = &parms->parm.capture; 770 unsigned char clkrc; 771 int ret; 772 773 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 774 return -EINVAL; 775 ret = ov7670_read(c, REG_CLKRC, &clkrc); 776 if (ret < 0) 777 return ret; 778 memset(cp, 0, sizeof(struct v4l2_captureparm)); 779 cp->capability = V4L2_CAP_TIMEPERFRAME; 780 cp->timeperframe.numerator = 1; 781 cp->timeperframe.denominator = OV7670_FRAME_RATE; 782 if ((clkrc & CLK_EXT) == 0 && (clkrc & CLK_SCALE) > 1) 783 cp->timeperframe.denominator /= (clkrc & CLK_SCALE); 784 return 0; 785} 786 787static int ov7670_s_parm(struct i2c_client *c, struct v4l2_streamparm *parms) 788{ 789 struct v4l2_captureparm *cp = &parms->parm.capture; 790 struct v4l2_fract *tpf = &cp->timeperframe; 791 unsigned char clkrc; 792 int ret, div; 793 794 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 795 return -EINVAL; 796 if (cp->extendedmode != 0) 797 return -EINVAL; 798 /* 799 * CLKRC has a reserved bit, so let's preserve it. 800 */ 801 ret = ov7670_read(c, REG_CLKRC, &clkrc); 802 if (ret < 0) 803 return ret; 804 if (tpf->numerator == 0 || tpf->denominator == 0) 805 div = 1; /* Reset to full rate */ 806 else 807 div = (tpf->numerator*OV7670_FRAME_RATE)/tpf->denominator; 808 if (div == 0) 809 div = 1; 810 else if (div > CLK_SCALE) 811 div = CLK_SCALE; 812 clkrc = (clkrc & 0x80) | div; 813 tpf->numerator = 1; 814 tpf->denominator = OV7670_FRAME_RATE/div; 815 return ov7670_write(c, REG_CLKRC, clkrc); 816} 817 818 819 820/* 821 * Code for dealing with controls. 822 */ 823 824 825 826 827 828static int ov7670_store_cmatrix(struct i2c_client *client, 829 int matrix[CMATRIX_LEN]) 830{ 831 int i, ret; 832 unsigned char signbits; 833 834 /* 835 * Weird crap seems to exist in the upper part of 836 * the sign bits register, so let's preserve it. 837 */ 838 ret = ov7670_read(client, REG_CMATRIX_SIGN, &signbits); 839 signbits &= 0xc0; 840 841 for (i = 0; i < CMATRIX_LEN; i++) { 842 unsigned char raw; 843 844 if (matrix[i] < 0) { 845 signbits |= (1 << i); 846 if (matrix[i] < -255) 847 raw = 0xff; 848 else 849 raw = (-1 * matrix[i]) & 0xff; 850 } 851 else { 852 if (matrix[i] > 255) 853 raw = 0xff; 854 else 855 raw = matrix[i] & 0xff; 856 } 857 ret += ov7670_write(client, REG_CMATRIX_BASE + i, raw); 858 } 859 ret += ov7670_write(client, REG_CMATRIX_SIGN, signbits); 860 return ret; 861} 862 863 864/* 865 * Hue also requires messing with the color matrix. It also requires 866 * trig functions, which tend not to be well supported in the kernel. 867 * So here is a simple table of sine values, 0-90 degrees, in steps 868 * of five degrees. Values are multiplied by 1000. 869 * 870 * The following naive approximate trig functions require an argument 871 * carefully limited to -180 <= theta <= 180. 872 */ 873#define SIN_STEP 5 874static const int ov7670_sin_table[] = { 875 0, 87, 173, 258, 342, 422, 876 499, 573, 642, 707, 766, 819, 877 866, 906, 939, 965, 984, 996, 878 1000 879}; 880 881static int ov7670_sine(int theta) 882{ 883 int chs = 1; 884 int sine; 885 886 if (theta < 0) { 887 theta = -theta; 888 chs = -1; 889 } 890 if (theta <= 90) 891 sine = ov7670_sin_table[theta/SIN_STEP]; 892 else { 893 theta -= 90; 894 sine = 1000 - ov7670_sin_table[theta/SIN_STEP]; 895 } 896 return sine*chs; 897} 898 899static int ov7670_cosine(int theta) 900{ 901 theta = 90 - theta; 902 if (theta > 180) 903 theta -= 360; 904 else if (theta < -180) 905 theta += 360; 906 return ov7670_sine(theta); 907} 908 909 910 911 912static void ov7670_calc_cmatrix(struct ov7670_info *info, 913 int matrix[CMATRIX_LEN]) 914{ 915 int i; 916 /* 917 * Apply the current saturation setting first. 918 */ 919 for (i = 0; i < CMATRIX_LEN; i++) 920 matrix[i] = (info->fmt->cmatrix[i]*info->sat) >> 7; 921 /* 922 * Then, if need be, rotate the hue value. 923 */ 924 if (info->hue != 0) { 925 int sinth, costh, tmpmatrix[CMATRIX_LEN]; 926 927 memcpy(tmpmatrix, matrix, CMATRIX_LEN*sizeof(int)); 928 sinth = ov7670_sine(info->hue); 929 costh = ov7670_cosine(info->hue); 930 931 matrix[0] = (matrix[3]*sinth + matrix[0]*costh)/1000; 932 matrix[1] = (matrix[4]*sinth + matrix[1]*costh)/1000; 933 matrix[2] = (matrix[5]*sinth + matrix[2]*costh)/1000; 934 matrix[3] = (matrix[3]*costh - matrix[0]*sinth)/1000; 935 matrix[4] = (matrix[4]*costh - matrix[1]*sinth)/1000; 936 matrix[5] = (matrix[5]*costh - matrix[2]*sinth)/1000; 937 } 938} 939 940 941 942static int ov7670_t_sat(struct i2c_client *client, int value) 943{ 944 struct ov7670_info *info = i2c_get_clientdata(client); 945 int matrix[CMATRIX_LEN]; 946 int ret; 947 948 info->sat = value; 949 ov7670_calc_cmatrix(info, matrix); 950 ret = ov7670_store_cmatrix(client, matrix); 951 return ret; 952} 953 954static int ov7670_q_sat(struct i2c_client *client, __s32 *value) 955{ 956 struct ov7670_info *info = i2c_get_clientdata(client); 957 958 *value = info->sat; 959 return 0; 960} 961 962static int ov7670_t_hue(struct i2c_client *client, int value) 963{ 964 struct ov7670_info *info = i2c_get_clientdata(client); 965 int matrix[CMATRIX_LEN]; 966 int ret; 967 968 if (value < -180 || value > 180) 969 return -EINVAL; 970 info->hue = value; 971 ov7670_calc_cmatrix(info, matrix); 972 ret = ov7670_store_cmatrix(client, matrix); 973 return ret; 974} 975 976 977static int ov7670_q_hue(struct i2c_client *client, __s32 *value) 978{ 979 struct ov7670_info *info = i2c_get_clientdata(client); 980 981 *value = info->hue; 982 return 0; 983} 984 985 986/* 987 * Some weird registers seem to store values in a sign/magnitude format! 988 */ 989static unsigned char ov7670_sm_to_abs(unsigned char v) 990{ 991 if ((v & 0x80) == 0) 992 return v + 128; 993 else 994 return 128 - (v & 0x7f); 995} 996 997 998static unsigned char ov7670_abs_to_sm(unsigned char v) 999{ 1000 if (v > 127) 1001 return v & 0x7f; 1002 else 1003 return (128 - v) | 0x80; 1004} 1005 1006static int ov7670_t_brightness(struct i2c_client *client, int value) 1007{ 1008 unsigned char com8, v; 1009 int ret; 1010 1011 ov7670_read(client, REG_COM8, &com8); 1012 com8 &= ~COM8_AEC; 1013 ov7670_write(client, REG_COM8, com8); 1014 v = ov7670_abs_to_sm(value); 1015 ret = ov7670_write(client, REG_BRIGHT, v); 1016 return ret; 1017} 1018 1019static int ov7670_q_brightness(struct i2c_client *client, __s32 *value) 1020{ 1021 unsigned char v; 1022 int ret = ov7670_read(client, REG_BRIGHT, &v); 1023 1024 *value = ov7670_sm_to_abs(v); 1025 return ret; 1026} 1027 1028static int ov7670_t_contrast(struct i2c_client *client, int value) 1029{ 1030 return ov7670_write(client, REG_CONTRAS, (unsigned char) value); 1031} 1032 1033static int ov7670_q_contrast(struct i2c_client *client, __s32 *value) 1034{ 1035 unsigned char v; 1036 int ret = ov7670_read(client, REG_CONTRAS, &v); 1037 1038 *value = v; 1039 return ret; 1040} 1041 1042static int ov7670_q_hflip(struct i2c_client *client, __s32 *value) 1043{ 1044 int ret; 1045 unsigned char v; 1046 1047 ret = ov7670_read(client, REG_MVFP, &v); 1048 *value = (v & MVFP_MIRROR) == MVFP_MIRROR; 1049 return ret; 1050} 1051 1052 1053static int ov7670_t_hflip(struct i2c_client *client, int value) 1054{ 1055 unsigned char v; 1056 int ret; 1057 1058 ret = ov7670_read(client, REG_MVFP, &v); 1059 if (value) 1060 v |= MVFP_MIRROR; 1061 else 1062 v &= ~MVFP_MIRROR; 1063 msleep(10); 1064 ret += ov7670_write(client, REG_MVFP, v); 1065 return ret; 1066} 1067 1068 1069 1070static int ov7670_q_vflip(struct i2c_client *client, __s32 *value) 1071{ 1072 int ret; 1073 unsigned char v; 1074 1075 ret = ov7670_read(client, REG_MVFP, &v); 1076 *value = (v & MVFP_FLIP) == MVFP_FLIP; 1077 return ret; 1078} 1079 1080 1081static int ov7670_t_vflip(struct i2c_client *client, int value) 1082{ 1083 unsigned char v; 1084 int ret; 1085 1086 ret = ov7670_read(client, REG_MVFP, &v); 1087 if (value) 1088 v |= MVFP_FLIP; 1089 else 1090 v &= ~MVFP_FLIP; 1091 msleep(10); 1092 ret += ov7670_write(client, REG_MVFP, v); 1093 return ret; 1094} 1095 1096 1097static struct ov7670_control { 1098 struct v4l2_queryctrl qc; 1099 int (*query)(struct i2c_client *c, __s32 *value); 1100 int (*tweak)(struct i2c_client *c, int value); 1101} ov7670_controls[] = 1102{ 1103 { 1104 .qc = { 1105 .id = V4L2_CID_BRIGHTNESS, 1106 .type = V4L2_CTRL_TYPE_INTEGER, 1107 .name = "Brightness", 1108 .minimum = 0, 1109 .maximum = 255, 1110 .step = 1, 1111 .default_value = 0x80, 1112 .flags = V4L2_CTRL_FLAG_SLIDER 1113 }, 1114 .tweak = ov7670_t_brightness, 1115 .query = ov7670_q_brightness, 1116 }, 1117 { 1118 .qc = { 1119 .id = V4L2_CID_CONTRAST, 1120 .type = V4L2_CTRL_TYPE_INTEGER, 1121 .name = "Contrast", 1122 .minimum = 0, 1123 .maximum = 127, 1124 .step = 1, 1125 .default_value = 0x40, 1126 .flags = V4L2_CTRL_FLAG_SLIDER 1127 }, 1128 .tweak = ov7670_t_contrast, 1129 .query = ov7670_q_contrast, 1130 }, 1131 { 1132 .qc = { 1133 .id = V4L2_CID_SATURATION, 1134 .type = V4L2_CTRL_TYPE_INTEGER, 1135 .name = "Saturation", 1136 .minimum = 0, 1137 .maximum = 256, 1138 .step = 1, 1139 .default_value = 0x80, 1140 .flags = V4L2_CTRL_FLAG_SLIDER 1141 }, 1142 .tweak = ov7670_t_sat, 1143 .query = ov7670_q_sat, 1144 }, 1145 { 1146 .qc = { 1147 .id = V4L2_CID_HUE, 1148 .type = V4L2_CTRL_TYPE_INTEGER, 1149 .name = "HUE", 1150 .minimum = -180, 1151 .maximum = 180, 1152 .step = 5, 1153 .default_value = 0, 1154 .flags = V4L2_CTRL_FLAG_SLIDER 1155 }, 1156 .tweak = ov7670_t_hue, 1157 .query = ov7670_q_hue, 1158 }, 1159 { 1160 .qc = { 1161 .id = V4L2_CID_VFLIP, 1162 .type = V4L2_CTRL_TYPE_BOOLEAN, 1163 .name = "Vertical flip", 1164 .minimum = 0, 1165 .maximum = 1, 1166 .step = 1, 1167 .default_value = 0, 1168 }, 1169 .tweak = ov7670_t_vflip, 1170 .query = ov7670_q_vflip, 1171 }, 1172 { 1173 .qc = { 1174 .id = V4L2_CID_HFLIP, 1175 .type = V4L2_CTRL_TYPE_BOOLEAN, 1176 .name = "Horizontal mirror", 1177 .minimum = 0, 1178 .maximum = 1, 1179 .step = 1, 1180 .default_value = 0, 1181 }, 1182 .tweak = ov7670_t_hflip, 1183 .query = ov7670_q_hflip, 1184 }, 1185}; 1186#define N_CONTROLS (sizeof(ov7670_controls)/sizeof(ov7670_controls[0])) 1187 1188static struct ov7670_control *ov7670_find_control(__u32 id) 1189{ 1190 int i; 1191 1192 for (i = 0; i < N_CONTROLS; i++) 1193 if (ov7670_controls[i].qc.id == id) 1194 return ov7670_controls + i; 1195 return NULL; 1196} 1197 1198 1199static int ov7670_queryctrl(struct i2c_client *client, 1200 struct v4l2_queryctrl *qc) 1201{ 1202 struct ov7670_control *ctrl = ov7670_find_control(qc->id); 1203 1204 if (ctrl == NULL) 1205 return -EINVAL; 1206 *qc = ctrl->qc; 1207 return 0; 1208} 1209 1210static int ov7670_g_ctrl(struct i2c_client *client, struct v4l2_control *ctrl) 1211{ 1212 struct ov7670_control *octrl = ov7670_find_control(ctrl->id); 1213 int ret; 1214 1215 if (octrl == NULL) 1216 return -EINVAL; 1217 ret = octrl->query(client, &ctrl->value); 1218 if (ret >= 0) 1219 return 0; 1220 return ret; 1221} 1222 1223static int ov7670_s_ctrl(struct i2c_client *client, struct v4l2_control *ctrl) 1224{ 1225 struct ov7670_control *octrl = ov7670_find_control(ctrl->id); 1226 int ret; 1227 1228 if (octrl == NULL) 1229 return -EINVAL; 1230 ret = octrl->tweak(client, ctrl->value); 1231 if (ret >= 0) 1232 return 0; 1233 return ret; 1234} 1235 1236 1237 1238 1239 1240 1241/* 1242 * Basic i2c stuff. 1243 */ 1244static struct i2c_driver ov7670_driver; 1245 1246static int ov7670_attach(struct i2c_adapter *adapter) 1247{ 1248 int ret; 1249 struct i2c_client *client; 1250 struct ov7670_info *info; 1251 1252 /* 1253 * For now: only deal with adapters we recognize. 1254 */ 1255 if (adapter->id != I2C_HW_SMBUS_CAFE) 1256 return -ENODEV; 1257 1258 client = kzalloc(sizeof (struct i2c_client), GFP_KERNEL); 1259 if (! client) 1260 return -ENOMEM; 1261 client->adapter = adapter; 1262 client->addr = OV7670_I2C_ADDR; 1263 client->driver = &ov7670_driver, 1264 strcpy(client->name, "OV7670"); 1265 /* 1266 * Set up our info structure. 1267 */ 1268 info = kzalloc(sizeof (struct ov7670_info), GFP_KERNEL); 1269 if (! info) { 1270 ret = -ENOMEM; 1271 goto out_free; 1272 } 1273 info->fmt = &ov7670_formats[0]; 1274 info->sat = 128; /* Review this */ 1275 i2c_set_clientdata(client, info); 1276 1277 /* 1278 * Make sure it's an ov7670 1279 */ 1280 ret = ov7670_detect(client); 1281 if (ret) 1282 goto out_free_info; 1283 ret = i2c_attach_client(client); 1284 if (ret) 1285 goto out_free_info; 1286 return 0; 1287 1288 out_free_info: 1289 kfree(info); 1290 out_free: 1291 kfree(client); 1292 return ret; 1293} 1294 1295 1296static int ov7670_detach(struct i2c_client *client) 1297{ 1298 i2c_detach_client(client); 1299 kfree(i2c_get_clientdata(client)); 1300 kfree(client); 1301 return 0; 1302} 1303 1304 1305static int ov7670_command(struct i2c_client *client, unsigned int cmd, 1306 void *arg) 1307{ 1308 switch (cmd) { 1309 case VIDIOC_G_CHIP_IDENT: 1310 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_OV7670, 0); 1311 1312 case VIDIOC_INT_RESET: 1313 ov7670_reset(client); 1314 return 0; 1315 1316 case VIDIOC_INT_INIT: 1317 return ov7670_init(client); 1318 1319 case VIDIOC_ENUM_FMT: 1320 return ov7670_enum_fmt(client, (struct v4l2_fmtdesc *) arg); 1321 case VIDIOC_TRY_FMT: 1322 return ov7670_try_fmt(client, (struct v4l2_format *) arg, NULL, NULL); 1323 case VIDIOC_S_FMT: 1324 return ov7670_s_fmt(client, (struct v4l2_format *) arg); 1325 case VIDIOC_QUERYCTRL: 1326 return ov7670_queryctrl(client, (struct v4l2_queryctrl *) arg); 1327 case VIDIOC_S_CTRL: 1328 return ov7670_s_ctrl(client, (struct v4l2_control *) arg); 1329 case VIDIOC_G_CTRL: 1330 return ov7670_g_ctrl(client, (struct v4l2_control *) arg); 1331 case VIDIOC_S_PARM: 1332 return ov7670_s_parm(client, (struct v4l2_streamparm *) arg); 1333 case VIDIOC_G_PARM: 1334 return ov7670_g_parm(client, (struct v4l2_streamparm *) arg); 1335 } 1336 return -EINVAL; 1337} 1338 1339 1340 1341static struct i2c_driver ov7670_driver = { 1342 .driver = { 1343 .name = "ov7670", 1344 }, 1345 .id = I2C_DRIVERID_OV7670, 1346 .class = I2C_CLASS_CAM_DIGITAL, 1347 .attach_adapter = ov7670_attach, 1348 .detach_client = ov7670_detach, 1349 .command = ov7670_command, 1350}; 1351 1352 1353/* 1354 * Module initialization 1355 */ 1356static int __init ov7670_mod_init(void) 1357{ 1358 printk(KERN_NOTICE "OmniVision ov7670 sensor driver, at your service\n"); 1359 return i2c_add_driver(&ov7670_driver); 1360} 1361 1362static void __exit ov7670_mod_exit(void) 1363{ 1364 i2c_del_driver(&ov7670_driver); 1365} 1366 1367module_init(ov7670_mod_init); 1368module_exit(ov7670_mod_exit); 1369