1/* 2 * pluto2.c - Satelco Easywatch Mobile Terrestrial Receiver [DVB-T] 3 * 4 * Copyright (C) 2005 Andreas Oberritter <obi@linuxtv.org> 5 * 6 * based on pluto2.c 1.10 - http://instinct-wp8.no-ip.org/pluto/ 7 * by Dany Salman <salmandany@yahoo.fr> 8 * Copyright (c) 2004 TDF 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 23 * 24 */ 25 26#include <linux/i2c.h> 27#include <linux/i2c-algo-bit.h> 28#include <linux/init.h> 29#include <linux/kernel.h> 30#include <linux/module.h> 31#include <linux/pci.h> 32#include <linux/dma-mapping.h> 33 34#include "demux.h" 35#include "dmxdev.h" 36#include "dvb_demux.h" 37#include "dvb_frontend.h" 38#include "dvb_net.h" 39#include "dvbdev.h" 40#include "tda1004x.h" 41 42#define DRIVER_NAME "pluto2" 43 44#define REG_PIDn(n) ((n) << 2) /* PID n pattern registers */ 45#define REG_PCAR 0x0020 /* PC address register */ 46#define REG_TSCR 0x0024 /* TS ctrl & status */ 47#define REG_MISC 0x0028 /* miscellaneous */ 48#define REG_MMAC 0x002c /* MSB MAC address */ 49#define REG_IMAC 0x0030 /* ISB MAC address */ 50#define REG_LMAC 0x0034 /* LSB MAC address */ 51#define REG_SPID 0x0038 /* SPI data */ 52#define REG_SLCS 0x003c /* serial links ctrl/status */ 53 54#define PID0_NOFIL (0x0001 << 16) 55#define PIDn_ENP (0x0001 << 15) 56#define PID0_END (0x0001 << 14) 57#define PID0_AFIL (0x0001 << 13) 58#define PIDn_PID (0x1fff << 0) 59 60#define TSCR_NBPACKETS (0x00ff << 24) 61#define TSCR_DEM (0x0001 << 17) 62#define TSCR_DE (0x0001 << 16) 63#define TSCR_RSTN (0x0001 << 15) 64#define TSCR_MSKO (0x0001 << 14) 65#define TSCR_MSKA (0x0001 << 13) 66#define TSCR_MSKL (0x0001 << 12) 67#define TSCR_OVR (0x0001 << 11) 68#define TSCR_AFUL (0x0001 << 10) 69#define TSCR_LOCK (0x0001 << 9) 70#define TSCR_IACK (0x0001 << 8) 71#define TSCR_ADEF (0x007f << 0) 72 73#define MISC_DVR (0x0fff << 4) 74#define MISC_ALED (0x0001 << 3) 75#define MISC_FRST (0x0001 << 2) 76#define MISC_LED1 (0x0001 << 1) 77#define MISC_LED0 (0x0001 << 0) 78 79#define SPID_SPIDR (0x00ff << 0) 80 81#define SLCS_SCL (0x0001 << 7) 82#define SLCS_SDA (0x0001 << 6) 83#define SLCS_CSN (0x0001 << 2) 84#define SLCS_OVR (0x0001 << 1) 85#define SLCS_SWC (0x0001 << 0) 86 87#define TS_DMA_PACKETS (8) 88#define TS_DMA_BYTES (188 * TS_DMA_PACKETS) 89 90#define I2C_ADDR_TDA10046 0x10 91#define I2C_ADDR_TUA6034 0xc2 92#define NHWFILTERS 8 93 94struct pluto { 95 /* pci */ 96 struct pci_dev *pdev; 97 u8 __iomem *io_mem; 98 99 /* dvb */ 100 struct dmx_frontend hw_frontend; 101 struct dmx_frontend mem_frontend; 102 struct dmxdev dmxdev; 103 struct dvb_adapter dvb_adapter; 104 struct dvb_demux demux; 105 struct dvb_frontend *fe; 106 struct dvb_net dvbnet; 107 unsigned int full_ts_users; 108 unsigned int users; 109 110 /* i2c */ 111 struct i2c_algo_bit_data i2c_bit; 112 struct i2c_adapter i2c_adap; 113 unsigned int i2cbug; 114 115 /* irq */ 116 unsigned int overflow; 117 118 /* dma */ 119 dma_addr_t dma_addr; 120 u8 dma_buf[TS_DMA_BYTES]; 121 u8 dummy[4096]; 122}; 123 124static inline struct pluto *feed_to_pluto(struct dvb_demux_feed *feed) 125{ 126 return container_of(feed->demux, struct pluto, demux); 127} 128 129static inline struct pluto *frontend_to_pluto(struct dvb_frontend *fe) 130{ 131 return container_of(fe->dvb, struct pluto, dvb_adapter); 132} 133 134static inline u32 pluto_readreg(struct pluto *pluto, u32 reg) 135{ 136 return readl(&pluto->io_mem[reg]); 137} 138 139static inline void pluto_writereg(struct pluto *pluto, u32 reg, u32 val) 140{ 141 writel(val, &pluto->io_mem[reg]); 142} 143 144static inline void pluto_rw(struct pluto *pluto, u32 reg, u32 mask, u32 bits) 145{ 146 u32 val = readl(&pluto->io_mem[reg]); 147 val &= ~mask; 148 val |= bits; 149 writel(val, &pluto->io_mem[reg]); 150} 151 152static void pluto_write_tscr(struct pluto *pluto, u32 val) 153{ 154 /* set the number of packets */ 155 val &= ~TSCR_ADEF; 156 val |= TS_DMA_PACKETS / 2; 157 158 pluto_writereg(pluto, REG_TSCR, val); 159} 160 161static void pluto_setsda(void *data, int state) 162{ 163 struct pluto *pluto = data; 164 165 if (state) 166 pluto_rw(pluto, REG_SLCS, SLCS_SDA, SLCS_SDA); 167 else 168 pluto_rw(pluto, REG_SLCS, SLCS_SDA, 0); 169} 170 171static void pluto_setscl(void *data, int state) 172{ 173 struct pluto *pluto = data; 174 175 if (state) 176 pluto_rw(pluto, REG_SLCS, SLCS_SCL, SLCS_SCL); 177 else 178 pluto_rw(pluto, REG_SLCS, SLCS_SCL, 0); 179 180 if ((state) && (pluto->i2cbug == 0)) { 181 pluto->i2cbug = 1; 182 } else { 183 if ((!state) && (pluto->i2cbug == 1)) 184 pluto_setsda(pluto, 1); 185 pluto->i2cbug = 0; 186 } 187} 188 189static int pluto_getsda(void *data) 190{ 191 struct pluto *pluto = data; 192 193 return pluto_readreg(pluto, REG_SLCS) & SLCS_SDA; 194} 195 196static int pluto_getscl(void *data) 197{ 198 struct pluto *pluto = data; 199 200 return pluto_readreg(pluto, REG_SLCS) & SLCS_SCL; 201} 202 203static void pluto_reset_frontend(struct pluto *pluto, int reenable) 204{ 205 u32 val = pluto_readreg(pluto, REG_MISC); 206 207 if (val & MISC_FRST) { 208 val &= ~MISC_FRST; 209 pluto_writereg(pluto, REG_MISC, val); 210 } 211 if (reenable) { 212 val |= MISC_FRST; 213 pluto_writereg(pluto, REG_MISC, val); 214 } 215} 216 217static void pluto_reset_ts(struct pluto *pluto, int reenable) 218{ 219 u32 val = pluto_readreg(pluto, REG_TSCR); 220 221 if (val & TSCR_RSTN) { 222 val &= ~TSCR_RSTN; 223 pluto_write_tscr(pluto, val); 224 } 225 if (reenable) { 226 val |= TSCR_RSTN; 227 pluto_write_tscr(pluto, val); 228 } 229} 230 231static void pluto_set_dma_addr(struct pluto *pluto) 232{ 233 pluto_writereg(pluto, REG_PCAR, cpu_to_le32(pluto->dma_addr)); 234} 235 236static int __devinit pluto_dma_map(struct pluto *pluto) 237{ 238 pluto->dma_addr = pci_map_single(pluto->pdev, pluto->dma_buf, 239 TS_DMA_BYTES, PCI_DMA_FROMDEVICE); 240 241 return pci_dma_mapping_error(pluto->dma_addr); 242} 243 244static void pluto_dma_unmap(struct pluto *pluto) 245{ 246 pci_unmap_single(pluto->pdev, pluto->dma_addr, 247 TS_DMA_BYTES, PCI_DMA_FROMDEVICE); 248} 249 250static int pluto_start_feed(struct dvb_demux_feed *f) 251{ 252 struct pluto *pluto = feed_to_pluto(f); 253 254 /* enable PID filtering */ 255 if (pluto->users++ == 0) 256 pluto_rw(pluto, REG_PIDn(0), PID0_AFIL | PID0_NOFIL, 0); 257 258 if ((f->pid < 0x2000) && (f->index < NHWFILTERS)) 259 pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, PIDn_ENP | f->pid); 260 else if (pluto->full_ts_users++ == 0) 261 pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, PID0_NOFIL); 262 263 return 0; 264} 265 266static int pluto_stop_feed(struct dvb_demux_feed *f) 267{ 268 struct pluto *pluto = feed_to_pluto(f); 269 270 /* disable PID filtering */ 271 if (--pluto->users == 0) 272 pluto_rw(pluto, REG_PIDn(0), PID0_AFIL, PID0_AFIL); 273 274 if ((f->pid < 0x2000) && (f->index < NHWFILTERS)) 275 pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, 0x1fff); 276 else if (--pluto->full_ts_users == 0) 277 pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, 0); 278 279 return 0; 280} 281 282static void pluto_dma_end(struct pluto *pluto, unsigned int nbpackets) 283{ 284 /* synchronize the DMA transfer with the CPU 285 * first so that we see updated contents. */ 286 pci_dma_sync_single_for_cpu(pluto->pdev, pluto->dma_addr, 287 TS_DMA_BYTES, PCI_DMA_FROMDEVICE); 288 289 if ((nbpackets == 0) || (nbpackets > TS_DMA_PACKETS)) { 290 unsigned int i = 0; 291 while (pluto->dma_buf[i] == 0x47) 292 i += 188; 293 nbpackets = i / 188; 294 if (i == 0) { 295 pluto_reset_ts(pluto, 1); 296 dev_printk(KERN_DEBUG, &pluto->pdev->dev, "resetting TS because of invalid packet counter\n"); 297 } 298 } 299 300 dvb_dmx_swfilter_packets(&pluto->demux, pluto->dma_buf, nbpackets); 301 302 /* clear the dma buffer. this is needed to be able to identify 303 * new valid ts packets above */ 304 memset(pluto->dma_buf, 0, nbpackets * 188); 305 306 /* reset the dma address */ 307 pluto_set_dma_addr(pluto); 308 309 /* sync the buffer and give it back to the card */ 310 pci_dma_sync_single_for_device(pluto->pdev, pluto->dma_addr, 311 TS_DMA_BYTES, PCI_DMA_FROMDEVICE); 312} 313 314static irqreturn_t pluto_irq(int irq, void *dev_id) 315{ 316 struct pluto *pluto = dev_id; 317 u32 tscr; 318 319 /* check whether an interrupt occured on this device */ 320 tscr = pluto_readreg(pluto, REG_TSCR); 321 if (!(tscr & (TSCR_DE | TSCR_OVR))) 322 return IRQ_NONE; 323 324 if (tscr == 0xffffffff) { 325 dev_err(&pluto->pdev->dev, "card hung up :(\n"); 326 return IRQ_HANDLED; 327 } 328 329 /* dma end interrupt */ 330 if (tscr & TSCR_DE) { 331 pluto_dma_end(pluto, (tscr & TSCR_NBPACKETS) >> 24); 332 /* overflow interrupt */ 333 if (tscr & TSCR_OVR) 334 pluto->overflow++; 335 if (pluto->overflow) { 336 dev_err(&pluto->pdev->dev, "overflow irq (%d)\n", 337 pluto->overflow); 338 pluto_reset_ts(pluto, 1); 339 pluto->overflow = 0; 340 } 341 } else if (tscr & TSCR_OVR) { 342 pluto->overflow++; 343 } 344 345 /* ACK the interrupt */ 346 pluto_write_tscr(pluto, tscr | TSCR_IACK); 347 348 return IRQ_HANDLED; 349} 350 351static void __devinit pluto_enable_irqs(struct pluto *pluto) 352{ 353 u32 val = pluto_readreg(pluto, REG_TSCR); 354 355 /* disable AFUL and LOCK interrupts */ 356 val |= (TSCR_MSKA | TSCR_MSKL); 357 /* enable DMA and OVERFLOW interrupts */ 358 val &= ~(TSCR_DEM | TSCR_MSKO); 359 /* clear pending interrupts */ 360 val |= TSCR_IACK; 361 362 pluto_write_tscr(pluto, val); 363} 364 365static void pluto_disable_irqs(struct pluto *pluto) 366{ 367 u32 val = pluto_readreg(pluto, REG_TSCR); 368 369 /* disable all interrupts */ 370 val |= (TSCR_DEM | TSCR_MSKO | TSCR_MSKA | TSCR_MSKL); 371 /* clear pending interrupts */ 372 val |= TSCR_IACK; 373 374 pluto_write_tscr(pluto, val); 375} 376 377static int __devinit pluto_hw_init(struct pluto *pluto) 378{ 379 pluto_reset_frontend(pluto, 1); 380 381 /* set automatic LED control by FPGA */ 382 pluto_rw(pluto, REG_MISC, MISC_ALED, MISC_ALED); 383 384 /* set data endianess */ 385#ifdef __LITTLE_ENDIAN 386 pluto_rw(pluto, REG_PIDn(0), PID0_END, PID0_END); 387#else 388 pluto_rw(pluto, REG_PIDn(0), PID0_END, 0); 389#endif 390 /* map DMA and set address */ 391 pluto_dma_map(pluto); 392 pluto_set_dma_addr(pluto); 393 394 /* enable interrupts */ 395 pluto_enable_irqs(pluto); 396 397 /* reset TS logic */ 398 pluto_reset_ts(pluto, 1); 399 400 return 0; 401} 402 403static void pluto_hw_exit(struct pluto *pluto) 404{ 405 /* disable interrupts */ 406 pluto_disable_irqs(pluto); 407 408 pluto_reset_ts(pluto, 0); 409 410 /* LED: disable automatic control, enable yellow, disable green */ 411 pluto_rw(pluto, REG_MISC, MISC_ALED | MISC_LED1 | MISC_LED0, MISC_LED1); 412 413 /* unmap DMA */ 414 pluto_dma_unmap(pluto); 415 416 pluto_reset_frontend(pluto, 0); 417} 418 419static inline u32 divide(u32 numerator, u32 denominator) 420{ 421 if (denominator == 0) 422 return ~0; 423 424 return (numerator + denominator / 2) / denominator; 425} 426 427/* LG Innotek TDTE-E001P (Infineon TUA6034) */ 428static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend *fe, 429 struct dvb_frontend_parameters *p) 430{ 431 struct pluto *pluto = frontend_to_pluto(fe); 432 struct i2c_msg msg; 433 int ret; 434 u8 buf[4]; 435 u32 div; 436 437 // Fref = 166.667 Hz 438 // Fref * 3 = 500.000 Hz 439 // IF = 36166667 440 // IF / Fref = 217 441 //div = divide(p->frequency + 36166667, 166667); 442 div = divide(p->frequency * 3, 500000) + 217; 443 buf[0] = (div >> 8) & 0x7f; 444 buf[1] = (div >> 0) & 0xff; 445 446 if (p->frequency < 611000000) 447 buf[2] = 0xb4; 448 else if (p->frequency < 811000000) 449 buf[2] = 0xbc; 450 else 451 buf[2] = 0xf4; 452 453 // VHF: 174-230 MHz 454 // center: 350 MHz 455 // UHF: 470-862 MHz 456 if (p->frequency < 350000000) 457 buf[3] = 0x02; 458 else 459 buf[3] = 0x04; 460 461 if (p->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) 462 buf[3] |= 0x08; 463 464 if (sizeof(buf) == 6) { 465 buf[4] = buf[2]; 466 buf[4] &= ~0x1c; 467 buf[4] |= 0x18; 468 469 buf[5] = (0 << 7) | (2 << 4); 470 } 471 472 msg.addr = I2C_ADDR_TUA6034 >> 1; 473 msg.flags = 0; 474 msg.buf = buf; 475 msg.len = sizeof(buf); 476 477 if (fe->ops.i2c_gate_ctrl) 478 fe->ops.i2c_gate_ctrl(fe, 1); 479 ret = i2c_transfer(&pluto->i2c_adap, &msg, 1); 480 if (ret < 0) 481 return ret; 482 else if (ret == 0) 483 return -EREMOTEIO; 484 485 return 0; 486} 487 488static int pluto2_request_firmware(struct dvb_frontend *fe, 489 const struct firmware **fw, char *name) 490{ 491 struct pluto *pluto = frontend_to_pluto(fe); 492 493 return request_firmware(fw, name, &pluto->pdev->dev); 494} 495 496static struct tda1004x_config pluto2_fe_config __devinitdata = { 497 .demod_address = I2C_ADDR_TDA10046 >> 1, 498 .invert = 1, 499 .invert_oclk = 0, 500 .xtal_freq = TDA10046_XTAL_16M, 501 .agc_config = TDA10046_AGC_DEFAULT, 502 .if_freq = TDA10046_FREQ_3617, 503 .request_firmware = pluto2_request_firmware, 504}; 505 506static int __devinit frontend_init(struct pluto *pluto) 507{ 508 int ret; 509 510 pluto->fe = tda10046_attach(&pluto2_fe_config, &pluto->i2c_adap); 511 if (!pluto->fe) { 512 dev_err(&pluto->pdev->dev, "could not attach frontend\n"); 513 return -ENODEV; 514 } 515 pluto->fe->ops.tuner_ops.set_params = lg_tdtpe001p_tuner_set_params; 516 517 ret = dvb_register_frontend(&pluto->dvb_adapter, pluto->fe); 518 if (ret < 0) { 519 if (pluto->fe->ops.release) 520 pluto->fe->ops.release(pluto->fe); 521 return ret; 522 } 523 524 return 0; 525} 526 527static void __devinit pluto_read_rev(struct pluto *pluto) 528{ 529 u32 val = pluto_readreg(pluto, REG_MISC) & MISC_DVR; 530 dev_info(&pluto->pdev->dev, "board revision %d.%d\n", 531 (val >> 12) & 0x0f, (val >> 4) & 0xff); 532} 533 534static void __devinit pluto_read_mac(struct pluto *pluto, u8 *mac) 535{ 536 u32 val = pluto_readreg(pluto, REG_MMAC); 537 mac[0] = (val >> 8) & 0xff; 538 mac[1] = (val >> 0) & 0xff; 539 540 val = pluto_readreg(pluto, REG_IMAC); 541 mac[2] = (val >> 8) & 0xff; 542 mac[3] = (val >> 0) & 0xff; 543 544 val = pluto_readreg(pluto, REG_LMAC); 545 mac[4] = (val >> 8) & 0xff; 546 mac[5] = (val >> 0) & 0xff; 547 548 dev_info(&pluto->pdev->dev, "MAC %02x:%02x:%02x:%02x:%02x:%02x\n", 549 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); 550} 551 552static int __devinit pluto_read_serial(struct pluto *pluto) 553{ 554 struct pci_dev *pdev = pluto->pdev; 555 unsigned int i, j; 556 u8 __iomem *cis; 557 558 cis = pci_iomap(pdev, 1, 0); 559 if (!cis) 560 return -EIO; 561 562 dev_info(&pdev->dev, "S/N "); 563 564 for (i = 0xe0; i < 0x100; i += 4) { 565 u32 val = readl(&cis[i]); 566 for (j = 0; j < 32; j += 8) { 567 if ((val & 0xff) == 0xff) 568 goto out; 569 printk("%c", val & 0xff); 570 val >>= 8; 571 } 572 } 573out: 574 printk("\n"); 575 pci_iounmap(pdev, cis); 576 577 return 0; 578} 579 580static int __devinit pluto2_probe(struct pci_dev *pdev, 581 const struct pci_device_id *ent) 582{ 583 struct pluto *pluto; 584 struct dvb_adapter *dvb_adapter; 585 struct dvb_demux *dvbdemux; 586 struct dmx_demux *dmx; 587 int ret = -ENOMEM; 588 589 pluto = kzalloc(sizeof(struct pluto), GFP_KERNEL); 590 if (!pluto) 591 goto out; 592 593 pluto->pdev = pdev; 594 595 ret = pci_enable_device(pdev); 596 if (ret < 0) 597 goto err_kfree; 598 599 /* enable interrupts */ 600 pci_write_config_dword(pdev, 0x6c, 0x8000); 601 602 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK); 603 if (ret < 0) 604 goto err_pci_disable_device; 605 606 pci_set_master(pdev); 607 608 ret = pci_request_regions(pdev, DRIVER_NAME); 609 if (ret < 0) 610 goto err_pci_disable_device; 611 612 pluto->io_mem = pci_iomap(pdev, 0, 0x40); 613 if (!pluto->io_mem) { 614 ret = -EIO; 615 goto err_pci_release_regions; 616 } 617 618 pci_set_drvdata(pdev, pluto); 619 620 ret = request_irq(pdev->irq, pluto_irq, IRQF_SHARED, DRIVER_NAME, pluto); 621 if (ret < 0) 622 goto err_pci_iounmap; 623 624 ret = pluto_hw_init(pluto); 625 if (ret < 0) 626 goto err_free_irq; 627 628 /* i2c */ 629 i2c_set_adapdata(&pluto->i2c_adap, pluto); 630 strcpy(pluto->i2c_adap.name, DRIVER_NAME); 631 pluto->i2c_adap.owner = THIS_MODULE; 632 pluto->i2c_adap.class = I2C_CLASS_TV_DIGITAL; 633 pluto->i2c_adap.dev.parent = &pdev->dev; 634 pluto->i2c_adap.algo_data = &pluto->i2c_bit; 635 pluto->i2c_bit.data = pluto; 636 pluto->i2c_bit.setsda = pluto_setsda; 637 pluto->i2c_bit.setscl = pluto_setscl; 638 pluto->i2c_bit.getsda = pluto_getsda; 639 pluto->i2c_bit.getscl = pluto_getscl; 640 pluto->i2c_bit.udelay = 10; 641 pluto->i2c_bit.timeout = 10; 642 643 /* Raise SCL and SDA */ 644 pluto_setsda(pluto, 1); 645 pluto_setscl(pluto, 1); 646 647 ret = i2c_bit_add_bus(&pluto->i2c_adap); 648 if (ret < 0) 649 goto err_pluto_hw_exit; 650 651 /* dvb */ 652 ret = dvb_register_adapter(&pluto->dvb_adapter, DRIVER_NAME, THIS_MODULE, &pdev->dev); 653 if (ret < 0) 654 goto err_i2c_del_adapter; 655 656 dvb_adapter = &pluto->dvb_adapter; 657 658 pluto_read_rev(pluto); 659 pluto_read_serial(pluto); 660 pluto_read_mac(pluto, dvb_adapter->proposed_mac); 661 662 dvbdemux = &pluto->demux; 663 dvbdemux->filternum = 256; 664 dvbdemux->feednum = 256; 665 dvbdemux->start_feed = pluto_start_feed; 666 dvbdemux->stop_feed = pluto_stop_feed; 667 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | 668 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING); 669 ret = dvb_dmx_init(dvbdemux); 670 if (ret < 0) 671 goto err_dvb_unregister_adapter; 672 673 dmx = &dvbdemux->dmx; 674 675 pluto->hw_frontend.source = DMX_FRONTEND_0; 676 pluto->mem_frontend.source = DMX_MEMORY_FE; 677 pluto->dmxdev.filternum = NHWFILTERS; 678 pluto->dmxdev.demux = dmx; 679 680 ret = dvb_dmxdev_init(&pluto->dmxdev, dvb_adapter); 681 if (ret < 0) 682 goto err_dvb_dmx_release; 683 684 ret = dmx->add_frontend(dmx, &pluto->hw_frontend); 685 if (ret < 0) 686 goto err_dvb_dmxdev_release; 687 688 ret = dmx->add_frontend(dmx, &pluto->mem_frontend); 689 if (ret < 0) 690 goto err_remove_hw_frontend; 691 692 ret = dmx->connect_frontend(dmx, &pluto->hw_frontend); 693 if (ret < 0) 694 goto err_remove_mem_frontend; 695 696 ret = frontend_init(pluto); 697 if (ret < 0) 698 goto err_disconnect_frontend; 699 700 dvb_net_init(dvb_adapter, &pluto->dvbnet, dmx); 701out: 702 return ret; 703 704err_disconnect_frontend: 705 dmx->disconnect_frontend(dmx); 706err_remove_mem_frontend: 707 dmx->remove_frontend(dmx, &pluto->mem_frontend); 708err_remove_hw_frontend: 709 dmx->remove_frontend(dmx, &pluto->hw_frontend); 710err_dvb_dmxdev_release: 711 dvb_dmxdev_release(&pluto->dmxdev); 712err_dvb_dmx_release: 713 dvb_dmx_release(dvbdemux); 714err_dvb_unregister_adapter: 715 dvb_unregister_adapter(dvb_adapter); 716err_i2c_del_adapter: 717 i2c_del_adapter(&pluto->i2c_adap); 718err_pluto_hw_exit: 719 pluto_hw_exit(pluto); 720err_free_irq: 721 free_irq(pdev->irq, pluto); 722err_pci_iounmap: 723 pci_iounmap(pdev, pluto->io_mem); 724err_pci_release_regions: 725 pci_release_regions(pdev); 726err_pci_disable_device: 727 pci_disable_device(pdev); 728err_kfree: 729 pci_set_drvdata(pdev, NULL); 730 kfree(pluto); 731 goto out; 732} 733 734static void __devexit pluto2_remove(struct pci_dev *pdev) 735{ 736 struct pluto *pluto = pci_get_drvdata(pdev); 737 struct dvb_adapter *dvb_adapter = &pluto->dvb_adapter; 738 struct dvb_demux *dvbdemux = &pluto->demux; 739 struct dmx_demux *dmx = &dvbdemux->dmx; 740 741 dmx->close(dmx); 742 dvb_net_release(&pluto->dvbnet); 743 if (pluto->fe) 744 dvb_unregister_frontend(pluto->fe); 745 746 dmx->disconnect_frontend(dmx); 747 dmx->remove_frontend(dmx, &pluto->mem_frontend); 748 dmx->remove_frontend(dmx, &pluto->hw_frontend); 749 dvb_dmxdev_release(&pluto->dmxdev); 750 dvb_dmx_release(dvbdemux); 751 dvb_unregister_adapter(dvb_adapter); 752 i2c_del_adapter(&pluto->i2c_adap); 753 pluto_hw_exit(pluto); 754 free_irq(pdev->irq, pluto); 755 pci_iounmap(pdev, pluto->io_mem); 756 pci_release_regions(pdev); 757 pci_disable_device(pdev); 758 pci_set_drvdata(pdev, NULL); 759 kfree(pluto); 760} 761 762#ifndef PCI_VENDOR_ID_SCM 763#define PCI_VENDOR_ID_SCM 0x0432 764#endif 765#ifndef PCI_DEVICE_ID_PLUTO2 766#define PCI_DEVICE_ID_PLUTO2 0x0001 767#endif 768 769static struct pci_device_id pluto2_id_table[] __devinitdata = { 770 { 771 .vendor = PCI_VENDOR_ID_SCM, 772 .device = PCI_DEVICE_ID_PLUTO2, 773 .subvendor = PCI_ANY_ID, 774 .subdevice = PCI_ANY_ID, 775 }, { 776 /* empty */ 777 }, 778}; 779 780MODULE_DEVICE_TABLE(pci, pluto2_id_table); 781 782static struct pci_driver pluto2_driver = { 783 .name = DRIVER_NAME, 784 .id_table = pluto2_id_table, 785 .probe = pluto2_probe, 786 .remove = __devexit_p(pluto2_remove), 787}; 788 789static int __init pluto2_init(void) 790{ 791 return pci_register_driver(&pluto2_driver); 792} 793 794static void __exit pluto2_exit(void) 795{ 796 pci_unregister_driver(&pluto2_driver); 797} 798 799module_init(pluto2_init); 800module_exit(pluto2_exit); 801 802MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>"); 803MODULE_DESCRIPTION("Pluto2 driver"); 804MODULE_LICENSE("GPL"); 805