1/* 2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 * 34 * $Id: mthca_main.c,v 1.1.1.1 2007/08/03 18:52:32 Exp $ 35 */ 36 37#include <linux/module.h> 38#include <linux/init.h> 39#include <linux/errno.h> 40#include <linux/pci.h> 41#include <linux/interrupt.h> 42 43#include "mthca_dev.h" 44#include "mthca_config_reg.h" 45#include "mthca_cmd.h" 46#include "mthca_profile.h" 47#include "mthca_memfree.h" 48 49MODULE_AUTHOR("Roland Dreier"); 50MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver"); 51MODULE_LICENSE("Dual BSD/GPL"); 52MODULE_VERSION(DRV_VERSION); 53 54#ifdef CONFIG_INFINIBAND_MTHCA_DEBUG 55 56int mthca_debug_level = 0; 57module_param_named(debug_level, mthca_debug_level, int, 0644); 58MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0"); 59 60#endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */ 61 62#ifdef CONFIG_PCI_MSI 63 64static int msi_x = 0; 65module_param(msi_x, int, 0444); 66MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero"); 67 68static int msi = 0; 69module_param(msi, int, 0444); 70MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero"); 71 72#else /* CONFIG_PCI_MSI */ 73 74#define msi_x (0) 75#define msi (0) 76 77#endif /* CONFIG_PCI_MSI */ 78 79static int tune_pci = 0; 80module_param(tune_pci, int, 0444); 81MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero"); 82 83DEFINE_MUTEX(mthca_device_mutex); 84 85#define MTHCA_DEFAULT_NUM_QP (1 << 16) 86#define MTHCA_DEFAULT_RDB_PER_QP (1 << 2) 87#define MTHCA_DEFAULT_NUM_CQ (1 << 16) 88#define MTHCA_DEFAULT_NUM_MCG (1 << 13) 89#define MTHCA_DEFAULT_NUM_MPT (1 << 17) 90#define MTHCA_DEFAULT_NUM_MTT (1 << 20) 91#define MTHCA_DEFAULT_NUM_UDAV (1 << 15) 92#define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18) 93#define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18) 94 95static struct mthca_profile hca_profile = { 96 .num_qp = MTHCA_DEFAULT_NUM_QP, 97 .rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP, 98 .num_cq = MTHCA_DEFAULT_NUM_CQ, 99 .num_mcg = MTHCA_DEFAULT_NUM_MCG, 100 .num_mpt = MTHCA_DEFAULT_NUM_MPT, 101 .num_mtt = MTHCA_DEFAULT_NUM_MTT, 102 .num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */ 103 .fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */ 104 .uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */ 105}; 106 107module_param_named(num_qp, hca_profile.num_qp, int, 0444); 108MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA"); 109 110module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444); 111MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP"); 112 113module_param_named(num_cq, hca_profile.num_cq, int, 0444); 114MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA"); 115 116module_param_named(num_mcg, hca_profile.num_mcg, int, 0444); 117MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA"); 118 119module_param_named(num_mpt, hca_profile.num_mpt, int, 0444); 120MODULE_PARM_DESC(num_mpt, 121 "maximum number of memory protection table entries per HCA"); 122 123module_param_named(num_mtt, hca_profile.num_mtt, int, 0444); 124MODULE_PARM_DESC(num_mtt, 125 "maximum number of memory translation table segments per HCA"); 126 127module_param_named(num_udav, hca_profile.num_udav, int, 0444); 128MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA"); 129 130module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444); 131MODULE_PARM_DESC(fmr_reserved_mtts, 132 "number of memory translation table segments reserved for FMR"); 133 134static const char mthca_version[] __devinitdata = 135 DRV_NAME ": Mellanox InfiniBand HCA driver v" 136 DRV_VERSION " (" DRV_RELDATE ")\n"; 137 138static int mthca_tune_pci(struct mthca_dev *mdev) 139{ 140 int cap; 141 u16 val; 142 143 if (!tune_pci) 144 return 0; 145 146 /* First try to max out Read Byte Count */ 147 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX); 148 if (cap) { 149 if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) { 150 mthca_err(mdev, "Couldn't read PCI-X command register, " 151 "aborting.\n"); 152 return -ENODEV; 153 } 154 val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2); 155 if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) { 156 mthca_err(mdev, "Couldn't write PCI-X command register, " 157 "aborting.\n"); 158 return -ENODEV; 159 } 160 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) 161 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n"); 162 163 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP); 164 if (cap) { 165 if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) { 166 mthca_err(mdev, "Couldn't read PCI Express device control " 167 "register, aborting.\n"); 168 return -ENODEV; 169 } 170 val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12); 171 if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) { 172 mthca_err(mdev, "Couldn't write PCI Express device control " 173 "register, aborting.\n"); 174 return -ENODEV; 175 } 176 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE) 177 mthca_info(mdev, "No PCI Express capability, " 178 "not setting Max Read Request Size.\n"); 179 180 return 0; 181} 182 183static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim) 184{ 185 int err; 186 u8 status; 187 188 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status); 189 if (err) { 190 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 191 return err; 192 } 193 if (status) { 194 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, " 195 "aborting.\n", status); 196 return -EINVAL; 197 } 198 if (dev_lim->min_page_sz > PAGE_SIZE) { 199 mthca_err(mdev, "HCA minimum page size of %d bigger than " 200 "kernel PAGE_SIZE of %ld, aborting.\n", 201 dev_lim->min_page_sz, PAGE_SIZE); 202 return -ENODEV; 203 } 204 if (dev_lim->num_ports > MTHCA_MAX_PORTS) { 205 mthca_err(mdev, "HCA has %d ports, but we only support %d, " 206 "aborting.\n", 207 dev_lim->num_ports, MTHCA_MAX_PORTS); 208 return -ENODEV; 209 } 210 211 if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) { 212 mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than " 213 "PCI resource 2 size of 0x%llx, aborting.\n", 214 dev_lim->uar_size, 215 (unsigned long long)pci_resource_len(mdev->pdev, 2)); 216 return -ENODEV; 217 } 218 219 mdev->limits.num_ports = dev_lim->num_ports; 220 mdev->limits.vl_cap = dev_lim->max_vl; 221 mdev->limits.mtu_cap = dev_lim->max_mtu; 222 mdev->limits.gid_table_len = dev_lim->max_gids; 223 mdev->limits.pkey_table_len = dev_lim->max_pkeys; 224 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay; 225 mdev->limits.max_sg = dev_lim->max_sg; 226 mdev->limits.max_wqes = dev_lim->max_qp_sz; 227 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp; 228 mdev->limits.reserved_qps = dev_lim->reserved_qps; 229 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz; 230 mdev->limits.reserved_srqs = dev_lim->reserved_srqs; 231 mdev->limits.reserved_eecs = dev_lim->reserved_eecs; 232 mdev->limits.max_desc_sz = dev_lim->max_desc_sz; 233 mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev); 234 /* 235 * Subtract 1 from the limit because we need to allocate a 236 * spare CQE so the HCA HW can tell the difference between an 237 * empty CQ and a full CQ. 238 */ 239 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1; 240 mdev->limits.reserved_cqs = dev_lim->reserved_cqs; 241 mdev->limits.reserved_eqs = dev_lim->reserved_eqs; 242 mdev->limits.reserved_mtts = dev_lim->reserved_mtts; 243 mdev->limits.reserved_mrws = dev_lim->reserved_mrws; 244 mdev->limits.reserved_uars = dev_lim->reserved_uars; 245 mdev->limits.reserved_pds = dev_lim->reserved_pds; 246 mdev->limits.port_width_cap = dev_lim->max_port_width; 247 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1); 248 mdev->limits.flags = dev_lim->flags; 249 /* 250 * For old FW that doesn't return static rate support, use a 251 * value of 0x3 (only static rate values of 0 or 1 are handled), 252 * except on Sinai, where even old FW can handle static rate 253 * values of 2 and 3. 254 */ 255 if (dev_lim->stat_rate_support) 256 mdev->limits.stat_rate_support = dev_lim->stat_rate_support; 257 else if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT) 258 mdev->limits.stat_rate_support = 0xf; 259 else 260 mdev->limits.stat_rate_support = 0x3; 261 262 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver. 263 May be doable since hardware supports it for SRQ. 264 265 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver. 266 267 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not 268 supported by driver. */ 269 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 270 IB_DEVICE_PORT_ACTIVE_EVENT | 271 IB_DEVICE_SYS_IMAGE_GUID | 272 IB_DEVICE_RC_RNR_NAK_GEN; 273 274 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR) 275 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 276 277 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR) 278 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 279 280 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI) 281 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI; 282 283 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG) 284 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 285 286 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE) 287 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 288 289 if (dev_lim->flags & DEV_LIM_FLAG_SRQ) 290 mdev->mthca_flags |= MTHCA_FLAG_SRQ; 291 292 return 0; 293} 294 295static int mthca_init_tavor(struct mthca_dev *mdev) 296{ 297 u8 status; 298 int err; 299 struct mthca_dev_lim dev_lim; 300 struct mthca_profile profile; 301 struct mthca_init_hca_param init_hca; 302 303 err = mthca_SYS_EN(mdev, &status); 304 if (err) { 305 mthca_err(mdev, "SYS_EN command failed, aborting.\n"); 306 return err; 307 } 308 if (status) { 309 mthca_err(mdev, "SYS_EN returned status 0x%02x, " 310 "aborting.\n", status); 311 return -EINVAL; 312 } 313 314 err = mthca_QUERY_FW(mdev, &status); 315 if (err) { 316 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 317 goto err_disable; 318 } 319 if (status) { 320 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 321 "aborting.\n", status); 322 err = -EINVAL; 323 goto err_disable; 324 } 325 err = mthca_QUERY_DDR(mdev, &status); 326 if (err) { 327 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n"); 328 goto err_disable; 329 } 330 if (status) { 331 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, " 332 "aborting.\n", status); 333 err = -EINVAL; 334 goto err_disable; 335 } 336 337 err = mthca_dev_lim(mdev, &dev_lim); 338 if (err) { 339 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 340 goto err_disable; 341 } 342 343 profile = hca_profile; 344 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 345 profile.uarc_size = 0; 346 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 347 profile.num_srq = dev_lim.max_srqs; 348 349 err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 350 if (err < 0) 351 goto err_disable; 352 353 err = mthca_INIT_HCA(mdev, &init_hca, &status); 354 if (err) { 355 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 356 goto err_disable; 357 } 358 if (status) { 359 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 360 "aborting.\n", status); 361 err = -EINVAL; 362 goto err_disable; 363 } 364 365 return 0; 366 367err_disable: 368 mthca_SYS_DIS(mdev, &status); 369 370 return err; 371} 372 373static int mthca_load_fw(struct mthca_dev *mdev) 374{ 375 u8 status; 376 int err; 377 378 379 mdev->fw.arbel.fw_icm = 380 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages, 381 GFP_HIGHUSER | __GFP_NOWARN, 0); 382 if (!mdev->fw.arbel.fw_icm) { 383 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n"); 384 return -ENOMEM; 385 } 386 387 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status); 388 if (err) { 389 mthca_err(mdev, "MAP_FA command failed, aborting.\n"); 390 goto err_free; 391 } 392 if (status) { 393 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status); 394 err = -EINVAL; 395 goto err_free; 396 } 397 err = mthca_RUN_FW(mdev, &status); 398 if (err) { 399 mthca_err(mdev, "RUN_FW command failed, aborting.\n"); 400 goto err_unmap_fa; 401 } 402 if (status) { 403 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status); 404 err = -EINVAL; 405 goto err_unmap_fa; 406 } 407 408 return 0; 409 410err_unmap_fa: 411 mthca_UNMAP_FA(mdev, &status); 412 413err_free: 414 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 415 return err; 416} 417 418static int mthca_init_icm(struct mthca_dev *mdev, 419 struct mthca_dev_lim *dev_lim, 420 struct mthca_init_hca_param *init_hca, 421 u64 icm_size) 422{ 423 u64 aux_pages; 424 u8 status; 425 int err; 426 427 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status); 428 if (err) { 429 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n"); 430 return err; 431 } 432 if (status) { 433 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, " 434 "aborting.\n", status); 435 return -EINVAL; 436 } 437 438 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n", 439 (unsigned long long) icm_size >> 10, 440 (unsigned long long) aux_pages << 2); 441 442 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages, 443 GFP_HIGHUSER | __GFP_NOWARN, 0); 444 if (!mdev->fw.arbel.aux_icm) { 445 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n"); 446 return -ENOMEM; 447 } 448 449 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status); 450 if (err) { 451 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n"); 452 goto err_free_aux; 453 } 454 if (status) { 455 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status); 456 err = -EINVAL; 457 goto err_free_aux; 458 } 459 460 err = mthca_map_eq_icm(mdev, init_hca->eqc_base); 461 if (err) { 462 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n"); 463 goto err_unmap_aux; 464 } 465 466 /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */ 467 mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * MTHCA_MTT_SEG_SIZE, 468 dma_get_cache_alignment()) / MTHCA_MTT_SEG_SIZE; 469 470 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base, 471 MTHCA_MTT_SEG_SIZE, 472 mdev->limits.num_mtt_segs, 473 mdev->limits.reserved_mtts, 474 1, 0); 475 if (!mdev->mr_table.mtt_table) { 476 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n"); 477 err = -ENOMEM; 478 goto err_unmap_eq; 479 } 480 481 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base, 482 dev_lim->mpt_entry_sz, 483 mdev->limits.num_mpts, 484 mdev->limits.reserved_mrws, 485 1, 1); 486 if (!mdev->mr_table.mpt_table) { 487 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n"); 488 err = -ENOMEM; 489 goto err_unmap_mtt; 490 } 491 492 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base, 493 dev_lim->qpc_entry_sz, 494 mdev->limits.num_qps, 495 mdev->limits.reserved_qps, 496 0, 0); 497 if (!mdev->qp_table.qp_table) { 498 mthca_err(mdev, "Failed to map QP context memory, aborting.\n"); 499 err = -ENOMEM; 500 goto err_unmap_mpt; 501 } 502 503 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base, 504 dev_lim->eqpc_entry_sz, 505 mdev->limits.num_qps, 506 mdev->limits.reserved_qps, 507 0, 0); 508 if (!mdev->qp_table.eqp_table) { 509 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n"); 510 err = -ENOMEM; 511 goto err_unmap_qp; 512 } 513 514 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base, 515 MTHCA_RDB_ENTRY_SIZE, 516 mdev->limits.num_qps << 517 mdev->qp_table.rdb_shift, 0, 518 0, 0); 519 if (!mdev->qp_table.rdb_table) { 520 mthca_err(mdev, "Failed to map RDB context memory, aborting\n"); 521 err = -ENOMEM; 522 goto err_unmap_eqp; 523 } 524 525 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base, 526 dev_lim->cqc_entry_sz, 527 mdev->limits.num_cqs, 528 mdev->limits.reserved_cqs, 529 0, 0); 530 if (!mdev->cq_table.table) { 531 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n"); 532 err = -ENOMEM; 533 goto err_unmap_rdb; 534 } 535 536 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) { 537 mdev->srq_table.table = 538 mthca_alloc_icm_table(mdev, init_hca->srqc_base, 539 dev_lim->srq_entry_sz, 540 mdev->limits.num_srqs, 541 mdev->limits.reserved_srqs, 542 0, 0); 543 if (!mdev->srq_table.table) { 544 mthca_err(mdev, "Failed to map SRQ context memory, " 545 "aborting.\n"); 546 err = -ENOMEM; 547 goto err_unmap_cq; 548 } 549 } 550 551 /* 552 * It's not strictly required, but for simplicity just map the 553 * whole multicast group table now. The table isn't very big 554 * and it's a lot easier than trying to track ref counts. 555 */ 556 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base, 557 MTHCA_MGM_ENTRY_SIZE, 558 mdev->limits.num_mgms + 559 mdev->limits.num_amgms, 560 mdev->limits.num_mgms + 561 mdev->limits.num_amgms, 562 0, 0); 563 if (!mdev->mcg_table.table) { 564 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n"); 565 err = -ENOMEM; 566 goto err_unmap_srq; 567 } 568 569 return 0; 570 571err_unmap_srq: 572 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 573 mthca_free_icm_table(mdev, mdev->srq_table.table); 574 575err_unmap_cq: 576 mthca_free_icm_table(mdev, mdev->cq_table.table); 577 578err_unmap_rdb: 579 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 580 581err_unmap_eqp: 582 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 583 584err_unmap_qp: 585 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 586 587err_unmap_mpt: 588 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 589 590err_unmap_mtt: 591 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 592 593err_unmap_eq: 594 mthca_unmap_eq_icm(mdev); 595 596err_unmap_aux: 597 mthca_UNMAP_ICM_AUX(mdev, &status); 598 599err_free_aux: 600 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); 601 602 return err; 603} 604 605static void mthca_free_icms(struct mthca_dev *mdev) 606{ 607 u8 status; 608 609 mthca_free_icm_table(mdev, mdev->mcg_table.table); 610 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 611 mthca_free_icm_table(mdev, mdev->srq_table.table); 612 mthca_free_icm_table(mdev, mdev->cq_table.table); 613 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 614 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 615 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 616 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 617 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 618 mthca_unmap_eq_icm(mdev); 619 620 mthca_UNMAP_ICM_AUX(mdev, &status); 621 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); 622} 623 624static int mthca_init_arbel(struct mthca_dev *mdev) 625{ 626 struct mthca_dev_lim dev_lim; 627 struct mthca_profile profile; 628 struct mthca_init_hca_param init_hca; 629 u64 icm_size; 630 u8 status; 631 int err; 632 633 err = mthca_QUERY_FW(mdev, &status); 634 if (err) { 635 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 636 return err; 637 } 638 if (status) { 639 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 640 "aborting.\n", status); 641 return -EINVAL; 642 } 643 644 err = mthca_ENABLE_LAM(mdev, &status); 645 if (err) { 646 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n"); 647 return err; 648 } 649 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) { 650 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n"); 651 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM; 652 } else if (status) { 653 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, " 654 "aborting.\n", status); 655 return -EINVAL; 656 } 657 658 err = mthca_load_fw(mdev); 659 if (err) { 660 mthca_err(mdev, "Failed to start FW, aborting.\n"); 661 goto err_disable; 662 } 663 664 err = mthca_dev_lim(mdev, &dev_lim); 665 if (err) { 666 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 667 goto err_stop_fw; 668 } 669 670 profile = hca_profile; 671 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 672 profile.num_udav = 0; 673 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 674 profile.num_srq = dev_lim.max_srqs; 675 676 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 677 if ((int) icm_size < 0) { 678 err = icm_size; 679 goto err_stop_fw; 680 } 681 682 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size); 683 if (err) 684 goto err_stop_fw; 685 686 err = mthca_INIT_HCA(mdev, &init_hca, &status); 687 if (err) { 688 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 689 goto err_free_icm; 690 } 691 if (status) { 692 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 693 "aborting.\n", status); 694 err = -EINVAL; 695 goto err_free_icm; 696 } 697 698 return 0; 699 700err_free_icm: 701 mthca_free_icms(mdev); 702 703err_stop_fw: 704 mthca_UNMAP_FA(mdev, &status); 705 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 706 707err_disable: 708 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 709 mthca_DISABLE_LAM(mdev, &status); 710 711 return err; 712} 713 714static void mthca_close_hca(struct mthca_dev *mdev) 715{ 716 u8 status; 717 718 mthca_CLOSE_HCA(mdev, 0, &status); 719 720 if (mthca_is_memfree(mdev)) { 721 mthca_free_icms(mdev); 722 723 mthca_UNMAP_FA(mdev, &status); 724 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 725 726 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 727 mthca_DISABLE_LAM(mdev, &status); 728 } else 729 mthca_SYS_DIS(mdev, &status); 730} 731 732static int mthca_init_hca(struct mthca_dev *mdev) 733{ 734 u8 status; 735 int err; 736 struct mthca_adapter adapter; 737 738 if (mthca_is_memfree(mdev)) 739 err = mthca_init_arbel(mdev); 740 else 741 err = mthca_init_tavor(mdev); 742 743 if (err) 744 return err; 745 746 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status); 747 if (err) { 748 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n"); 749 goto err_close; 750 } 751 if (status) { 752 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, " 753 "aborting.\n", status); 754 err = -EINVAL; 755 goto err_close; 756 } 757 758 mdev->eq_table.inta_pin = adapter.inta_pin; 759 mdev->rev_id = adapter.revision_id; 760 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id); 761 762 return 0; 763 764err_close: 765 mthca_close_hca(mdev); 766 return err; 767} 768 769static int mthca_setup_hca(struct mthca_dev *dev) 770{ 771 int err; 772 u8 status; 773 774 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock); 775 776 err = mthca_init_uar_table(dev); 777 if (err) { 778 mthca_err(dev, "Failed to initialize " 779 "user access region table, aborting.\n"); 780 return err; 781 } 782 783 err = mthca_uar_alloc(dev, &dev->driver_uar); 784 if (err) { 785 mthca_err(dev, "Failed to allocate driver access region, " 786 "aborting.\n"); 787 goto err_uar_table_free; 788 } 789 790 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); 791 if (!dev->kar) { 792 mthca_err(dev, "Couldn't map kernel access region, " 793 "aborting.\n"); 794 err = -ENOMEM; 795 goto err_uar_free; 796 } 797 798 err = mthca_init_pd_table(dev); 799 if (err) { 800 mthca_err(dev, "Failed to initialize " 801 "protection domain table, aborting.\n"); 802 goto err_kar_unmap; 803 } 804 805 err = mthca_init_mr_table(dev); 806 if (err) { 807 mthca_err(dev, "Failed to initialize " 808 "memory region table, aborting.\n"); 809 goto err_pd_table_free; 810 } 811 812 err = mthca_pd_alloc(dev, 1, &dev->driver_pd); 813 if (err) { 814 mthca_err(dev, "Failed to create driver PD, " 815 "aborting.\n"); 816 goto err_mr_table_free; 817 } 818 819 err = mthca_init_eq_table(dev); 820 if (err) { 821 mthca_err(dev, "Failed to initialize " 822 "event queue table, aborting.\n"); 823 goto err_pd_free; 824 } 825 826 err = mthca_cmd_use_events(dev); 827 if (err) { 828 mthca_err(dev, "Failed to switch to event-driven " 829 "firmware commands, aborting.\n"); 830 goto err_eq_table_free; 831 } 832 833 err = mthca_NOP(dev, &status); 834 if (err || status) { 835 mthca_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting.\n", 836 dev->mthca_flags & MTHCA_FLAG_MSI_X ? 837 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector : 838 dev->pdev->irq); 839 if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X)) 840 mthca_err(dev, "Try again with MSI/MSI-X disabled.\n"); 841 else 842 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n"); 843 844 goto err_cmd_poll; 845 } 846 847 mthca_dbg(dev, "NOP command IRQ test passed\n"); 848 849 err = mthca_init_cq_table(dev); 850 if (err) { 851 mthca_err(dev, "Failed to initialize " 852 "completion queue table, aborting.\n"); 853 goto err_cmd_poll; 854 } 855 856 err = mthca_init_srq_table(dev); 857 if (err) { 858 mthca_err(dev, "Failed to initialize " 859 "shared receive queue table, aborting.\n"); 860 goto err_cq_table_free; 861 } 862 863 err = mthca_init_qp_table(dev); 864 if (err) { 865 mthca_err(dev, "Failed to initialize " 866 "queue pair table, aborting.\n"); 867 goto err_srq_table_free; 868 } 869 870 err = mthca_init_av_table(dev); 871 if (err) { 872 mthca_err(dev, "Failed to initialize " 873 "address vector table, aborting.\n"); 874 goto err_qp_table_free; 875 } 876 877 err = mthca_init_mcg_table(dev); 878 if (err) { 879 mthca_err(dev, "Failed to initialize " 880 "multicast group table, aborting.\n"); 881 goto err_av_table_free; 882 } 883 884 return 0; 885 886err_av_table_free: 887 mthca_cleanup_av_table(dev); 888 889err_qp_table_free: 890 mthca_cleanup_qp_table(dev); 891 892err_srq_table_free: 893 mthca_cleanup_srq_table(dev); 894 895err_cq_table_free: 896 mthca_cleanup_cq_table(dev); 897 898err_cmd_poll: 899 mthca_cmd_use_polling(dev); 900 901err_eq_table_free: 902 mthca_cleanup_eq_table(dev); 903 904err_pd_free: 905 mthca_pd_free(dev, &dev->driver_pd); 906 907err_mr_table_free: 908 mthca_cleanup_mr_table(dev); 909 910err_pd_table_free: 911 mthca_cleanup_pd_table(dev); 912 913err_kar_unmap: 914 iounmap(dev->kar); 915 916err_uar_free: 917 mthca_uar_free(dev, &dev->driver_uar); 918 919err_uar_table_free: 920 mthca_cleanup_uar_table(dev); 921 return err; 922} 923 924static int mthca_request_regions(struct pci_dev *pdev, int ddr_hidden) 925{ 926 int err; 927 928 /* 929 * We can't just use pci_request_regions() because the MSI-X 930 * table is right in the middle of the first BAR. If we did 931 * pci_request_region and grab all of the first BAR, then 932 * setting up MSI-X would fail, since the PCI core wants to do 933 * request_mem_region on the MSI-X vector table. 934 * 935 * So just request what we need right now, and request any 936 * other regions we need when setting up EQs. 937 */ 938 if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 939 MTHCA_HCR_SIZE, DRV_NAME)) 940 return -EBUSY; 941 942 err = pci_request_region(pdev, 2, DRV_NAME); 943 if (err) 944 goto err_bar2_failed; 945 946 if (!ddr_hidden) { 947 err = pci_request_region(pdev, 4, DRV_NAME); 948 if (err) 949 goto err_bar4_failed; 950 } 951 952 return 0; 953 954err_bar4_failed: 955 pci_release_region(pdev, 2); 956 957err_bar2_failed: 958 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 959 MTHCA_HCR_SIZE); 960 961 return err; 962} 963 964static void mthca_release_regions(struct pci_dev *pdev, 965 int ddr_hidden) 966{ 967 if (!ddr_hidden) 968 pci_release_region(pdev, 4); 969 970 pci_release_region(pdev, 2); 971 972 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 973 MTHCA_HCR_SIZE); 974} 975 976static int mthca_enable_msi_x(struct mthca_dev *mdev) 977{ 978 struct msix_entry entries[3]; 979 int err; 980 981 entries[0].entry = 0; 982 entries[1].entry = 1; 983 entries[2].entry = 2; 984 985 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries)); 986 if (err) { 987 if (err > 0) 988 mthca_info(mdev, "Only %d MSI-X vectors available, " 989 "not using MSI-X\n", err); 990 return err; 991 } 992 993 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector; 994 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector; 995 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector; 996 997 return 0; 998} 999 1000/* Types of supported HCA */ 1001enum { 1002 TAVOR, /* MT23108 */ 1003 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */ 1004 ARBEL_NATIVE, /* MT25208 with extended features */ 1005 SINAI /* MT25204 */ 1006}; 1007 1008#define MTHCA_FW_VER(major, minor, subminor) \ 1009 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor)) 1010 1011static struct { 1012 u64 latest_fw; 1013 u32 flags; 1014} mthca_hca_table[] = { 1015 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 5, 0), 1016 .flags = 0 }, 1017 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 8, 200), 1018 .flags = MTHCA_FLAG_PCIE }, 1019 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 2, 0), 1020 .flags = MTHCA_FLAG_MEMFREE | 1021 MTHCA_FLAG_PCIE }, 1022 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 2, 0), 1023 .flags = MTHCA_FLAG_MEMFREE | 1024 MTHCA_FLAG_PCIE | 1025 MTHCA_FLAG_SINAI_OPT } 1026}; 1027 1028static int __mthca_init_one(struct pci_dev *pdev, int hca_type) 1029{ 1030 int ddr_hidden = 0; 1031 int err; 1032 struct mthca_dev *mdev; 1033 1034 printk(KERN_INFO PFX "Initializing %s\n", 1035 pci_name(pdev)); 1036 1037 err = pci_enable_device(pdev); 1038 if (err) { 1039 dev_err(&pdev->dev, "Cannot enable PCI device, " 1040 "aborting.\n"); 1041 return err; 1042 } 1043 1044 /* 1045 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not 1046 * be present) 1047 */ 1048 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) || 1049 pci_resource_len(pdev, 0) != 1 << 20) { 1050 dev_err(&pdev->dev, "Missing DCS, aborting.\n"); 1051 err = -ENODEV; 1052 goto err_disable_pdev; 1053 } 1054 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) { 1055 dev_err(&pdev->dev, "Missing UAR, aborting.\n"); 1056 err = -ENODEV; 1057 goto err_disable_pdev; 1058 } 1059 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM)) 1060 ddr_hidden = 1; 1061 1062 err = mthca_request_regions(pdev, ddr_hidden); 1063 if (err) { 1064 dev_err(&pdev->dev, "Cannot obtain PCI resources, " 1065 "aborting.\n"); 1066 goto err_disable_pdev; 1067 } 1068 1069 pci_set_master(pdev); 1070 1071 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); 1072 if (err) { 1073 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n"); 1074 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); 1075 if (err) { 1076 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n"); 1077 goto err_free_res; 1078 } 1079 } 1080 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); 1081 if (err) { 1082 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit " 1083 "consistent PCI DMA mask.\n"); 1084 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); 1085 if (err) { 1086 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, " 1087 "aborting.\n"); 1088 goto err_free_res; 1089 } 1090 } 1091 1092 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev); 1093 if (!mdev) { 1094 dev_err(&pdev->dev, "Device struct alloc failed, " 1095 "aborting.\n"); 1096 err = -ENOMEM; 1097 goto err_free_res; 1098 } 1099 1100 mdev->pdev = pdev; 1101 1102 mdev->mthca_flags = mthca_hca_table[hca_type].flags; 1103 if (ddr_hidden) 1104 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN; 1105 1106 /* 1107 * Now reset the HCA before we touch the PCI capabilities or 1108 * attempt a firmware command, since a boot ROM may have left 1109 * the HCA in an undefined state. 1110 */ 1111 err = mthca_reset(mdev); 1112 if (err) { 1113 mthca_err(mdev, "Failed to reset HCA, aborting.\n"); 1114 goto err_free_dev; 1115 } 1116 1117 if (msi_x && !mthca_enable_msi_x(mdev)) 1118 mdev->mthca_flags |= MTHCA_FLAG_MSI_X; 1119 if (msi && !(mdev->mthca_flags & MTHCA_FLAG_MSI_X) && 1120 !pci_enable_msi(pdev)) 1121 mdev->mthca_flags |= MTHCA_FLAG_MSI; 1122 1123 if (mthca_cmd_init(mdev)) { 1124 mthca_err(mdev, "Failed to init command interface, aborting.\n"); 1125 goto err_free_dev; 1126 } 1127 1128 err = mthca_tune_pci(mdev); 1129 if (err) 1130 goto err_cmd; 1131 1132 err = mthca_init_hca(mdev); 1133 if (err) 1134 goto err_cmd; 1135 1136 if (mdev->fw_ver < mthca_hca_table[hca_type].latest_fw) { 1137 mthca_warn(mdev, "HCA FW version %d.%d.%3d is old (%d.%d.%3d is current).\n", 1138 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff, 1139 (int) (mdev->fw_ver & 0xffff), 1140 (int) (mthca_hca_table[hca_type].latest_fw >> 32), 1141 (int) (mthca_hca_table[hca_type].latest_fw >> 16) & 0xffff, 1142 (int) (mthca_hca_table[hca_type].latest_fw & 0xffff)); 1143 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n"); 1144 } 1145 1146 err = mthca_setup_hca(mdev); 1147 if (err) 1148 goto err_close; 1149 1150 err = mthca_register_device(mdev); 1151 if (err) 1152 goto err_cleanup; 1153 1154 err = mthca_create_agents(mdev); 1155 if (err) 1156 goto err_unregister; 1157 1158 pci_set_drvdata(pdev, mdev); 1159 mdev->hca_type = hca_type; 1160 1161 return 0; 1162 1163err_unregister: 1164 mthca_unregister_device(mdev); 1165 1166err_cleanup: 1167 mthca_cleanup_mcg_table(mdev); 1168 mthca_cleanup_av_table(mdev); 1169 mthca_cleanup_qp_table(mdev); 1170 mthca_cleanup_srq_table(mdev); 1171 mthca_cleanup_cq_table(mdev); 1172 mthca_cmd_use_polling(mdev); 1173 mthca_cleanup_eq_table(mdev); 1174 1175 mthca_pd_free(mdev, &mdev->driver_pd); 1176 1177 mthca_cleanup_mr_table(mdev); 1178 mthca_cleanup_pd_table(mdev); 1179 mthca_cleanup_uar_table(mdev); 1180 1181err_close: 1182 mthca_close_hca(mdev); 1183 1184err_cmd: 1185 mthca_cmd_cleanup(mdev); 1186 1187err_free_dev: 1188 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1189 pci_disable_msix(pdev); 1190 if (mdev->mthca_flags & MTHCA_FLAG_MSI) 1191 pci_disable_msi(pdev); 1192 1193 ib_dealloc_device(&mdev->ib_dev); 1194 1195err_free_res: 1196 mthca_release_regions(pdev, ddr_hidden); 1197 1198err_disable_pdev: 1199 pci_disable_device(pdev); 1200 pci_set_drvdata(pdev, NULL); 1201 return err; 1202} 1203 1204static void __mthca_remove_one(struct pci_dev *pdev) 1205{ 1206 struct mthca_dev *mdev = pci_get_drvdata(pdev); 1207 u8 status; 1208 int p; 1209 1210 if (mdev) { 1211 mthca_free_agents(mdev); 1212 mthca_unregister_device(mdev); 1213 1214 for (p = 1; p <= mdev->limits.num_ports; ++p) 1215 mthca_CLOSE_IB(mdev, p, &status); 1216 1217 mthca_cleanup_mcg_table(mdev); 1218 mthca_cleanup_av_table(mdev); 1219 mthca_cleanup_qp_table(mdev); 1220 mthca_cleanup_srq_table(mdev); 1221 mthca_cleanup_cq_table(mdev); 1222 mthca_cmd_use_polling(mdev); 1223 mthca_cleanup_eq_table(mdev); 1224 1225 mthca_pd_free(mdev, &mdev->driver_pd); 1226 1227 mthca_cleanup_mr_table(mdev); 1228 mthca_cleanup_pd_table(mdev); 1229 1230 iounmap(mdev->kar); 1231 mthca_uar_free(mdev, &mdev->driver_uar); 1232 mthca_cleanup_uar_table(mdev); 1233 mthca_close_hca(mdev); 1234 mthca_cmd_cleanup(mdev); 1235 1236 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1237 pci_disable_msix(pdev); 1238 if (mdev->mthca_flags & MTHCA_FLAG_MSI) 1239 pci_disable_msi(pdev); 1240 1241 ib_dealloc_device(&mdev->ib_dev); 1242 mthca_release_regions(pdev, mdev->mthca_flags & 1243 MTHCA_FLAG_DDR_HIDDEN); 1244 pci_disable_device(pdev); 1245 pci_set_drvdata(pdev, NULL); 1246 } 1247} 1248 1249int __mthca_restart_one(struct pci_dev *pdev) 1250{ 1251 struct mthca_dev *mdev; 1252 int hca_type; 1253 1254 mdev = pci_get_drvdata(pdev); 1255 if (!mdev) 1256 return -ENODEV; 1257 hca_type = mdev->hca_type; 1258 __mthca_remove_one(pdev); 1259 return __mthca_init_one(pdev, hca_type); 1260} 1261 1262static int __devinit mthca_init_one(struct pci_dev *pdev, 1263 const struct pci_device_id *id) 1264{ 1265 static int mthca_version_printed = 0; 1266 int ret; 1267 1268 mutex_lock(&mthca_device_mutex); 1269 1270 if (!mthca_version_printed) { 1271 printk(KERN_INFO "%s", mthca_version); 1272 ++mthca_version_printed; 1273 } 1274 1275 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) { 1276 printk(KERN_ERR PFX "%s has invalid driver data %lx\n", 1277 pci_name(pdev), id->driver_data); 1278 mutex_unlock(&mthca_device_mutex); 1279 return -ENODEV; 1280 } 1281 1282 ret = __mthca_init_one(pdev, id->driver_data); 1283 1284 mutex_unlock(&mthca_device_mutex); 1285 1286 return ret; 1287} 1288 1289static void __devexit mthca_remove_one(struct pci_dev *pdev) 1290{ 1291 mutex_lock(&mthca_device_mutex); 1292 __mthca_remove_one(pdev); 1293 mutex_unlock(&mthca_device_mutex); 1294} 1295 1296static struct pci_device_id mthca_pci_table[] = { 1297 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR), 1298 .driver_data = TAVOR }, 1299 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR), 1300 .driver_data = TAVOR }, 1301 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1302 .driver_data = ARBEL_COMPAT }, 1303 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1304 .driver_data = ARBEL_COMPAT }, 1305 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL), 1306 .driver_data = ARBEL_NATIVE }, 1307 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL), 1308 .driver_data = ARBEL_NATIVE }, 1309 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI), 1310 .driver_data = SINAI }, 1311 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI), 1312 .driver_data = SINAI }, 1313 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1314 .driver_data = SINAI }, 1315 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1316 .driver_data = SINAI }, 1317 { 0, } 1318}; 1319 1320MODULE_DEVICE_TABLE(pci, mthca_pci_table); 1321 1322static struct pci_driver mthca_driver = { 1323 .name = DRV_NAME, 1324 .id_table = mthca_pci_table, 1325 .probe = mthca_init_one, 1326 .remove = __devexit_p(mthca_remove_one) 1327}; 1328 1329static void __init __mthca_check_profile_val(const char *name, int *pval, 1330 int pval_default) 1331{ 1332 /* value must be positive and power of 2 */ 1333 int old_pval = *pval; 1334 1335 if (old_pval <= 0) 1336 *pval = pval_default; 1337 else 1338 *pval = roundup_pow_of_two(old_pval); 1339 1340 if (old_pval != *pval) { 1341 printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n", 1342 old_pval, name); 1343 printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval); 1344 } 1345} 1346 1347#define mthca_check_profile_val(name, default) \ 1348 __mthca_check_profile_val(#name, &hca_profile.name, default) 1349 1350static void __init mthca_validate_profile(void) 1351{ 1352 mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP); 1353 mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP); 1354 mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ); 1355 mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG); 1356 mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT); 1357 mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT); 1358 mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV); 1359 mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS); 1360 1361 if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) { 1362 printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n", 1363 hca_profile.fmr_reserved_mtts); 1364 printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n", 1365 hca_profile.num_mtt); 1366 hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2; 1367 printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n", 1368 hca_profile.fmr_reserved_mtts); 1369 } 1370} 1371 1372static int __init mthca_init(void) 1373{ 1374 int ret; 1375 1376 mthca_validate_profile(); 1377 1378 ret = mthca_catas_init(); 1379 if (ret) 1380 return ret; 1381 1382 ret = pci_register_driver(&mthca_driver); 1383 if (ret < 0) { 1384 mthca_catas_cleanup(); 1385 return ret; 1386 } 1387 1388 return 0; 1389} 1390 1391static void __exit mthca_cleanup(void) 1392{ 1393 pci_unregister_driver(&mthca_driver); 1394 mthca_catas_cleanup(); 1395} 1396 1397module_init(mthca_init); 1398module_exit(mthca_cleanup); 1399