1/* 2 * linux/drivers/ide/ide-iops.c Version 0.37 Mar 05, 2003 3 * 4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 5 * Copyright (C) 2003 Red Hat <alan@redhat.com> 6 * 7 */ 8 9#include <linux/module.h> 10#include <linux/types.h> 11#include <linux/string.h> 12#include <linux/kernel.h> 13#include <linux/timer.h> 14#include <linux/mm.h> 15#include <linux/interrupt.h> 16#include <linux/major.h> 17#include <linux/errno.h> 18#include <linux/genhd.h> 19#include <linux/blkpg.h> 20#include <linux/slab.h> 21#include <linux/pci.h> 22#include <linux/delay.h> 23#include <linux/hdreg.h> 24#include <linux/ide.h> 25#include <linux/bitops.h> 26#include <linux/nmi.h> 27 28#include <asm/byteorder.h> 29#include <asm/irq.h> 30#include <asm/uaccess.h> 31#include <asm/io.h> 32 33/* 34 * Conventional PIO operations for ATA devices 35 */ 36 37static u8 ide_inb (unsigned long port) 38{ 39 return (u8) inb(port); 40} 41 42static u16 ide_inw (unsigned long port) 43{ 44 return (u16) inw(port); 45} 46 47static void ide_insw (unsigned long port, void *addr, u32 count) 48{ 49 insw(port, addr, count); 50} 51 52static void ide_insl (unsigned long port, void *addr, u32 count) 53{ 54 insl(port, addr, count); 55} 56 57static void ide_outb (u8 val, unsigned long port) 58{ 59 outb(val, port); 60} 61 62static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port) 63{ 64 outb(addr, port); 65} 66 67static void ide_outw (u16 val, unsigned long port) 68{ 69 outw(val, port); 70} 71 72static void ide_outsw (unsigned long port, void *addr, u32 count) 73{ 74 outsw(port, addr, count); 75} 76 77static void ide_outsl (unsigned long port, void *addr, u32 count) 78{ 79 outsl(port, addr, count); 80} 81 82void default_hwif_iops (ide_hwif_t *hwif) 83{ 84 hwif->OUTB = ide_outb; 85 hwif->OUTBSYNC = ide_outbsync; 86 hwif->OUTW = ide_outw; 87 hwif->OUTSW = ide_outsw; 88 hwif->OUTSL = ide_outsl; 89 hwif->INB = ide_inb; 90 hwif->INW = ide_inw; 91 hwif->INSW = ide_insw; 92 hwif->INSL = ide_insl; 93} 94 95/* 96 * MMIO operations, typically used for SATA controllers 97 */ 98 99static u8 ide_mm_inb (unsigned long port) 100{ 101 return (u8) readb((void __iomem *) port); 102} 103 104static u16 ide_mm_inw (unsigned long port) 105{ 106 return (u16) readw((void __iomem *) port); 107} 108 109static void ide_mm_insw (unsigned long port, void *addr, u32 count) 110{ 111 __ide_mm_insw((void __iomem *) port, addr, count); 112} 113 114static void ide_mm_insl (unsigned long port, void *addr, u32 count) 115{ 116 __ide_mm_insl((void __iomem *) port, addr, count); 117} 118 119static void ide_mm_outb (u8 value, unsigned long port) 120{ 121 writeb(value, (void __iomem *) port); 122} 123 124static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port) 125{ 126 writeb(value, (void __iomem *) port); 127} 128 129static void ide_mm_outw (u16 value, unsigned long port) 130{ 131 writew(value, (void __iomem *) port); 132} 133 134static void ide_mm_outsw (unsigned long port, void *addr, u32 count) 135{ 136 __ide_mm_outsw((void __iomem *) port, addr, count); 137} 138 139static void ide_mm_outsl (unsigned long port, void *addr, u32 count) 140{ 141 __ide_mm_outsl((void __iomem *) port, addr, count); 142} 143 144void default_hwif_mmiops (ide_hwif_t *hwif) 145{ 146 hwif->OUTB = ide_mm_outb; 147 /* Most systems will need to override OUTBSYNC, alas however 148 this one is controller specific! */ 149 hwif->OUTBSYNC = ide_mm_outbsync; 150 hwif->OUTW = ide_mm_outw; 151 hwif->OUTSW = ide_mm_outsw; 152 hwif->OUTSL = ide_mm_outsl; 153 hwif->INB = ide_mm_inb; 154 hwif->INW = ide_mm_inw; 155 hwif->INSW = ide_mm_insw; 156 hwif->INSL = ide_mm_insl; 157} 158 159EXPORT_SYMBOL(default_hwif_mmiops); 160 161u32 ide_read_24 (ide_drive_t *drive) 162{ 163 u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG); 164 u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG); 165 u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG); 166 return (hcyl<<16)|(lcyl<<8)|sect; 167} 168 169void SELECT_DRIVE (ide_drive_t *drive) 170{ 171 if (HWIF(drive)->selectproc) 172 HWIF(drive)->selectproc(drive); 173 HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG); 174} 175 176EXPORT_SYMBOL(SELECT_DRIVE); 177 178void SELECT_INTERRUPT (ide_drive_t *drive) 179{ 180 if (HWIF(drive)->intrproc) 181 HWIF(drive)->intrproc(drive); 182 else 183 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG); 184} 185 186void SELECT_MASK (ide_drive_t *drive, int mask) 187{ 188 if (HWIF(drive)->maskproc) 189 HWIF(drive)->maskproc(drive, mask); 190} 191 192void QUIRK_LIST (ide_drive_t *drive) 193{ 194 if (HWIF(drive)->quirkproc) 195 drive->quirk_list = HWIF(drive)->quirkproc(drive); 196} 197 198/* 199 * Some localbus EIDE interfaces require a special access sequence 200 * when using 32-bit I/O instructions to transfer data. We call this 201 * the "vlb_sync" sequence, which consists of three successive reads 202 * of the sector count register location, with interrupts disabled 203 * to ensure that the reads all happen together. 204 */ 205static void ata_vlb_sync(ide_drive_t *drive, unsigned long port) 206{ 207 (void) HWIF(drive)->INB(port); 208 (void) HWIF(drive)->INB(port); 209 (void) HWIF(drive)->INB(port); 210} 211 212/* 213 * This is used for most PIO data transfers *from* the IDE interface 214 */ 215static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount) 216{ 217 ide_hwif_t *hwif = HWIF(drive); 218 u8 io_32bit = drive->io_32bit; 219 220 if (io_32bit) { 221 if (io_32bit & 2) { 222 unsigned long flags; 223 local_irq_save(flags); 224 ata_vlb_sync(drive, IDE_NSECTOR_REG); 225 hwif->INSL(IDE_DATA_REG, buffer, wcount); 226 local_irq_restore(flags); 227 } else 228 hwif->INSL(IDE_DATA_REG, buffer, wcount); 229 } else { 230 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1); 231 } 232} 233 234/* 235 * This is used for most PIO data transfers *to* the IDE interface 236 */ 237static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount) 238{ 239 ide_hwif_t *hwif = HWIF(drive); 240 u8 io_32bit = drive->io_32bit; 241 242 if (io_32bit) { 243 if (io_32bit & 2) { 244 unsigned long flags; 245 local_irq_save(flags); 246 ata_vlb_sync(drive, IDE_NSECTOR_REG); 247 hwif->OUTSL(IDE_DATA_REG, buffer, wcount); 248 local_irq_restore(flags); 249 } else 250 hwif->OUTSL(IDE_DATA_REG, buffer, wcount); 251 } else { 252 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1); 253 } 254} 255 256/* 257 * The following routines are mainly used by the ATAPI drivers. 258 * 259 * These routines will round up any request for an odd number of bytes, 260 * so if an odd bytecount is specified, be sure that there's at least one 261 * extra byte allocated for the buffer. 262 */ 263 264static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) 265{ 266 ide_hwif_t *hwif = HWIF(drive); 267 268 ++bytecount; 269#if defined(CONFIG_ATARI) || defined(CONFIG_Q40) 270 if (MACH_IS_ATARI || MACH_IS_Q40) { 271 /* Atari has a byte-swapped IDE interface */ 272 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2); 273 return; 274 } 275#endif /* CONFIG_ATARI || CONFIG_Q40 */ 276 hwif->ata_input_data(drive, buffer, bytecount / 4); 277 if ((bytecount & 0x03) >= 2) 278 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1); 279} 280 281static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) 282{ 283 ide_hwif_t *hwif = HWIF(drive); 284 285 ++bytecount; 286#if defined(CONFIG_ATARI) || defined(CONFIG_Q40) 287 if (MACH_IS_ATARI || MACH_IS_Q40) { 288 /* Atari has a byte-swapped IDE interface */ 289 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2); 290 return; 291 } 292#endif /* CONFIG_ATARI || CONFIG_Q40 */ 293 hwif->ata_output_data(drive, buffer, bytecount / 4); 294 if ((bytecount & 0x03) >= 2) 295 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1); 296} 297 298void default_hwif_transport(ide_hwif_t *hwif) 299{ 300 hwif->ata_input_data = ata_input_data; 301 hwif->ata_output_data = ata_output_data; 302 hwif->atapi_input_bytes = atapi_input_bytes; 303 hwif->atapi_output_bytes = atapi_output_bytes; 304} 305 306/* 307 * Beginning of Taskfile OPCODE Library and feature sets. 308 */ 309void ide_fix_driveid (struct hd_driveid *id) 310{ 311#ifndef __LITTLE_ENDIAN 312# ifdef __BIG_ENDIAN 313 int i; 314 u16 *stringcast; 315 316 id->config = __le16_to_cpu(id->config); 317 id->cyls = __le16_to_cpu(id->cyls); 318 id->reserved2 = __le16_to_cpu(id->reserved2); 319 id->heads = __le16_to_cpu(id->heads); 320 id->track_bytes = __le16_to_cpu(id->track_bytes); 321 id->sector_bytes = __le16_to_cpu(id->sector_bytes); 322 id->sectors = __le16_to_cpu(id->sectors); 323 id->vendor0 = __le16_to_cpu(id->vendor0); 324 id->vendor1 = __le16_to_cpu(id->vendor1); 325 id->vendor2 = __le16_to_cpu(id->vendor2); 326 stringcast = (u16 *)&id->serial_no[0]; 327 for (i = 0; i < (20/2); i++) 328 stringcast[i] = __le16_to_cpu(stringcast[i]); 329 id->buf_type = __le16_to_cpu(id->buf_type); 330 id->buf_size = __le16_to_cpu(id->buf_size); 331 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes); 332 stringcast = (u16 *)&id->fw_rev[0]; 333 for (i = 0; i < (8/2); i++) 334 stringcast[i] = __le16_to_cpu(stringcast[i]); 335 stringcast = (u16 *)&id->model[0]; 336 for (i = 0; i < (40/2); i++) 337 stringcast[i] = __le16_to_cpu(stringcast[i]); 338 id->dword_io = __le16_to_cpu(id->dword_io); 339 id->reserved50 = __le16_to_cpu(id->reserved50); 340 id->field_valid = __le16_to_cpu(id->field_valid); 341 id->cur_cyls = __le16_to_cpu(id->cur_cyls); 342 id->cur_heads = __le16_to_cpu(id->cur_heads); 343 id->cur_sectors = __le16_to_cpu(id->cur_sectors); 344 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0); 345 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1); 346 id->lba_capacity = __le32_to_cpu(id->lba_capacity); 347 id->dma_1word = __le16_to_cpu(id->dma_1word); 348 id->dma_mword = __le16_to_cpu(id->dma_mword); 349 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes); 350 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min); 351 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time); 352 id->eide_pio = __le16_to_cpu(id->eide_pio); 353 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy); 354 for (i = 0; i < 2; ++i) 355 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]); 356 for (i = 0; i < 4; ++i) 357 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]); 358 id->queue_depth = __le16_to_cpu(id->queue_depth); 359 for (i = 0; i < 4; ++i) 360 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]); 361 id->major_rev_num = __le16_to_cpu(id->major_rev_num); 362 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num); 363 id->command_set_1 = __le16_to_cpu(id->command_set_1); 364 id->command_set_2 = __le16_to_cpu(id->command_set_2); 365 id->cfsse = __le16_to_cpu(id->cfsse); 366 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1); 367 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2); 368 id->csf_default = __le16_to_cpu(id->csf_default); 369 id->dma_ultra = __le16_to_cpu(id->dma_ultra); 370 id->trseuc = __le16_to_cpu(id->trseuc); 371 id->trsEuc = __le16_to_cpu(id->trsEuc); 372 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues); 373 id->mprc = __le16_to_cpu(id->mprc); 374 id->hw_config = __le16_to_cpu(id->hw_config); 375 id->acoustic = __le16_to_cpu(id->acoustic); 376 id->msrqs = __le16_to_cpu(id->msrqs); 377 id->sxfert = __le16_to_cpu(id->sxfert); 378 id->sal = __le16_to_cpu(id->sal); 379 id->spg = __le32_to_cpu(id->spg); 380 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2); 381 for (i = 0; i < 22; i++) 382 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]); 383 id->last_lun = __le16_to_cpu(id->last_lun); 384 id->word127 = __le16_to_cpu(id->word127); 385 id->dlf = __le16_to_cpu(id->dlf); 386 id->csfo = __le16_to_cpu(id->csfo); 387 for (i = 0; i < 26; i++) 388 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]); 389 id->word156 = __le16_to_cpu(id->word156); 390 for (i = 0; i < 3; i++) 391 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]); 392 id->cfa_power = __le16_to_cpu(id->cfa_power); 393 for (i = 0; i < 14; i++) 394 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]); 395 for (i = 0; i < 31; i++) 396 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]); 397 for (i = 0; i < 48; i++) 398 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]); 399 id->integrity_word = __le16_to_cpu(id->integrity_word); 400# else 401# error "Please fix <asm/byteorder.h>" 402# endif 403#endif 404} 405 406EXPORT_SYMBOL(ide_fix_driveid); 407 408void ide_fixstring (u8 *s, const int bytecount, const int byteswap) 409{ 410 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */ 411 412 if (byteswap) { 413 /* convert from big-endian to host byte order */ 414 for (p = end ; p != s;) { 415 unsigned short *pp = (unsigned short *) (p -= 2); 416 *pp = ntohs(*pp); 417 } 418 } 419 /* strip leading blanks */ 420 while (s != end && *s == ' ') 421 ++s; 422 /* compress internal blanks and strip trailing blanks */ 423 while (s != end && *s) { 424 if (*s++ != ' ' || (s != end && *s && *s != ' ')) 425 *p++ = *(s-1); 426 } 427 /* wipe out trailing garbage */ 428 while (p != end) 429 *p++ = '\0'; 430} 431 432EXPORT_SYMBOL(ide_fixstring); 433 434/* 435 * Needed for PCI irq sharing 436 */ 437int drive_is_ready (ide_drive_t *drive) 438{ 439 ide_hwif_t *hwif = HWIF(drive); 440 u8 stat = 0; 441 442 if (drive->waiting_for_dma) 443 return hwif->ide_dma_test_irq(drive); 444 445 446#ifdef CONFIG_IDEPCI_SHARE_IRQ 447 /* 448 * We do a passive status test under shared PCI interrupts on 449 * cards that truly share the ATA side interrupt, but may also share 450 * an interrupt with another pci card/device. We make no assumptions 451 * about possible isa-pnp and pci-pnp issues yet. 452 */ 453 if (IDE_CONTROL_REG) 454 stat = hwif->INB(IDE_ALTSTATUS_REG); 455 else 456#endif /* CONFIG_IDEPCI_SHARE_IRQ */ 457 /* Note: this may clear a pending IRQ!! */ 458 stat = hwif->INB(IDE_STATUS_REG); 459 460 if (stat & BUSY_STAT) 461 /* drive busy: definitely not interrupting */ 462 return 0; 463 464 /* drive ready: *might* be interrupting */ 465 return 1; 466} 467 468EXPORT_SYMBOL(drive_is_ready); 469 470/* 471 * Global for All, and taken from ide-pmac.c. Can be called 472 * with spinlock held & IRQs disabled, so don't schedule ! 473 */ 474int wait_for_ready (ide_drive_t *drive, int timeout) 475{ 476 ide_hwif_t *hwif = HWIF(drive); 477 u8 stat = 0; 478 479 while(--timeout) { 480 stat = hwif->INB(IDE_STATUS_REG); 481 if (!(stat & BUSY_STAT)) { 482 if (drive->ready_stat == 0) 483 break; 484 else if ((stat & drive->ready_stat)||(stat & ERR_STAT)) 485 break; 486 } 487 mdelay(1); 488 } 489 if ((stat & ERR_STAT) || timeout <= 0) { 490 if (stat & ERR_STAT) { 491 printk(KERN_ERR "%s: wait_for_ready, " 492 "error status: %x\n", drive->name, stat); 493 } 494 return 1; 495 } 496 return 0; 497} 498 499/* 500 * This routine busy-waits for the drive status to be not "busy". 501 * It then checks the status for all of the "good" bits and none 502 * of the "bad" bits, and if all is okay it returns 0. All other 503 * cases return 1 after invoking ide_error() -- caller should just return. 504 * 505 * This routine should get fixed to not hog the cpu during extra long waits.. 506 * That could be done by busy-waiting for the first jiffy or two, and then 507 * setting a timer to wake up at half second intervals thereafter, 508 * until timeout is achieved, before timing out. 509 */ 510int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) 511{ 512 ide_hwif_t *hwif = HWIF(drive); 513 u8 stat; 514 int i; 515 unsigned long flags; 516 517 /* bail early if we've exceeded max_failures */ 518 if (drive->max_failures && (drive->failures > drive->max_failures)) { 519 *startstop = ide_stopped; 520 return 1; 521 } 522 523 udelay(1); /* spec allows drive 400ns to assert "BUSY" */ 524 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 525 local_irq_set(flags); 526 timeout += jiffies; 527 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 528 if (time_after(jiffies, timeout)) { 529 /* 530 * One last read after the timeout in case 531 * heavy interrupt load made us not make any 532 * progress during the timeout.. 533 */ 534 stat = hwif->INB(IDE_STATUS_REG); 535 if (!(stat & BUSY_STAT)) 536 break; 537 538 local_irq_restore(flags); 539 *startstop = ide_error(drive, "status timeout", stat); 540 return 1; 541 } 542 } 543 local_irq_restore(flags); 544 } 545 /* 546 * Allow status to settle, then read it again. 547 * A few rare drives vastly violate the 400ns spec here, 548 * so we'll wait up to 10usec for a "good" status 549 * rather than expensively fail things immediately. 550 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 551 */ 552 for (i = 0; i < 10; i++) { 553 udelay(1); 554 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad)) 555 return 0; 556 } 557 *startstop = ide_error(drive, "status error", stat); 558 return 1; 559} 560 561EXPORT_SYMBOL(ide_wait_stat); 562 563/* 564 * All hosts that use the 80c ribbon must use! 565 * The name is derived from upper byte of word 93 and the 80c ribbon. 566 */ 567u8 eighty_ninty_three (ide_drive_t *drive) 568{ 569 ide_hwif_t *hwif = drive->hwif; 570 struct hd_driveid *id = drive->id; 571 572 if (hwif->udma_four == 0) 573 goto no_80w; 574 575 /* Check for SATA but only if we are ATA5 or higher */ 576 if (id->hw_config == 0 && (id->major_rev_num & 0x7FE0)) 577 return 1; 578 579#ifndef CONFIG_IDEDMA_IVB 580 if (id->hw_config & 0x4000) 581#else 582 if (id->hw_config & 0x6000) 583#endif 584 return 1; 585 586no_80w: 587 if (drive->udma33_warned == 1) 588 return 0; 589 590 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " 591 "limiting max speed to UDMA33\n", 592 drive->name, hwif->udma_four ? "drive" : "host"); 593 594 drive->udma33_warned = 1; 595 596 return 0; 597} 598 599int ide_ata66_check (ide_drive_t *drive, ide_task_t *args) 600{ 601 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) && 602 (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) && 603 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) { 604 if (eighty_ninty_three(drive) == 0) { 605 printk(KERN_WARNING "%s: UDMA speeds >UDMA33 cannot " 606 "be set\n", drive->name); 607 return 1; 608 } 609 } 610 611 return 0; 612} 613 614/* 615 * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER. 616 * 1 : Safe to update drive->id DMA registers. 617 * 0 : OOPs not allowed. 618 */ 619int set_transfer (ide_drive_t *drive, ide_task_t *args) 620{ 621 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) && 622 (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) && 623 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) && 624 (drive->id->dma_ultra || 625 drive->id->dma_mword || 626 drive->id->dma_1word)) 627 return 1; 628 629 return 0; 630} 631 632#ifdef CONFIG_BLK_DEV_IDEDMA 633static u8 ide_auto_reduce_xfer (ide_drive_t *drive) 634{ 635 if (!drive->crc_count) 636 return drive->current_speed; 637 drive->crc_count = 0; 638 639 switch(drive->current_speed) { 640 case XFER_UDMA_7: return XFER_UDMA_6; 641 case XFER_UDMA_6: return XFER_UDMA_5; 642 case XFER_UDMA_5: return XFER_UDMA_4; 643 case XFER_UDMA_4: return XFER_UDMA_3; 644 case XFER_UDMA_3: return XFER_UDMA_2; 645 case XFER_UDMA_2: return XFER_UDMA_1; 646 case XFER_UDMA_1: return XFER_UDMA_0; 647 /* 648 * OOPS we do not goto non Ultra DMA modes 649 * without iCRC's available we force 650 * the system to PIO and make the user 651 * invoke the ATA-1 ATA-2 DMA modes. 652 */ 653 case XFER_UDMA_0: 654 default: return XFER_PIO_4; 655 } 656} 657#endif /* CONFIG_BLK_DEV_IDEDMA */ 658 659/* 660 * Update the 661 */ 662int ide_driveid_update (ide_drive_t *drive) 663{ 664 ide_hwif_t *hwif = HWIF(drive); 665 struct hd_driveid *id; 666 /* 667 * Re-read drive->id for possible DMA mode 668 * change (copied from ide-probe.c) 669 */ 670 unsigned long timeout, flags; 671 672 SELECT_MASK(drive, 1); 673 if (IDE_CONTROL_REG) 674 hwif->OUTB(drive->ctl,IDE_CONTROL_REG); 675 msleep(50); 676 hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG); 677 timeout = jiffies + WAIT_WORSTCASE; 678 do { 679 if (time_after(jiffies, timeout)) { 680 SELECT_MASK(drive, 0); 681 return 0; /* drive timed-out */ 682 } 683 msleep(50); /* give drive a breather */ 684 } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT); 685 msleep(50); /* wait for IRQ and DRQ_STAT */ 686 if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) { 687 SELECT_MASK(drive, 0); 688 printk("%s: CHECK for good STATUS\n", drive->name); 689 return 0; 690 } 691 local_irq_save(flags); 692 SELECT_MASK(drive, 0); 693 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); 694 if (!id) { 695 local_irq_restore(flags); 696 return 0; 697 } 698 ata_input_data(drive, id, SECTOR_WORDS); 699 (void) hwif->INB(IDE_STATUS_REG); /* clear drive IRQ */ 700 local_irq_enable(); 701 local_irq_restore(flags); 702 ide_fix_driveid(id); 703 if (id) { 704 drive->id->dma_ultra = id->dma_ultra; 705 drive->id->dma_mword = id->dma_mword; 706 drive->id->dma_1word = id->dma_1word; 707 /* anything more ? */ 708 kfree(id); 709 } 710 711 return 1; 712} 713 714/* 715 * Similar to ide_wait_stat(), except it never calls ide_error internally. 716 * This is a kludge to handle the new ide_config_drive_speed() function, 717 * and should not otherwise be used anywhere. Eventually, the tuneproc's 718 * should be updated to return ide_startstop_t, in which case we can get 719 * rid of this abomination again. :) -ml 720 * 721 * It is gone.......... 722 * 723 * const char *msg == consider adding for verbose errors. 724 */ 725int ide_config_drive_speed (ide_drive_t *drive, u8 speed) 726{ 727 ide_hwif_t *hwif = HWIF(drive); 728 int i, error = 1; 729 u8 stat; 730 731// while (HWGROUP(drive)->busy) 732// msleep(50); 733 734#ifdef CONFIG_BLK_DEV_IDEDMA 735 if (hwif->ide_dma_check) /* check if host supports DMA */ 736 hwif->dma_host_off(drive); 737#endif 738 739 /* 740 * Don't use ide_wait_cmd here - it will 741 * attempt to set_geometry and recalibrate, 742 * but for some reason these don't work at 743 * this point (lost interrupt). 744 */ 745 /* 746 * Select the drive, and issue the SETFEATURES command 747 */ 748 disable_irq_nosync(hwif->irq); 749 750 751 udelay(1); 752 SELECT_DRIVE(drive); 753 SELECT_MASK(drive, 0); 754 udelay(1); 755 if (IDE_CONTROL_REG) 756 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG); 757 hwif->OUTB(speed, IDE_NSECTOR_REG); 758 hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG); 759 hwif->OUTB(WIN_SETFEATURES, IDE_COMMAND_REG); 760 if ((IDE_CONTROL_REG) && (drive->quirk_list == 2)) 761 hwif->OUTB(drive->ctl, IDE_CONTROL_REG); 762 udelay(1); 763 /* 764 * Wait for drive to become non-BUSY 765 */ 766 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 767 unsigned long flags, timeout; 768 local_irq_set(flags); 769 timeout = jiffies + WAIT_CMD; 770 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) { 771 if (time_after(jiffies, timeout)) 772 break; 773 } 774 local_irq_restore(flags); 775 } 776 777 /* 778 * Allow status to settle, then read it again. 779 * A few rare drives vastly violate the 400ns spec here, 780 * so we'll wait up to 10usec for a "good" status 781 * rather than expensively fail things immediately. 782 * This fix courtesy of Matthew Faupel & Niccolo Rigacci. 783 */ 784 for (i = 0; i < 10; i++) { 785 udelay(1); 786 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), DRIVE_READY, BUSY_STAT|DRQ_STAT|ERR_STAT)) { 787 error = 0; 788 break; 789 } 790 } 791 792 SELECT_MASK(drive, 0); 793 794 enable_irq(hwif->irq); 795 796 if (error) { 797 (void) ide_dump_status(drive, "set_drive_speed_status", stat); 798 return error; 799 } 800 801 drive->id->dma_ultra &= ~0xFF00; 802 drive->id->dma_mword &= ~0x0F00; 803 drive->id->dma_1word &= ~0x0F00; 804 805#ifdef CONFIG_BLK_DEV_IDEDMA 806 if (speed >= XFER_SW_DMA_0) 807 hwif->dma_host_on(drive); 808 else if (hwif->ide_dma_check) /* check if host supports DMA */ 809 hwif->dma_off_quietly(drive); 810#endif 811 812 switch(speed) { 813 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break; 814 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break; 815 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break; 816 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break; 817 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break; 818 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break; 819 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break; 820 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break; 821 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break; 822 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break; 823 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break; 824 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break; 825 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break; 826 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break; 827 default: break; 828 } 829 if (!drive->init_speed) 830 drive->init_speed = speed; 831 drive->current_speed = speed; 832 return error; 833} 834 835EXPORT_SYMBOL(ide_config_drive_speed); 836 837 838/* 839 * This should get invoked any time we exit the driver to 840 * wait for an interrupt response from a drive. handler() points 841 * at the appropriate code to handle the next interrupt, and a 842 * timer is started to prevent us from waiting forever in case 843 * something goes wrong (see the ide_timer_expiry() handler later on). 844 * 845 * See also ide_execute_command 846 */ 847static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 848 unsigned int timeout, ide_expiry_t *expiry) 849{ 850 ide_hwgroup_t *hwgroup = HWGROUP(drive); 851 852 if (hwgroup->handler != NULL) { 853 printk(KERN_CRIT "%s: ide_set_handler: handler not null; " 854 "old=%p, new=%p\n", 855 drive->name, hwgroup->handler, handler); 856 } 857 hwgroup->handler = handler; 858 hwgroup->expiry = expiry; 859 hwgroup->timer.expires = jiffies + timeout; 860 hwgroup->req_gen_timer = hwgroup->req_gen; 861 add_timer(&hwgroup->timer); 862} 863 864void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, 865 unsigned int timeout, ide_expiry_t *expiry) 866{ 867 unsigned long flags; 868 spin_lock_irqsave(&ide_lock, flags); 869 __ide_set_handler(drive, handler, timeout, expiry); 870 spin_unlock_irqrestore(&ide_lock, flags); 871} 872 873EXPORT_SYMBOL(ide_set_handler); 874 875/** 876 * ide_execute_command - execute an IDE command 877 * @drive: IDE drive to issue the command against 878 * @command: command byte to write 879 * @handler: handler for next phase 880 * @timeout: timeout for command 881 * @expiry: handler to run on timeout 882 * 883 * Helper function to issue an IDE command. This handles the 884 * atomicity requirements, command timing and ensures that the 885 * handler and IRQ setup do not race. All IDE command kick off 886 * should go via this function or do equivalent locking. 887 */ 888 889void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry) 890{ 891 unsigned long flags; 892 ide_hwgroup_t *hwgroup = HWGROUP(drive); 893 ide_hwif_t *hwif = HWIF(drive); 894 895 spin_lock_irqsave(&ide_lock, flags); 896 897 BUG_ON(hwgroup->handler); 898 hwgroup->handler = handler; 899 hwgroup->expiry = expiry; 900 hwgroup->timer.expires = jiffies + timeout; 901 hwgroup->req_gen_timer = hwgroup->req_gen; 902 add_timer(&hwgroup->timer); 903 hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG); 904 ndelay(400); 905 spin_unlock_irqrestore(&ide_lock, flags); 906} 907 908EXPORT_SYMBOL(ide_execute_command); 909 910 911/* needed below */ 912static ide_startstop_t do_reset1 (ide_drive_t *, int); 913 914/* 915 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms 916 * during an atapi drive reset operation. If the drive has not yet responded, 917 * and we have not yet hit our maximum waiting time, then the timer is restarted 918 * for another 50ms. 919 */ 920static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) 921{ 922 ide_hwgroup_t *hwgroup = HWGROUP(drive); 923 ide_hwif_t *hwif = HWIF(drive); 924 u8 stat; 925 926 SELECT_DRIVE(drive); 927 udelay (10); 928 929 if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { 930 printk("%s: ATAPI reset complete\n", drive->name); 931 } else { 932 if (time_before(jiffies, hwgroup->poll_timeout)) { 933 BUG_ON(HWGROUP(drive)->handler != NULL); 934 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 935 /* continue polling */ 936 return ide_started; 937 } 938 /* end of polling */ 939 hwgroup->polling = 0; 940 printk("%s: ATAPI reset timed-out, status=0x%02x\n", 941 drive->name, stat); 942 /* do it the old fashioned way */ 943 return do_reset1(drive, 1); 944 } 945 /* done polling */ 946 hwgroup->polling = 0; 947 hwgroup->resetting = 0; 948 return ide_stopped; 949} 950 951/* 952 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms 953 * during an ide reset operation. If the drives have not yet responded, 954 * and we have not yet hit our maximum waiting time, then the timer is restarted 955 * for another 50ms. 956 */ 957static ide_startstop_t reset_pollfunc (ide_drive_t *drive) 958{ 959 ide_hwgroup_t *hwgroup = HWGROUP(drive); 960 ide_hwif_t *hwif = HWIF(drive); 961 u8 tmp; 962 963 if (hwif->reset_poll != NULL) { 964 if (hwif->reset_poll(drive)) { 965 printk(KERN_ERR "%s: host reset_poll failure for %s.\n", 966 hwif->name, drive->name); 967 return ide_stopped; 968 } 969 } 970 971 if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) { 972 if (time_before(jiffies, hwgroup->poll_timeout)) { 973 BUG_ON(HWGROUP(drive)->handler != NULL); 974 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 975 /* continue polling */ 976 return ide_started; 977 } 978 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); 979 drive->failures++; 980 } else { 981 printk("%s: reset: ", hwif->name); 982 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) { 983 printk("success\n"); 984 drive->failures = 0; 985 } else { 986 drive->failures++; 987 printk("master: "); 988 switch (tmp & 0x7f) { 989 case 1: printk("passed"); 990 break; 991 case 2: printk("formatter device error"); 992 break; 993 case 3: printk("sector buffer error"); 994 break; 995 case 4: printk("ECC circuitry error"); 996 break; 997 case 5: printk("controlling MPU error"); 998 break; 999 default:printk("error (0x%02x?)", tmp); 1000 } 1001 if (tmp & 0x80) 1002 printk("; slave: failed"); 1003 printk("\n"); 1004 } 1005 } 1006 hwgroup->polling = 0; /* done polling */ 1007 hwgroup->resetting = 0; /* done reset attempt */ 1008 return ide_stopped; 1009} 1010 1011static void check_dma_crc(ide_drive_t *drive) 1012{ 1013#ifdef CONFIG_BLK_DEV_IDEDMA 1014 if (drive->crc_count) { 1015 drive->hwif->dma_off_quietly(drive); 1016 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive)); 1017 if (drive->current_speed >= XFER_SW_DMA_0) 1018 (void) HWIF(drive)->ide_dma_on(drive); 1019 } else 1020 ide_dma_off(drive); 1021#endif 1022} 1023 1024static void ide_disk_pre_reset(ide_drive_t *drive) 1025{ 1026 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1; 1027 1028 drive->special.all = 0; 1029 drive->special.b.set_geometry = legacy; 1030 drive->special.b.recalibrate = legacy; 1031 if (OK_TO_RESET_CONTROLLER) 1032 drive->mult_count = 0; 1033 if (!drive->keep_settings && !drive->using_dma) 1034 drive->mult_req = 0; 1035 if (drive->mult_req != drive->mult_count) 1036 drive->special.b.set_multmode = 1; 1037} 1038 1039static void pre_reset(ide_drive_t *drive) 1040{ 1041 if (drive->media == ide_disk) 1042 ide_disk_pre_reset(drive); 1043 else 1044 drive->post_reset = 1; 1045 1046 if (!drive->keep_settings) { 1047 if (drive->using_dma) { 1048 check_dma_crc(drive); 1049 } else { 1050 drive->unmask = 0; 1051 drive->io_32bit = 0; 1052 } 1053 return; 1054 } 1055 if (drive->using_dma) 1056 check_dma_crc(drive); 1057 1058 if (HWIF(drive)->pre_reset != NULL) 1059 HWIF(drive)->pre_reset(drive); 1060 1061 if (drive->current_speed != 0xff) 1062 drive->desired_speed = drive->current_speed; 1063 drive->current_speed = 0xff; 1064} 1065 1066/* 1067 * do_reset1() attempts to recover a confused drive by resetting it. 1068 * Unfortunately, resetting a disk drive actually resets all devices on 1069 * the same interface, so it can really be thought of as resetting the 1070 * interface rather than resetting the drive. 1071 * 1072 * ATAPI devices have their own reset mechanism which allows them to be 1073 * individually reset without clobbering other devices on the same interface. 1074 * 1075 * Unfortunately, the IDE interface does not generate an interrupt to let 1076 * us know when the reset operation has finished, so we must poll for this. 1077 * Equally poor, though, is the fact that this may a very long time to complete, 1078 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, 1079 * we set a timer to poll at 50ms intervals. 1080 */ 1081static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) 1082{ 1083 unsigned int unit; 1084 unsigned long flags; 1085 ide_hwif_t *hwif; 1086 ide_hwgroup_t *hwgroup; 1087 1088 spin_lock_irqsave(&ide_lock, flags); 1089 hwif = HWIF(drive); 1090 hwgroup = HWGROUP(drive); 1091 1092 /* We must not reset with running handlers */ 1093 BUG_ON(hwgroup->handler != NULL); 1094 1095 /* For an ATAPI device, first try an ATAPI SRST. */ 1096 if (drive->media != ide_disk && !do_not_try_atapi) { 1097 hwgroup->resetting = 1; 1098 pre_reset(drive); 1099 SELECT_DRIVE(drive); 1100 udelay (20); 1101 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG); 1102 ndelay(400); 1103 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1104 hwgroup->polling = 1; 1105 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); 1106 spin_unlock_irqrestore(&ide_lock, flags); 1107 return ide_started; 1108 } 1109 1110 /* 1111 * First, reset any device state data we were maintaining 1112 * for any of the drives on this interface. 1113 */ 1114 for (unit = 0; unit < MAX_DRIVES; ++unit) 1115 pre_reset(&hwif->drives[unit]); 1116 1117#if OK_TO_RESET_CONTROLLER 1118 if (!IDE_CONTROL_REG) { 1119 spin_unlock_irqrestore(&ide_lock, flags); 1120 return ide_stopped; 1121 } 1122 1123 hwgroup->resetting = 1; 1124 /* 1125 * Note that we also set nIEN while resetting the device, 1126 * to mask unwanted interrupts from the interface during the reset. 1127 * However, due to the design of PC hardware, this will cause an 1128 * immediate interrupt due to the edge transition it produces. 1129 * This single interrupt gives us a "fast poll" for drives that 1130 * recover from reset very quickly, saving us the first 50ms wait time. 1131 */ 1132 /* set SRST and nIEN */ 1133 hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG); 1134 /* more than enough time */ 1135 udelay(10); 1136 if (drive->quirk_list == 2) { 1137 /* clear SRST and nIEN */ 1138 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG); 1139 } else { 1140 /* clear SRST, leave nIEN */ 1141 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG); 1142 } 1143 /* more than enough time */ 1144 udelay(10); 1145 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; 1146 hwgroup->polling = 1; 1147 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); 1148 1149 /* 1150 * Some weird controller like resetting themselves to a strange 1151 * state when the disks are reset this way. At least, the Winbond 1152 * 553 documentation says that 1153 */ 1154 if (hwif->resetproc != NULL) { 1155 hwif->resetproc(drive); 1156 } 1157 1158#endif /* OK_TO_RESET_CONTROLLER */ 1159 1160 spin_unlock_irqrestore(&ide_lock, flags); 1161 return ide_started; 1162} 1163 1164/* 1165 * ide_do_reset() is the entry point to the drive/interface reset code. 1166 */ 1167 1168ide_startstop_t ide_do_reset (ide_drive_t *drive) 1169{ 1170 return do_reset1(drive, 0); 1171} 1172 1173EXPORT_SYMBOL(ide_do_reset); 1174 1175/* 1176 * ide_wait_not_busy() waits for the currently selected device on the hwif 1177 * to report a non-busy status, see comments in probe_hwif(). 1178 */ 1179int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) 1180{ 1181 u8 stat = 0; 1182 1183 while(timeout--) { 1184 /* 1185 * Turn this into a schedule() sleep once I'm sure 1186 * about locking issues (2.5 work ?). 1187 */ 1188 mdelay(1); 1189 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]); 1190 if ((stat & BUSY_STAT) == 0) 1191 return 0; 1192 /* 1193 * Assume a value of 0xff means nothing is connected to 1194 * the interface and it doesn't implement the pull-down 1195 * resistor on D7. 1196 */ 1197 if (stat == 0xff) 1198 return -ENODEV; 1199 touch_softlockup_watchdog(); 1200 touch_nmi_watchdog(); 1201 } 1202 return -EBUSY; 1203} 1204 1205EXPORT_SYMBOL_GPL(ide_wait_not_busy); 1206