1/*
2    SMBus driver for nVidia nForce2 MCP
3
4    Added nForce3 Pro 150  Thomas Leibold <thomas@plx.com>,
5	Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
6    Copyright (c) 2003  Hans-Frieder Vogt <hfvogt@arcor.de>,
7    Based on
8    SMBus 2.0 driver for AMD-8111 IO-Hub
9    Copyright (c) 2002 Vojtech Pavlik
10
11    This program is free software; you can redistribute it and/or modify
12    it under the terms of the GNU General Public License as published by
13    the Free Software Foundation; either version 2 of the License, or
14    (at your option) any later version.
15
16    This program is distributed in the hope that it will be useful,
17    but WITHOUT ANY WARRANTY; without even the implied warranty of
18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19    GNU General Public License for more details.
20
21    You should have received a copy of the GNU General Public License
22    along with this program; if not, write to the Free Software
23    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24*/
25
26/*
27    SUPPORTED DEVICES		PCI ID
28    nForce2 MCP			0064
29    nForce2 Ultra 400 MCP	0084
30    nForce3 Pro150 MCP		00D4
31    nForce3 250Gb MCP		00E4
32    nForce4 MCP			0052
33    nForce4 MCP-04		0034
34    nForce4 MCP51		0264
35    nForce4 MCP55		0368
36    nForce MCP61		03EB
37    nForce MCP65		0446
38
39    This driver supports the 2 SMBuses that are included in the MCP of the
40    nForce2/3/4/5xx chipsets.
41*/
42
43/* Note: we assume there can only be one nForce2, with two SMBus interfaces */
44
45#include <linux/module.h>
46#include <linux/pci.h>
47#include <linux/kernel.h>
48#include <linux/stddef.h>
49#include <linux/ioport.h>
50#include <linux/init.h>
51#include <linux/i2c.h>
52#include <linux/delay.h>
53#include <asm/io.h>
54
55MODULE_LICENSE("GPL");
56MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
57MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
58
59
60struct nforce2_smbus {
61	struct i2c_adapter adapter;
62	int base;
63	int size;
64};
65
66
67/*
68 * nVidia nForce2 SMBus control register definitions
69 * (Newer incarnations use standard BARs 4 and 5 instead)
70 */
71#define NFORCE_PCI_SMB1	0x50
72#define NFORCE_PCI_SMB2	0x54
73
74
75/*
76 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
77 */
78#define NVIDIA_SMB_PRTCL	(smbus->base + 0x00)	/* protocol, PEC */
79#define NVIDIA_SMB_STS		(smbus->base + 0x01)	/* status */
80#define NVIDIA_SMB_ADDR		(smbus->base + 0x02)	/* address */
81#define NVIDIA_SMB_CMD		(smbus->base + 0x03)	/* command */
82#define NVIDIA_SMB_DATA		(smbus->base + 0x04)	/* 32 data registers */
83
84#define NVIDIA_SMB_STS_DONE	0x80
85#define NVIDIA_SMB_STS_ALRM	0x40
86#define NVIDIA_SMB_STS_RES	0x20
87#define NVIDIA_SMB_STS_STATUS	0x1f
88
89#define NVIDIA_SMB_PRTCL_WRITE			0x00
90#define NVIDIA_SMB_PRTCL_READ			0x01
91#define NVIDIA_SMB_PRTCL_QUICK			0x02
92#define NVIDIA_SMB_PRTCL_BYTE			0x04
93#define NVIDIA_SMB_PRTCL_BYTE_DATA		0x06
94#define NVIDIA_SMB_PRTCL_WORD_DATA		0x08
95#define NVIDIA_SMB_PRTCL_PEC			0x80
96
97static struct pci_driver nforce2_driver;
98
99/* Return -1 on error */
100static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
101		unsigned short flags, char read_write,
102		u8 command, int size, union i2c_smbus_data * data)
103{
104	struct nforce2_smbus *smbus = adap->algo_data;
105	unsigned char protocol, pec, temp;
106
107	protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
108		NVIDIA_SMB_PRTCL_WRITE;
109	pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
110
111	switch (size) {
112
113		case I2C_SMBUS_QUICK:
114			protocol |= NVIDIA_SMB_PRTCL_QUICK;
115			read_write = I2C_SMBUS_WRITE;
116			break;
117
118		case I2C_SMBUS_BYTE:
119			if (read_write == I2C_SMBUS_WRITE)
120				outb_p(command, NVIDIA_SMB_CMD);
121			protocol |= NVIDIA_SMB_PRTCL_BYTE;
122			break;
123
124		case I2C_SMBUS_BYTE_DATA:
125			outb_p(command, NVIDIA_SMB_CMD);
126			if (read_write == I2C_SMBUS_WRITE)
127				outb_p(data->byte, NVIDIA_SMB_DATA);
128			protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
129			break;
130
131		case I2C_SMBUS_WORD_DATA:
132			outb_p(command, NVIDIA_SMB_CMD);
133			if (read_write == I2C_SMBUS_WRITE) {
134				 outb_p(data->word, NVIDIA_SMB_DATA);
135				 outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
136			}
137			protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
138			break;
139
140		default:
141			dev_err(&adap->dev, "Unsupported transaction %d\n", size);
142			return -1;
143	}
144
145	outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
146	outb_p(protocol, NVIDIA_SMB_PRTCL);
147
148	temp = inb_p(NVIDIA_SMB_STS);
149
150	if (~temp & NVIDIA_SMB_STS_DONE) {
151		udelay(500);
152		temp = inb_p(NVIDIA_SMB_STS);
153	}
154	if (~temp & NVIDIA_SMB_STS_DONE) {
155		msleep(10);
156		temp = inb_p(NVIDIA_SMB_STS);
157	}
158
159	if ((~temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
160		dev_dbg(&adap->dev, "SMBus Timeout! (0x%02x)\n", temp);
161		return -1;
162	}
163
164	if (read_write == I2C_SMBUS_WRITE)
165		return 0;
166
167	switch (size) {
168
169		case I2C_SMBUS_BYTE:
170		case I2C_SMBUS_BYTE_DATA:
171			data->byte = inb_p(NVIDIA_SMB_DATA);
172			break;
173
174		case I2C_SMBUS_WORD_DATA:
175			data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
176			break;
177	}
178
179	return 0;
180}
181
182
183static u32 nforce2_func(struct i2c_adapter *adapter)
184{
185	/* other functionality might be possible, but is not tested */
186	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
187	    I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA;
188}
189
190static struct i2c_algorithm smbus_algorithm = {
191	.smbus_xfer	= nforce2_access,
192	.functionality	= nforce2_func,
193};
194
195
196static struct pci_device_id nforce2_ids[] = {
197	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
198	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
199	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
200	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
201	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
202	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
203	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
204	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
205	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
206	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
207	{ 0 }
208};
209
210MODULE_DEVICE_TABLE (pci, nforce2_ids);
211
212
213static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
214	int alt_reg, struct nforce2_smbus *smbus, const char *name)
215{
216	int error;
217
218	smbus->base = pci_resource_start(dev, bar);
219	if (smbus->base) {
220		smbus->size = pci_resource_len(dev, bar);
221	} else {
222		/* Older incarnations of the device used non-standard BARs */
223		u16 iobase;
224
225		if (pci_read_config_word(dev, alt_reg, &iobase)
226		    != PCIBIOS_SUCCESSFUL) {
227			dev_err(&dev->dev, "Error reading PCI config for %s\n",
228				name);
229			return -1;
230		}
231
232		smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
233		smbus->size = 64;
234	}
235
236	if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
237		dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
238			smbus->base, smbus->base+smbus->size-1, name);
239		return -1;
240	}
241	smbus->adapter.owner = THIS_MODULE;
242	smbus->adapter.id = I2C_HW_SMBUS_NFORCE2;
243	smbus->adapter.class = I2C_CLASS_HWMON;
244	smbus->adapter.algo = &smbus_algorithm;
245	smbus->adapter.algo_data = smbus;
246	smbus->adapter.dev.parent = &dev->dev;
247	snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
248		"SMBus nForce2 adapter at %04x", smbus->base);
249
250	error = i2c_add_adapter(&smbus->adapter);
251	if (error) {
252		dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
253		release_region(smbus->base, smbus->size);
254		return -1;
255	}
256	dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
257	return 0;
258}
259
260
261static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
262{
263	struct nforce2_smbus *smbuses;
264	int res1, res2;
265
266	/* we support 2 SMBus adapters */
267	if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
268		return -ENOMEM;
269	pci_set_drvdata(dev, smbuses);
270
271	/* SMBus adapter 1 */
272	res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
273	if (res1 < 0) {
274		dev_err(&dev->dev, "Error probing SMB1.\n");
275		smbuses[0].base = 0;	/* to have a check value */
276	}
277	/* SMBus adapter 2 */
278	res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], "SMB2");
279	if (res2 < 0) {
280		dev_err(&dev->dev, "Error probing SMB2.\n");
281		smbuses[1].base = 0;	/* to have a check value */
282	}
283	if ((res1 < 0) && (res2 < 0)) {
284		/* we did not find even one of the SMBuses, so we give up */
285		kfree(smbuses);
286		return -ENODEV;
287	}
288
289	return 0;
290}
291
292
293static void __devexit nforce2_remove(struct pci_dev *dev)
294{
295	struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);
296
297	if (smbuses[0].base) {
298		i2c_del_adapter(&smbuses[0].adapter);
299		release_region(smbuses[0].base, smbuses[0].size);
300	}
301	if (smbuses[1].base) {
302		i2c_del_adapter(&smbuses[1].adapter);
303		release_region(smbuses[1].base, smbuses[1].size);
304	}
305	kfree(smbuses);
306}
307
308static struct pci_driver nforce2_driver = {
309	.name		= "nForce2_smbus",
310	.id_table	= nforce2_ids,
311	.probe		= nforce2_probe,
312	.remove		= __devexit_p(nforce2_remove),
313};
314
315static int __init nforce2_init(void)
316{
317	return pci_register_driver(&nforce2_driver);
318}
319
320static void __exit nforce2_exit(void)
321{
322	pci_unregister_driver(&nforce2_driver);
323}
324
325module_init(nforce2_init);
326module_exit(nforce2_exit);
327