1/*
2    w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3                monitoring
4    Copyright (c) 1998 - 2001  Frodo Looijaard <frodol@dds.nl>,
5                               Philip Edelbrock <phil@netroedge.com>,
6                               and Mark Studebaker <mdsxyz123@yahoo.com>
7    Copyright (c) 2007         Jean Delvare <khali@linux-fr.org>
8
9    This program is free software; you can redistribute it and/or modify
10    it under the terms of the GNU General Public License as published by
11    the Free Software Foundation; either version 2 of the License, or
12    (at your option) any later version.
13
14    This program is distributed in the hope that it will be useful,
15    but WITHOUT ANY WARRANTY; without even the implied warranty of
16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17    GNU General Public License for more details.
18
19    You should have received a copy of the GNU General Public License
20    along with this program; if not, write to the Free Software
21    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24/*
25    Supports following chips:
26
27    Chip	#vin	#fanin	#pwm	#temp	wchipid	vendid	i2c	ISA
28    as99127f	7	3	0	3	0x31	0x12c3	yes	no
29    as99127f rev.2 (type_name = as99127f)	0x31	0x5ca3	yes	no
30    w83781d	7	3	0	3	0x10-1	0x5ca3	yes	yes
31    w83627hf	9	3	2	3	0x21	0x5ca3	yes	yes(LPC)
32    w83782d	9	3	2-4	3	0x30	0x5ca3	yes	yes
33    w83783s	5-6	3	2	1-2	0x40	0x5ca3	yes	no
34
35*/
36
37#include <linux/module.h>
38#include <linux/init.h>
39#include <linux/slab.h>
40#include <linux/jiffies.h>
41#include <linux/i2c.h>
42#include <linux/platform_device.h>
43#include <linux/ioport.h>
44#include <linux/hwmon.h>
45#include <linux/hwmon-vid.h>
46#include <linux/hwmon-sysfs.h>
47#include <linux/sysfs.h>
48#include <linux/err.h>
49#include <linux/mutex.h>
50#include <asm/io.h>
51#include "lm75.h"
52
53/* ISA device, if found */
54static struct platform_device *pdev;
55
56/* Addresses to scan */
57static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
58					0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
59					0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
60static unsigned short isa_address = 0x290;
61
62/* Insmod parameters */
63I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
64I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
65		    "{bus, clientaddr, subclientaddr1, subclientaddr2}");
66
67static int reset;
68module_param(reset, bool, 0);
69MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
70
71static int init = 1;
72module_param(init, bool, 0);
73MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
74
75/* Constants specified below */
76
77/* Length of ISA address segment */
78#define W83781D_EXTENT			8
79
80/* Where are the ISA address/data registers relative to the base address */
81#define W83781D_ADDR_REG_OFFSET		5
82#define W83781D_DATA_REG_OFFSET		6
83
84/* The device registers */
85/* in nr from 0 to 8 */
86#define W83781D_REG_IN_MAX(nr)		((nr < 7) ? (0x2b + (nr) * 2) : \
87						    (0x554 + (((nr) - 7) * 2)))
88#define W83781D_REG_IN_MIN(nr)		((nr < 7) ? (0x2c + (nr) * 2) : \
89						    (0x555 + (((nr) - 7) * 2)))
90#define W83781D_REG_IN(nr)		((nr < 7) ? (0x20 + (nr)) : \
91						    (0x550 + (nr) - 7))
92
93/* fan nr from 0 to 2 */
94#define W83781D_REG_FAN_MIN(nr)		(0x3b + (nr))
95#define W83781D_REG_FAN(nr)		(0x28 + (nr))
96
97#define W83781D_REG_BANK		0x4E
98#define W83781D_REG_TEMP2_CONFIG	0x152
99#define W83781D_REG_TEMP3_CONFIG	0x252
100/* temp nr from 1 to 3 */
101#define W83781D_REG_TEMP(nr)		((nr == 3) ? (0x0250) : \
102					((nr == 2) ? (0x0150) : \
103						     (0x27)))
104#define W83781D_REG_TEMP_HYST(nr)	((nr == 3) ? (0x253) : \
105					((nr == 2) ? (0x153) : \
106						     (0x3A)))
107#define W83781D_REG_TEMP_OVER(nr)	((nr == 3) ? (0x255) : \
108					((nr == 2) ? (0x155) : \
109						     (0x39)))
110
111#define W83781D_REG_CONFIG		0x40
112
113/* Interrupt status (W83781D, AS99127F) */
114#define W83781D_REG_ALARM1		0x41
115#define W83781D_REG_ALARM2		0x42
116
117/* Real-time status (W83782D, W83783S, W83627HF) */
118#define W83782D_REG_ALARM1		0x459
119#define W83782D_REG_ALARM2		0x45A
120#define W83782D_REG_ALARM3		0x45B
121
122#define W83781D_REG_BEEP_CONFIG		0x4D
123#define W83781D_REG_BEEP_INTS1		0x56
124#define W83781D_REG_BEEP_INTS2		0x57
125#define W83781D_REG_BEEP_INTS3		0x453	/* not on W83781D */
126
127#define W83781D_REG_VID_FANDIV		0x47
128
129#define W83781D_REG_CHIPID		0x49
130#define W83781D_REG_WCHIPID		0x58
131#define W83781D_REG_CHIPMAN		0x4F
132#define W83781D_REG_PIN			0x4B
133
134/* 782D/783S only */
135#define W83781D_REG_VBAT		0x5D
136
137/* PWM 782D (1-4) and 783S (1-2) only */
138static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
139#define W83781D_REG_PWMCLK12		0x5C
140#define W83781D_REG_PWMCLK34		0x45C
141
142#define W83781D_REG_I2C_ADDR		0x48
143#define W83781D_REG_I2C_SUBADDR		0x4A
144
145/* The following are undocumented in the data sheets however we
146   received the information in an email from Winbond tech support */
147/* Sensor selection - not on 781d */
148#define W83781D_REG_SCFG1		0x5D
149static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
150
151#define W83781D_REG_SCFG2		0x59
152static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
153
154#define W83781D_DEFAULT_BETA		3435
155
156/* RT Table registers */
157#define W83781D_REG_RT_IDX		0x50
158#define W83781D_REG_RT_VAL		0x51
159
160/* Conversions */
161#define IN_TO_REG(val)			SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
162#define IN_FROM_REG(val)		((val) * 16)
163
164static inline u8
165FAN_TO_REG(long rpm, int div)
166{
167	if (rpm == 0)
168		return 255;
169	rpm = SENSORS_LIMIT(rpm, 1, 1000000);
170	return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
171}
172
173static inline long
174FAN_FROM_REG(u8 val, int div)
175{
176	if (val == 0)
177		return -1;
178	if (val == 255)
179		return 0;
180	return 1350000 / (val * div);
181}
182
183#define TEMP_TO_REG(val)		SENSORS_LIMIT((val) / 1000, -127, 128)
184#define TEMP_FROM_REG(val)		((val) * 1000)
185
186#define BEEP_MASK_FROM_REG(val,type)	((type) == as99127f ? \
187					 (val) ^ 0x7fff : (val))
188#define BEEP_MASK_TO_REG(val,type)	((type) == as99127f ? \
189					 (~(val)) & 0x7fff : (val) & 0xffffff)
190
191#define DIV_FROM_REG(val)		(1 << (val))
192
193static inline u8
194DIV_TO_REG(long val, enum chips type)
195{
196	int i;
197	val = SENSORS_LIMIT(val, 1,
198			    ((type == w83781d
199			      || type == as99127f) ? 8 : 128)) >> 1;
200	for (i = 0; i < 7; i++) {
201		if (val == 0)
202			break;
203		val >>= 1;
204	}
205	return i;
206}
207
208/* There are some complications in a module like this. First off, W83781D chips
209   may be both present on the SMBus and the ISA bus, and we have to handle
210   those cases separately at some places. Second, there might be several
211   W83781D chips available (well, actually, that is probably never done; but
212   it is a clean illustration of how to handle a case like that). Finally,
213   a specific chip may be attached to *both* ISA and SMBus, and we would
214   not like to detect it double. Fortunately, in the case of the W83781D at
215   least, a register tells us what SMBus address we are on, so that helps
216   a bit - except if there could be more than one SMBus. Groan. No solution
217   for this yet. */
218
219/* For ISA chips, we abuse the i2c_client addr and name fields. We also use
220   the driver field to differentiate between I2C and ISA chips. */
221struct w83781d_data {
222	struct i2c_client client;
223	struct class_device *class_dev;
224	struct mutex lock;
225	enum chips type;
226
227	struct mutex update_lock;
228	char valid;		/* !=0 if following fields are valid */
229	unsigned long last_updated;	/* In jiffies */
230
231	struct i2c_client *lm75[2];	/* for secondary I2C addresses */
232	/* array of 2 pointers to subclients */
233
234	u8 in[9];		/* Register value - 8 & 9 for 782D only */
235	u8 in_max[9];		/* Register value - 8 & 9 for 782D only */
236	u8 in_min[9];		/* Register value - 8 & 9 for 782D only */
237	u8 fan[3];		/* Register value */
238	u8 fan_min[3];		/* Register value */
239	s8 temp;		/* Register value */
240	s8 temp_max;		/* Register value */
241	s8 temp_max_hyst;	/* Register value */
242	u16 temp_add[2];	/* Register value */
243	u16 temp_max_add[2];	/* Register value */
244	u16 temp_max_hyst_add[2];	/* Register value */
245	u8 fan_div[3];		/* Register encoding, shifted right */
246	u8 vid;			/* Register encoding, combined */
247	u32 alarms;		/* Register encoding, combined */
248	u32 beep_mask;		/* Register encoding, combined */
249	u8 beep_enable;		/* Boolean */
250	u8 pwm[4];		/* Register value */
251	u8 pwm2_enable;		/* Boolean */
252	u16 sens[3];		/* 782D/783S only.
253				   1 = pentium diode; 2 = 3904 diode;
254				   3000-5000 = thermistor beta.
255				   Default = 3435.
256				   Other Betas unimplemented */
257	u8 vrm;
258};
259
260static int w83781d_attach_adapter(struct i2c_adapter *adapter);
261static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
262static int w83781d_detach_client(struct i2c_client *client);
263
264static int __devinit w83781d_isa_probe(struct platform_device *pdev);
265static int __devexit w83781d_isa_remove(struct platform_device *pdev);
266
267static int w83781d_read_value(struct w83781d_data *data, u16 reg);
268static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
269static struct w83781d_data *w83781d_update_device(struct device *dev);
270static void w83781d_init_device(struct device *dev);
271
272static struct i2c_driver w83781d_driver = {
273	.driver = {
274		.name = "w83781d",
275	},
276	.id = I2C_DRIVERID_W83781D,
277	.attach_adapter = w83781d_attach_adapter,
278	.detach_client = w83781d_detach_client,
279};
280
281static struct platform_driver w83781d_isa_driver = {
282	.driver = {
283		.owner = THIS_MODULE,
284		.name = "w83781d",
285	},
286	.probe = w83781d_isa_probe,
287	.remove = w83781d_isa_remove,
288};
289
290
291/* following are the sysfs callback functions */
292#define show_in_reg(reg) \
293static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
294		char *buf) \
295{ \
296	struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
297	struct w83781d_data *data = w83781d_update_device(dev); \
298	return sprintf(buf, "%ld\n", \
299		       (long)IN_FROM_REG(data->reg[attr->index])); \
300}
301show_in_reg(in);
302show_in_reg(in_min);
303show_in_reg(in_max);
304
305#define store_in_reg(REG, reg) \
306static ssize_t store_in_##reg (struct device *dev, struct device_attribute \
307		*da, const char *buf, size_t count) \
308{ \
309	struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
310	struct w83781d_data *data = dev_get_drvdata(dev); \
311	int nr = attr->index; \
312	u32 val; \
313	 \
314	val = simple_strtoul(buf, NULL, 10); \
315	 \
316	mutex_lock(&data->update_lock); \
317	data->in_##reg[nr] = IN_TO_REG(val); \
318	w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
319	 \
320	mutex_unlock(&data->update_lock); \
321	return count; \
322}
323store_in_reg(MIN, min);
324store_in_reg(MAX, max);
325
326#define sysfs_in_offsets(offset) \
327static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
328		show_in, NULL, offset); \
329static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
330		show_in_min, store_in_min, offset); \
331static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
332		show_in_max, store_in_max, offset)
333
334sysfs_in_offsets(0);
335sysfs_in_offsets(1);
336sysfs_in_offsets(2);
337sysfs_in_offsets(3);
338sysfs_in_offsets(4);
339sysfs_in_offsets(5);
340sysfs_in_offsets(6);
341sysfs_in_offsets(7);
342sysfs_in_offsets(8);
343
344#define show_fan_reg(reg) \
345static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
346		char *buf) \
347{ \
348	struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
349	struct w83781d_data *data = w83781d_update_device(dev); \
350	return sprintf(buf,"%ld\n", \
351		FAN_FROM_REG(data->reg[attr->index], \
352			DIV_FROM_REG(data->fan_div[attr->index]))); \
353}
354show_fan_reg(fan);
355show_fan_reg(fan_min);
356
357static ssize_t
358store_fan_min(struct device *dev, struct device_attribute *da,
359		const char *buf, size_t count)
360{
361	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
362	struct w83781d_data *data = dev_get_drvdata(dev);
363	int nr = attr->index;
364	u32 val;
365
366	val = simple_strtoul(buf, NULL, 10);
367
368	mutex_lock(&data->update_lock);
369	data->fan_min[nr] =
370	    FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
371	w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
372			    data->fan_min[nr]);
373
374	mutex_unlock(&data->update_lock);
375	return count;
376}
377
378static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
379static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
380		show_fan_min, store_fan_min, 0);
381static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
382static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
383		show_fan_min, store_fan_min, 1);
384static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
385static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
386		show_fan_min, store_fan_min, 2);
387
388#define show_temp_reg(reg) \
389static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
390		char *buf) \
391{ \
392	struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
393	struct w83781d_data *data = w83781d_update_device(dev); \
394	int nr = attr->index; \
395	if (nr >= 2) {	/* TEMP2 and TEMP3 */ \
396		return sprintf(buf,"%d\n", \
397			LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
398	} else {	/* TEMP1 */ \
399		return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
400	} \
401}
402show_temp_reg(temp);
403show_temp_reg(temp_max);
404show_temp_reg(temp_max_hyst);
405
406#define store_temp_reg(REG, reg) \
407static ssize_t store_temp_##reg (struct device *dev, \
408		struct device_attribute *da, const char *buf, size_t count) \
409{ \
410	struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
411	struct w83781d_data *data = dev_get_drvdata(dev); \
412	int nr = attr->index; \
413	s32 val; \
414	 \
415	val = simple_strtol(buf, NULL, 10); \
416	 \
417	mutex_lock(&data->update_lock); \
418	 \
419	if (nr >= 2) {	/* TEMP2 and TEMP3 */ \
420		data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
421		w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
422				data->temp_##reg##_add[nr-2]); \
423	} else {	/* TEMP1 */ \
424		data->temp_##reg = TEMP_TO_REG(val); \
425		w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
426			data->temp_##reg); \
427	} \
428	 \
429	mutex_unlock(&data->update_lock); \
430	return count; \
431}
432store_temp_reg(OVER, max);
433store_temp_reg(HYST, max_hyst);
434
435#define sysfs_temp_offsets(offset) \
436static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
437		show_temp, NULL, offset); \
438static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
439		show_temp_max, store_temp_max, offset); \
440static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
441		show_temp_max_hyst, store_temp_max_hyst, offset);
442
443sysfs_temp_offsets(1);
444sysfs_temp_offsets(2);
445sysfs_temp_offsets(3);
446
447static ssize_t
448show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
449{
450	struct w83781d_data *data = w83781d_update_device(dev);
451	return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
452}
453
454static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
455
456static ssize_t
457show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
458{
459	struct w83781d_data *data = w83781d_update_device(dev);
460	return sprintf(buf, "%ld\n", (long) data->vrm);
461}
462
463static ssize_t
464store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
465{
466	struct w83781d_data *data = dev_get_drvdata(dev);
467	u32 val;
468
469	val = simple_strtoul(buf, NULL, 10);
470	data->vrm = val;
471
472	return count;
473}
474
475static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
476
477static ssize_t
478show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
479{
480	struct w83781d_data *data = w83781d_update_device(dev);
481	return sprintf(buf, "%u\n", data->alarms);
482}
483
484static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
485
486static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
487{
488	struct w83781d_data *data = w83781d_update_device(dev);
489	return sprintf(buf, "%ld\n",
490		       (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
491}
492static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
493{
494	struct w83781d_data *data = w83781d_update_device(dev);
495	return sprintf(buf, "%ld\n", (long)data->beep_enable);
496}
497
498static ssize_t
499store_beep_mask(struct device *dev, struct device_attribute *attr,
500		const char *buf, size_t count)
501{
502	struct w83781d_data *data = dev_get_drvdata(dev);
503	u32 val;
504
505	val = simple_strtoul(buf, NULL, 10);
506
507	mutex_lock(&data->update_lock);
508	data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
509	w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
510			    data->beep_mask & 0xff);
511	w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
512			    ((data->beep_mask >> 8) & 0x7f)
513			    | data->beep_enable << 7);
514	if (data->type != w83781d && data->type != as99127f) {
515		w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
516				    ((data->beep_mask) >> 16) & 0xff);
517	}
518	mutex_unlock(&data->update_lock);
519
520	return count;
521}
522
523static ssize_t
524store_beep_enable(struct device *dev, struct device_attribute *attr,
525		const char *buf, size_t count)
526{
527	struct w83781d_data *data = dev_get_drvdata(dev);
528	u32 val;
529
530	val = simple_strtoul(buf, NULL, 10);
531	if (val != 0 && val != 1)
532		return -EINVAL;
533
534	mutex_lock(&data->update_lock);
535	data->beep_enable = val;
536	val = w83781d_read_value(data, W83781D_REG_BEEP_INTS2) & 0x7f;
537	val |= data->beep_enable << 7;
538	w83781d_write_value(data, W83781D_REG_BEEP_INTS2, val);
539	mutex_unlock(&data->update_lock);
540
541	return count;
542}
543
544static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
545		show_beep_mask, store_beep_mask);
546static DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
547		show_beep_enable, store_beep_enable);
548
549static ssize_t
550show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
551{
552	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
553	struct w83781d_data *data = w83781d_update_device(dev);
554	return sprintf(buf, "%ld\n",
555		       (long) DIV_FROM_REG(data->fan_div[attr->index]));
556}
557
558/* Note: we save and restore the fan minimum here, because its value is
559   determined in part by the fan divisor.  This follows the principle of
560   least surprise; the user doesn't expect the fan minimum to change just
561   because the divisor changed. */
562static ssize_t
563store_fan_div(struct device *dev, struct device_attribute *da,
564		const char *buf, size_t count)
565{
566	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
567	struct w83781d_data *data = dev_get_drvdata(dev);
568	unsigned long min;
569	int nr = attr->index;
570	u8 reg;
571	unsigned long val = simple_strtoul(buf, NULL, 10);
572
573	mutex_lock(&data->update_lock);
574
575	/* Save fan_min */
576	min = FAN_FROM_REG(data->fan_min[nr],
577			   DIV_FROM_REG(data->fan_div[nr]));
578
579	data->fan_div[nr] = DIV_TO_REG(val, data->type);
580
581	reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
582	       & (nr==0 ? 0xcf : 0x3f))
583	    | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
584	w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
585
586	/* w83781d and as99127f don't have extended divisor bits */
587	if (data->type != w83781d && data->type != as99127f) {
588		reg = (w83781d_read_value(data, W83781D_REG_VBAT)
589		       & ~(1 << (5 + nr)))
590		    | ((data->fan_div[nr] & 0x04) << (3 + nr));
591		w83781d_write_value(data, W83781D_REG_VBAT, reg);
592	}
593
594	/* Restore fan_min */
595	data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
596	w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
597
598	mutex_unlock(&data->update_lock);
599	return count;
600}
601
602static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
603		show_fan_div, store_fan_div, 0);
604static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
605		show_fan_div, store_fan_div, 1);
606static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
607		show_fan_div, store_fan_div, 2);
608
609static ssize_t
610show_pwm(struct device *dev, struct device_attribute *da, char *buf)
611{
612	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
613	struct w83781d_data *data = w83781d_update_device(dev);
614	return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
615}
616
617static ssize_t
618show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
619{
620	struct w83781d_data *data = w83781d_update_device(dev);
621	return sprintf(buf, "%d\n", (int)data->pwm2_enable);
622}
623
624static ssize_t
625store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
626		size_t count)
627{
628	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
629	struct w83781d_data *data = dev_get_drvdata(dev);
630	int nr = attr->index;
631	u32 val;
632
633	val = simple_strtoul(buf, NULL, 10);
634
635	mutex_lock(&data->update_lock);
636	data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
637	w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
638	mutex_unlock(&data->update_lock);
639	return count;
640}
641
642static ssize_t
643store_pwm2_enable(struct device *dev, struct device_attribute *da,
644		const char *buf, size_t count)
645{
646	struct w83781d_data *data = dev_get_drvdata(dev);
647	u32 val, reg;
648
649	val = simple_strtoul(buf, NULL, 10);
650
651	mutex_lock(&data->update_lock);
652
653	switch (val) {
654	case 0:
655	case 1:
656		reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
657		w83781d_write_value(data, W83781D_REG_PWMCLK12,
658				    (reg & 0xf7) | (val << 3));
659
660		reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
661		w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
662				    (reg & 0xef) | (!val << 4));
663
664		data->pwm2_enable = val;
665		break;
666
667	default:
668		mutex_unlock(&data->update_lock);
669		return -EINVAL;
670	}
671
672	mutex_unlock(&data->update_lock);
673	return count;
674}
675
676static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
677static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
678static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
679static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
680/* only PWM2 can be enabled/disabled */
681static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
682		show_pwm2_enable, store_pwm2_enable);
683
684static ssize_t
685show_sensor(struct device *dev, struct device_attribute *da, char *buf)
686{
687	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
688	struct w83781d_data *data = w83781d_update_device(dev);
689	return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
690}
691
692static ssize_t
693store_sensor(struct device *dev, struct device_attribute *da,
694		const char *buf, size_t count)
695{
696	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
697	struct w83781d_data *data = dev_get_drvdata(dev);
698	int nr = attr->index;
699	u32 val, tmp;
700
701	val = simple_strtoul(buf, NULL, 10);
702
703	mutex_lock(&data->update_lock);
704
705	switch (val) {
706	case 1:		/* PII/Celeron diode */
707		tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
708		w83781d_write_value(data, W83781D_REG_SCFG1,
709				    tmp | BIT_SCFG1[nr]);
710		tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
711		w83781d_write_value(data, W83781D_REG_SCFG2,
712				    tmp | BIT_SCFG2[nr]);
713		data->sens[nr] = val;
714		break;
715	case 2:		/* 3904 */
716		tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
717		w83781d_write_value(data, W83781D_REG_SCFG1,
718				    tmp | BIT_SCFG1[nr]);
719		tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
720		w83781d_write_value(data, W83781D_REG_SCFG2,
721				    tmp & ~BIT_SCFG2[nr]);
722		data->sens[nr] = val;
723		break;
724	case W83781D_DEFAULT_BETA:	/* thermistor */
725		tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
726		w83781d_write_value(data, W83781D_REG_SCFG1,
727				    tmp & ~BIT_SCFG1[nr]);
728		data->sens[nr] = val;
729		break;
730	default:
731		dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
732		       (long) val, W83781D_DEFAULT_BETA);
733		break;
734	}
735
736	mutex_unlock(&data->update_lock);
737	return count;
738}
739
740static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
741	show_sensor, store_sensor, 0);
742static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
743	show_sensor, store_sensor, 0);
744static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
745	show_sensor, store_sensor, 0);
746
747/* I2C devices get this name attribute automatically, but for ISA devices
748   we must create it by ourselves. */
749static ssize_t
750show_name(struct device *dev, struct device_attribute *devattr, char *buf)
751{
752	struct w83781d_data *data = dev_get_drvdata(dev);
753	return sprintf(buf, "%s\n", data->client.name);
754}
755static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
756
757/* This function is called when:
758     * w83781d_driver is inserted (when this module is loaded), for each
759       available adapter
760     * when a new adapter is inserted (and w83781d_driver is still present) */
761static int
762w83781d_attach_adapter(struct i2c_adapter *adapter)
763{
764	if (!(adapter->class & I2C_CLASS_HWMON))
765		return 0;
766	return i2c_probe(adapter, &addr_data, w83781d_detect);
767}
768
769/* Assumes that adapter is of I2C, not ISA variety.
770 * OTHERWISE DON'T CALL THIS
771 */
772static int
773w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
774		struct i2c_client *new_client)
775{
776	int i, val1 = 0, id;
777	int err;
778	const char *client_name = "";
779	struct w83781d_data *data = i2c_get_clientdata(new_client);
780
781	data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
782	if (!(data->lm75[0])) {
783		err = -ENOMEM;
784		goto ERROR_SC_0;
785	}
786
787	id = i2c_adapter_id(adapter);
788
789	if (force_subclients[0] == id && force_subclients[1] == address) {
790		for (i = 2; i <= 3; i++) {
791			if (force_subclients[i] < 0x48 ||
792			    force_subclients[i] > 0x4f) {
793				dev_err(&new_client->dev, "Invalid subclient "
794					"address %d; must be 0x48-0x4f\n",
795					force_subclients[i]);
796				err = -EINVAL;
797				goto ERROR_SC_1;
798			}
799		}
800		w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
801				(force_subclients[2] & 0x07) |
802				((force_subclients[3] & 0x07) << 4));
803		data->lm75[0]->addr = force_subclients[2];
804	} else {
805		val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
806		data->lm75[0]->addr = 0x48 + (val1 & 0x07);
807	}
808
809	if (kind != w83783s) {
810		data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
811		if (!(data->lm75[1])) {
812			err = -ENOMEM;
813			goto ERROR_SC_1;
814		}
815
816		if (force_subclients[0] == id &&
817		    force_subclients[1] == address) {
818			data->lm75[1]->addr = force_subclients[3];
819		} else {
820			data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
821		}
822		if (data->lm75[0]->addr == data->lm75[1]->addr) {
823			dev_err(&new_client->dev,
824			       "Duplicate addresses 0x%x for subclients.\n",
825			       data->lm75[0]->addr);
826			err = -EBUSY;
827			goto ERROR_SC_2;
828		}
829	}
830
831	if (kind == w83781d)
832		client_name = "w83781d subclient";
833	else if (kind == w83782d)
834		client_name = "w83782d subclient";
835	else if (kind == w83783s)
836		client_name = "w83783s subclient";
837	else if (kind == w83627hf)
838		client_name = "w83627hf subclient";
839	else if (kind == as99127f)
840		client_name = "as99127f subclient";
841
842	for (i = 0; i <= 1; i++) {
843		/* store all data in w83781d */
844		i2c_set_clientdata(data->lm75[i], NULL);
845		data->lm75[i]->adapter = adapter;
846		data->lm75[i]->driver = &w83781d_driver;
847		data->lm75[i]->flags = 0;
848		strlcpy(data->lm75[i]->name, client_name,
849			I2C_NAME_SIZE);
850		if ((err = i2c_attach_client(data->lm75[i]))) {
851			dev_err(&new_client->dev, "Subclient %d "
852				"registration at address 0x%x "
853				"failed.\n", i, data->lm75[i]->addr);
854			if (i == 1)
855				goto ERROR_SC_3;
856			goto ERROR_SC_2;
857		}
858		if (kind == w83783s)
859			break;
860	}
861
862	return 0;
863
864/* Undo inits in case of errors */
865ERROR_SC_3:
866	i2c_detach_client(data->lm75[0]);
867ERROR_SC_2:
868	kfree(data->lm75[1]);
869ERROR_SC_1:
870	kfree(data->lm75[0]);
871ERROR_SC_0:
872	return err;
873}
874
875#define IN_UNIT_ATTRS(X)					\
876	&sensor_dev_attr_in##X##_input.dev_attr.attr,		\
877	&sensor_dev_attr_in##X##_min.dev_attr.attr,		\
878	&sensor_dev_attr_in##X##_max.dev_attr.attr
879
880#define FAN_UNIT_ATTRS(X)					\
881	&sensor_dev_attr_fan##X##_input.dev_attr.attr,		\
882	&sensor_dev_attr_fan##X##_min.dev_attr.attr,		\
883	&sensor_dev_attr_fan##X##_div.dev_attr.attr
884
885#define TEMP_UNIT_ATTRS(X)					\
886	&sensor_dev_attr_temp##X##_input.dev_attr.attr,		\
887	&sensor_dev_attr_temp##X##_max.dev_attr.attr,		\
888	&sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr
889
890static struct attribute* w83781d_attributes[] = {
891	IN_UNIT_ATTRS(0),
892	IN_UNIT_ATTRS(2),
893	IN_UNIT_ATTRS(3),
894	IN_UNIT_ATTRS(4),
895	IN_UNIT_ATTRS(5),
896	IN_UNIT_ATTRS(6),
897	FAN_UNIT_ATTRS(1),
898	FAN_UNIT_ATTRS(2),
899	FAN_UNIT_ATTRS(3),
900	TEMP_UNIT_ATTRS(1),
901	TEMP_UNIT_ATTRS(2),
902	&dev_attr_cpu0_vid.attr,
903	&dev_attr_vrm.attr,
904	&dev_attr_alarms.attr,
905	&dev_attr_beep_mask.attr,
906	&dev_attr_beep_enable.attr,
907	NULL
908};
909static const struct attribute_group w83781d_group = {
910	.attrs = w83781d_attributes,
911};
912
913static struct attribute *w83781d_attributes_opt[] = {
914	IN_UNIT_ATTRS(1),
915	IN_UNIT_ATTRS(7),
916	IN_UNIT_ATTRS(8),
917	TEMP_UNIT_ATTRS(3),
918	&sensor_dev_attr_pwm1.dev_attr.attr,
919	&sensor_dev_attr_pwm2.dev_attr.attr,
920	&sensor_dev_attr_pwm3.dev_attr.attr,
921	&sensor_dev_attr_pwm4.dev_attr.attr,
922	&dev_attr_pwm2_enable.attr,
923	&sensor_dev_attr_temp1_type.dev_attr.attr,
924	&sensor_dev_attr_temp2_type.dev_attr.attr,
925	&sensor_dev_attr_temp3_type.dev_attr.attr,
926	NULL
927};
928static const struct attribute_group w83781d_group_opt = {
929	.attrs = w83781d_attributes_opt,
930};
931
932/* No clean up is done on error, it's up to the caller */
933static int
934w83781d_create_files(struct device *dev, int kind, int is_isa)
935{
936	int err;
937
938	if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
939		return err;
940
941	if (kind != w83783s) {
942		if ((err = device_create_file(dev,
943				&sensor_dev_attr_in1_input.dev_attr))
944		    || (err = device_create_file(dev,
945				&sensor_dev_attr_in1_min.dev_attr))
946		    || (err = device_create_file(dev,
947				&sensor_dev_attr_in1_max.dev_attr)))
948			return err;
949	}
950	if (kind != as99127f && kind != w83781d && kind != w83783s) {
951		if ((err = device_create_file(dev,
952				&sensor_dev_attr_in7_input.dev_attr))
953		    || (err = device_create_file(dev,
954				&sensor_dev_attr_in7_min.dev_attr))
955		    || (err = device_create_file(dev,
956				&sensor_dev_attr_in7_max.dev_attr))
957		    || (err = device_create_file(dev,
958				&sensor_dev_attr_in8_input.dev_attr))
959		    || (err = device_create_file(dev,
960				&sensor_dev_attr_in8_min.dev_attr))
961		    || (err = device_create_file(dev,
962				&sensor_dev_attr_in8_max.dev_attr)))
963			return err;
964	}
965	if (kind != w83783s) {
966		if ((err = device_create_file(dev,
967				&sensor_dev_attr_temp3_input.dev_attr))
968		    || (err = device_create_file(dev,
969				&sensor_dev_attr_temp3_max.dev_attr))
970		    || (err = device_create_file(dev,
971				&sensor_dev_attr_temp3_max_hyst.dev_attr)))
972			return err;
973	}
974
975	if (kind != w83781d && kind != as99127f) {
976		if ((err = device_create_file(dev,
977				&sensor_dev_attr_pwm1.dev_attr))
978		    || (err = device_create_file(dev,
979				&sensor_dev_attr_pwm2.dev_attr))
980		    || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
981			return err;
982	}
983	if (kind == w83782d && !is_isa) {
984		if ((err = device_create_file(dev,
985				&sensor_dev_attr_pwm3.dev_attr))
986		    || (err = device_create_file(dev,
987				&sensor_dev_attr_pwm4.dev_attr)))
988			return err;
989	}
990
991	if (kind != as99127f && kind != w83781d) {
992		if ((err = device_create_file(dev,
993				&sensor_dev_attr_temp1_type.dev_attr))
994		    || (err = device_create_file(dev,
995				&sensor_dev_attr_temp2_type.dev_attr)))
996			return err;
997		if (kind != w83783s) {
998			if ((err = device_create_file(dev,
999					&sensor_dev_attr_temp3_type.dev_attr)))
1000				return err;
1001		}
1002	}
1003
1004	if (is_isa) {
1005		err = device_create_file(&pdev->dev, &dev_attr_name);
1006		if (err)
1007			return err;
1008	}
1009
1010	return 0;
1011}
1012
1013static int
1014w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1015{
1016	int val1 = 0, val2;
1017	struct i2c_client *client;
1018	struct device *dev;
1019	struct w83781d_data *data;
1020	int err;
1021	const char *client_name = "";
1022	enum vendor { winbond, asus } vendid;
1023
1024	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1025		err = -EINVAL;
1026		goto ERROR1;
1027	}
1028
1029	/* OK. For now, we presume we have a valid client. We now create the
1030	   client structure, even though we cannot fill it completely yet.
1031	   But it allows us to access w83781d_{read,write}_value. */
1032
1033	if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1034		err = -ENOMEM;
1035		goto ERROR1;
1036	}
1037
1038	client = &data->client;
1039	i2c_set_clientdata(client, data);
1040	client->addr = address;
1041	mutex_init(&data->lock);
1042	client->adapter = adapter;
1043	client->driver = &w83781d_driver;
1044	dev = &client->dev;
1045
1046	/* Now, we do the remaining detection. */
1047
1048	/* The w8378?d may be stuck in some other bank than bank 0. This may
1049	   make reading other information impossible. Specify a force=... or
1050	   force_*=... parameter, and the Winbond will be reset to the right
1051	   bank. */
1052	if (kind < 0) {
1053		if (w83781d_read_value(data, W83781D_REG_CONFIG) & 0x80) {
1054			dev_dbg(&adapter->dev, "Detection of w83781d chip "
1055				"failed at step 3\n");
1056			err = -ENODEV;
1057			goto ERROR2;
1058		}
1059		val1 = w83781d_read_value(data, W83781D_REG_BANK);
1060		val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1061		/* Check for Winbond or Asus ID if in bank 0 */
1062		if ((!(val1 & 0x07)) &&
1063		    (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1064		     || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1065			dev_dbg(&adapter->dev, "Detection of w83781d chip "
1066				"failed at step 4\n");
1067			err = -ENODEV;
1068			goto ERROR2;
1069		}
1070		/* If Winbond SMBus, check address at 0x48.
1071		   Asus doesn't support, except for as99127f rev.2 */
1072		if ((!(val1 & 0x80) && (val2 == 0xa3)) ||
1073		    ((val1 & 0x80) && (val2 == 0x5c))) {
1074			if (w83781d_read_value
1075			    (data, W83781D_REG_I2C_ADDR) != address) {
1076				dev_dbg(&adapter->dev, "Detection of w83781d "
1077					"chip failed at step 5\n");
1078				err = -ENODEV;
1079				goto ERROR2;
1080			}
1081		}
1082	}
1083
1084	/* We have either had a force parameter, or we have already detected the
1085	   Winbond. Put it now into bank 0 and Vendor ID High Byte */
1086	w83781d_write_value(data, W83781D_REG_BANK,
1087			    (w83781d_read_value(data, W83781D_REG_BANK)
1088			     & 0x78) | 0x80);
1089
1090	/* Determine the chip type. */
1091	if (kind <= 0) {
1092		/* get vendor ID */
1093		val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1094		if (val2 == 0x5c)
1095			vendid = winbond;
1096		else if (val2 == 0x12)
1097			vendid = asus;
1098		else {
1099			dev_dbg(&adapter->dev, "w83781d chip vendor is "
1100				"neither Winbond nor Asus\n");
1101			err = -ENODEV;
1102			goto ERROR2;
1103		}
1104
1105		val1 = w83781d_read_value(data, W83781D_REG_WCHIPID);
1106		if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1107			kind = w83781d;
1108		else if (val1 == 0x30 && vendid == winbond)
1109			kind = w83782d;
1110		else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1111			kind = w83783s;
1112		else if (val1 == 0x21 && vendid == winbond)
1113			kind = w83627hf;
1114		else if (val1 == 0x31 && address >= 0x28)
1115			kind = as99127f;
1116		else {
1117			if (kind == 0)
1118				dev_warn(&adapter->dev, "Ignoring 'force' "
1119					 "parameter for unknown chip at "
1120					 "address 0x%02x\n", address);
1121			err = -EINVAL;
1122			goto ERROR2;
1123		}
1124	}
1125
1126	if (kind == w83781d) {
1127		client_name = "w83781d";
1128	} else if (kind == w83782d) {
1129		client_name = "w83782d";
1130	} else if (kind == w83783s) {
1131		client_name = "w83783s";
1132	} else if (kind == w83627hf) {
1133		client_name = "w83627hf";
1134	} else if (kind == as99127f) {
1135		client_name = "as99127f";
1136	}
1137
1138	/* Fill in the remaining client fields and put into the global list */
1139	strlcpy(client->name, client_name, I2C_NAME_SIZE);
1140	data->type = kind;
1141
1142	/* Tell the I2C layer a new client has arrived */
1143	if ((err = i2c_attach_client(client)))
1144		goto ERROR2;
1145
1146	/* attach secondary i2c lm75-like clients */
1147	if ((err = w83781d_detect_subclients(adapter, address,
1148			kind, client)))
1149		goto ERROR3;
1150
1151	/* Initialize the chip */
1152	w83781d_init_device(dev);
1153
1154	/* Register sysfs hooks */
1155	err = w83781d_create_files(dev, kind, 0);
1156	if (err)
1157		goto ERROR4;
1158
1159	data->class_dev = hwmon_device_register(dev);
1160	if (IS_ERR(data->class_dev)) {
1161		err = PTR_ERR(data->class_dev);
1162		goto ERROR4;
1163	}
1164
1165	return 0;
1166
1167ERROR4:
1168	sysfs_remove_group(&dev->kobj, &w83781d_group);
1169	sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1170
1171	if (data->lm75[1]) {
1172		i2c_detach_client(data->lm75[1]);
1173		kfree(data->lm75[1]);
1174	}
1175	if (data->lm75[0]) {
1176		i2c_detach_client(data->lm75[0]);
1177		kfree(data->lm75[0]);
1178	}
1179ERROR3:
1180	i2c_detach_client(client);
1181ERROR2:
1182	kfree(data);
1183ERROR1:
1184	return err;
1185}
1186
1187static int
1188w83781d_detach_client(struct i2c_client *client)
1189{
1190	struct w83781d_data *data = i2c_get_clientdata(client);
1191	int err;
1192
1193	/* main client */
1194	if (data) {
1195		hwmon_device_unregister(data->class_dev);
1196		sysfs_remove_group(&client->dev.kobj, &w83781d_group);
1197		sysfs_remove_group(&client->dev.kobj, &w83781d_group_opt);
1198	}
1199
1200	if ((err = i2c_detach_client(client)))
1201		return err;
1202
1203	/* main client */
1204	if (data)
1205		kfree(data);
1206
1207	/* subclient */
1208	else
1209		kfree(client);
1210
1211	return 0;
1212}
1213
1214static int __devinit
1215w83781d_isa_probe(struct platform_device *pdev)
1216{
1217	int err, reg;
1218	struct w83781d_data *data;
1219	struct resource *res;
1220	const char *name;
1221
1222	/* Reserve the ISA region */
1223	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1224	if (!request_region(res->start, W83781D_EXTENT, "w83781d")) {
1225		err = -EBUSY;
1226		goto exit;
1227	}
1228
1229	if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1230		err = -ENOMEM;
1231		goto exit_release_region;
1232	}
1233	mutex_init(&data->lock);
1234	data->client.addr = res->start;
1235	i2c_set_clientdata(&data->client, data);
1236	platform_set_drvdata(pdev, data);
1237
1238	reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1239	switch (reg) {
1240	case 0x21:
1241		data->type = w83627hf;
1242		name = "w83627hf";
1243		break;
1244	case 0x30:
1245		data->type = w83782d;
1246		name = "w83782d";
1247		break;
1248	default:
1249		data->type = w83781d;
1250		name = "w83781d";
1251	}
1252	strlcpy(data->client.name, name, I2C_NAME_SIZE);
1253
1254	/* Initialize the W83781D chip */
1255	w83781d_init_device(&pdev->dev);
1256
1257	/* Register sysfs hooks */
1258	err = w83781d_create_files(&pdev->dev, data->type, 1);
1259	if (err)
1260		goto exit_remove_files;
1261
1262	data->class_dev = hwmon_device_register(&pdev->dev);
1263	if (IS_ERR(data->class_dev)) {
1264		err = PTR_ERR(data->class_dev);
1265		goto exit_remove_files;
1266	}
1267
1268	return 0;
1269
1270 exit_remove_files:
1271	sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1272	sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1273	device_remove_file(&pdev->dev, &dev_attr_name);
1274	kfree(data);
1275 exit_release_region:
1276	release_region(res->start, W83781D_EXTENT);
1277 exit:
1278	return err;
1279}
1280
1281static int __devexit
1282w83781d_isa_remove(struct platform_device *pdev)
1283{
1284	struct w83781d_data *data = platform_get_drvdata(pdev);
1285
1286	hwmon_device_unregister(data->class_dev);
1287	sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1288	sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1289	device_remove_file(&pdev->dev, &dev_attr_name);
1290	release_region(data->client.addr, W83781D_EXTENT);
1291	kfree(data);
1292
1293	return 0;
1294}
1295
1296/* The SMBus locks itself, usually, but nothing may access the Winbond between
1297   bank switches. ISA access must always be locked explicitly!
1298   We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1299   would slow down the W83781D access and should not be necessary.
1300   There are some ugly typecasts here, but the good news is - they should
1301   nowhere else be necessary! */
1302static int
1303w83781d_read_value(struct w83781d_data *data, u16 reg)
1304{
1305	struct i2c_client *client = &data->client;
1306	int res, word_sized, bank;
1307	struct i2c_client *cl;
1308
1309	mutex_lock(&data->lock);
1310	if (!client->driver) { /* ISA device */
1311		word_sized = (((reg & 0xff00) == 0x100)
1312			      || ((reg & 0xff00) == 0x200))
1313		    && (((reg & 0x00ff) == 0x50)
1314			|| ((reg & 0x00ff) == 0x53)
1315			|| ((reg & 0x00ff) == 0x55));
1316		if (reg & 0xff00) {
1317			outb_p(W83781D_REG_BANK,
1318			       client->addr + W83781D_ADDR_REG_OFFSET);
1319			outb_p(reg >> 8,
1320			       client->addr + W83781D_DATA_REG_OFFSET);
1321		}
1322		outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1323		res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1324		if (word_sized) {
1325			outb_p((reg & 0xff) + 1,
1326			       client->addr + W83781D_ADDR_REG_OFFSET);
1327			res =
1328			    (res << 8) + inb_p(client->addr +
1329					       W83781D_DATA_REG_OFFSET);
1330		}
1331		if (reg & 0xff00) {
1332			outb_p(W83781D_REG_BANK,
1333			       client->addr + W83781D_ADDR_REG_OFFSET);
1334			outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1335		}
1336	} else {
1337		bank = (reg >> 8) & 0x0f;
1338		if (bank > 2)
1339			/* switch banks */
1340			i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1341						  bank);
1342		if (bank == 0 || bank > 2) {
1343			res = i2c_smbus_read_byte_data(client, reg & 0xff);
1344		} else {
1345			/* switch to subclient */
1346			cl = data->lm75[bank - 1];
1347			/* convert from ISA to LM75 I2C addresses */
1348			switch (reg & 0xff) {
1349			case 0x50:	/* TEMP */
1350				res = swab16(i2c_smbus_read_word_data(cl, 0));
1351				break;
1352			case 0x52:	/* CONFIG */
1353				res = i2c_smbus_read_byte_data(cl, 1);
1354				break;
1355			case 0x53:	/* HYST */
1356				res = swab16(i2c_smbus_read_word_data(cl, 2));
1357				break;
1358			case 0x55:	/* OVER */
1359			default:
1360				res = swab16(i2c_smbus_read_word_data(cl, 3));
1361				break;
1362			}
1363		}
1364		if (bank > 2)
1365			i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1366	}
1367	mutex_unlock(&data->lock);
1368	return res;
1369}
1370
1371static int
1372w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1373{
1374	struct i2c_client *client = &data->client;
1375	int word_sized, bank;
1376	struct i2c_client *cl;
1377
1378	mutex_lock(&data->lock);
1379	if (!client->driver) { /* ISA device */
1380		word_sized = (((reg & 0xff00) == 0x100)
1381			      || ((reg & 0xff00) == 0x200))
1382		    && (((reg & 0x00ff) == 0x53)
1383			|| ((reg & 0x00ff) == 0x55));
1384		if (reg & 0xff00) {
1385			outb_p(W83781D_REG_BANK,
1386			       client->addr + W83781D_ADDR_REG_OFFSET);
1387			outb_p(reg >> 8,
1388			       client->addr + W83781D_DATA_REG_OFFSET);
1389		}
1390		outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1391		if (word_sized) {
1392			outb_p(value >> 8,
1393			       client->addr + W83781D_DATA_REG_OFFSET);
1394			outb_p((reg & 0xff) + 1,
1395			       client->addr + W83781D_ADDR_REG_OFFSET);
1396		}
1397		outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1398		if (reg & 0xff00) {
1399			outb_p(W83781D_REG_BANK,
1400			       client->addr + W83781D_ADDR_REG_OFFSET);
1401			outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1402		}
1403	} else {
1404		bank = (reg >> 8) & 0x0f;
1405		if (bank > 2)
1406			/* switch banks */
1407			i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1408						  bank);
1409		if (bank == 0 || bank > 2) {
1410			i2c_smbus_write_byte_data(client, reg & 0xff,
1411						  value & 0xff);
1412		} else {
1413			/* switch to subclient */
1414			cl = data->lm75[bank - 1];
1415			/* convert from ISA to LM75 I2C addresses */
1416			switch (reg & 0xff) {
1417			case 0x52:	/* CONFIG */
1418				i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1419				break;
1420			case 0x53:	/* HYST */
1421				i2c_smbus_write_word_data(cl, 2, swab16(value));
1422				break;
1423			case 0x55:	/* OVER */
1424				i2c_smbus_write_word_data(cl, 3, swab16(value));
1425				break;
1426			}
1427		}
1428		if (bank > 2)
1429			i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1430	}
1431	mutex_unlock(&data->lock);
1432	return 0;
1433}
1434
1435static void
1436w83781d_init_device(struct device *dev)
1437{
1438	struct w83781d_data *data = dev_get_drvdata(dev);
1439	int i, p;
1440	int type = data->type;
1441	u8 tmp;
1442
1443	if (type == w83627hf)
1444		dev_info(dev, "The W83627HF chip is better supported by the "
1445			 "w83627hf driver, support will be dropped from the "
1446			 "w83781d driver soon\n");
1447
1448	if (reset && type != as99127f) { /* this resets registers we don't have
1449					   documentation for on the as99127f */
1450		/* Resetting the chip has been the default for a long time,
1451		   but it causes the BIOS initializations (fan clock dividers,
1452		   thermal sensor types...) to be lost, so it is now optional.
1453		   It might even go away if nobody reports it as being useful,
1454		   as I see very little reason why this would be needed at
1455		   all. */
1456		dev_info(dev, "If reset=1 solved a problem you were "
1457			 "having, please report!\n");
1458
1459		/* save these registers */
1460		i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1461		p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1462		/* Reset all except Watchdog values and last conversion values
1463		   This sets fan-divs to 2, among others */
1464		w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1465		/* Restore the registers and disable power-on abnormal beep.
1466		   This saves FAN 1/2/3 input/output values set by BIOS. */
1467		w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1468		w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1469		/* Disable master beep-enable (reset turns it on).
1470		   Individual beep_mask should be reset to off but for some reason
1471		   disabling this bit helps some people not get beeped */
1472		w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1473	}
1474
1475	/* Disable power-on abnormal beep, as advised by the datasheet.
1476	   Already done if reset=1. */
1477	if (init && !reset && type != as99127f) {
1478		i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1479		w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1480	}
1481
1482	data->vrm = vid_which_vrm();
1483
1484	if ((type != w83781d) && (type != as99127f)) {
1485		tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1486		for (i = 1; i <= 3; i++) {
1487			if (!(tmp & BIT_SCFG1[i - 1])) {
1488				data->sens[i - 1] = W83781D_DEFAULT_BETA;
1489			} else {
1490				if (w83781d_read_value
1491				    (data,
1492				     W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1493					data->sens[i - 1] = 1;
1494				else
1495					data->sens[i - 1] = 2;
1496			}
1497			if (type == w83783s && i == 2)
1498				break;
1499		}
1500	}
1501
1502	if (init && type != as99127f) {
1503		/* Enable temp2 */
1504		tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1505		if (tmp & 0x01) {
1506			dev_warn(dev, "Enabling temp2, readings "
1507				 "might not make sense\n");
1508			w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1509				tmp & 0xfe);
1510		}
1511
1512		/* Enable temp3 */
1513		if (type != w83783s) {
1514			tmp = w83781d_read_value(data,
1515				W83781D_REG_TEMP3_CONFIG);
1516			if (tmp & 0x01) {
1517				dev_warn(dev, "Enabling temp3, "
1518					 "readings might not make sense\n");
1519				w83781d_write_value(data,
1520					W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1521			}
1522		}
1523	}
1524
1525	/* Start monitoring */
1526	w83781d_write_value(data, W83781D_REG_CONFIG,
1527			    (w83781d_read_value(data,
1528						W83781D_REG_CONFIG) & 0xf7)
1529			    | 0x01);
1530
1531	/* A few vars need to be filled upon startup */
1532	for (i = 0; i < 3; i++) {
1533		data->fan_min[i] = w83781d_read_value(data,
1534					W83781D_REG_FAN_MIN(i));
1535	}
1536
1537	mutex_init(&data->update_lock);
1538}
1539
1540static struct w83781d_data *w83781d_update_device(struct device *dev)
1541{
1542	struct w83781d_data *data = dev_get_drvdata(dev);
1543	struct i2c_client *client = &data->client;
1544	int i;
1545
1546	mutex_lock(&data->update_lock);
1547
1548	if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1549	    || !data->valid) {
1550		dev_dbg(dev, "Starting device update\n");
1551
1552		for (i = 0; i <= 8; i++) {
1553			if (data->type == w83783s && i == 1)
1554				continue;	/* 783S has no in1 */
1555			data->in[i] =
1556			    w83781d_read_value(data, W83781D_REG_IN(i));
1557			data->in_min[i] =
1558			    w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1559			data->in_max[i] =
1560			    w83781d_read_value(data, W83781D_REG_IN_MAX(i));
1561			if ((data->type != w83782d)
1562			    && (data->type != w83627hf) && (i == 6))
1563				break;
1564		}
1565		for (i = 0; i < 3; i++) {
1566			data->fan[i] =
1567			    w83781d_read_value(data, W83781D_REG_FAN(i));
1568			data->fan_min[i] =
1569			    w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1570		}
1571		if (data->type != w83781d && data->type != as99127f) {
1572			for (i = 0; i < 4; i++) {
1573				data->pwm[i] =
1574				    w83781d_read_value(data,
1575						       W83781D_REG_PWM[i]);
1576				if ((data->type != w83782d || !client->driver)
1577				    && i == 1)
1578					break;
1579			}
1580			/* Only PWM2 can be disabled */
1581			data->pwm2_enable = (w83781d_read_value(data,
1582					      W83781D_REG_PWMCLK12) & 0x08) >> 3;
1583		}
1584
1585		data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1586		data->temp_max =
1587		    w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1588		data->temp_max_hyst =
1589		    w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1590		data->temp_add[0] =
1591		    w83781d_read_value(data, W83781D_REG_TEMP(2));
1592		data->temp_max_add[0] =
1593		    w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1594		data->temp_max_hyst_add[0] =
1595		    w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
1596		if (data->type != w83783s) {
1597			data->temp_add[1] =
1598			    w83781d_read_value(data, W83781D_REG_TEMP(3));
1599			data->temp_max_add[1] =
1600			    w83781d_read_value(data,
1601					       W83781D_REG_TEMP_OVER(3));
1602			data->temp_max_hyst_add[1] =
1603			    w83781d_read_value(data,
1604					       W83781D_REG_TEMP_HYST(3));
1605		}
1606		i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
1607		data->vid = i & 0x0f;
1608		data->vid |= (w83781d_read_value(data,
1609					W83781D_REG_CHIPID) & 0x01) << 4;
1610		data->fan_div[0] = (i >> 4) & 0x03;
1611		data->fan_div[1] = (i >> 6) & 0x03;
1612		data->fan_div[2] = (w83781d_read_value(data,
1613					W83781D_REG_PIN) >> 6) & 0x03;
1614		if ((data->type != w83781d) && (data->type != as99127f)) {
1615			i = w83781d_read_value(data, W83781D_REG_VBAT);
1616			data->fan_div[0] |= (i >> 3) & 0x04;
1617			data->fan_div[1] |= (i >> 4) & 0x04;
1618			data->fan_div[2] |= (i >> 5) & 0x04;
1619		}
1620		if ((data->type == w83782d) || (data->type == w83627hf)) {
1621			data->alarms = w83781d_read_value(data,
1622						W83782D_REG_ALARM1)
1623				     | (w83781d_read_value(data,
1624						W83782D_REG_ALARM2) << 8)
1625				     | (w83781d_read_value(data,
1626						W83782D_REG_ALARM3) << 16);
1627		} else if (data->type == w83783s) {
1628			data->alarms = w83781d_read_value(data,
1629						W83782D_REG_ALARM1)
1630				     | (w83781d_read_value(data,
1631						W83782D_REG_ALARM2) << 8);
1632		} else {
1633			/* No real-time status registers, fall back to
1634			   interrupt status registers */
1635			data->alarms = w83781d_read_value(data,
1636						W83781D_REG_ALARM1)
1637				     | (w83781d_read_value(data,
1638						W83781D_REG_ALARM2) << 8);
1639		}
1640		i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1641		data->beep_enable = i >> 7;
1642		data->beep_mask = ((i & 0x7f) << 8) +
1643		    w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1644		if ((data->type != w83781d) && (data->type != as99127f)) {
1645			data->beep_mask |=
1646			    w83781d_read_value(data,
1647					       W83781D_REG_BEEP_INTS3) << 16;
1648		}
1649		data->last_updated = jiffies;
1650		data->valid = 1;
1651	}
1652
1653	mutex_unlock(&data->update_lock);
1654
1655	return data;
1656}
1657
1658/* return 1 if a supported chip is found, 0 otherwise */
1659static int __init
1660w83781d_isa_found(unsigned short address)
1661{
1662	int val, save, found = 0;
1663
1664	if (!request_region(address, W83781D_EXTENT, "w83781d"))
1665		return 0;
1666
1667#define REALLY_SLOW_IO
1668	/* We need the timeouts for at least some W83781D-like
1669	   chips. But only if we read 'undefined' registers. */
1670	val = inb_p(address + 1);
1671	if (inb_p(address + 2) != val
1672	 || inb_p(address + 3) != val
1673	 || inb_p(address + 7) != val) {
1674		pr_debug("w83781d: Detection failed at step 1\n");
1675		goto release;
1676	}
1677#undef REALLY_SLOW_IO
1678
1679	/* We should be able to change the 7 LSB of the address port. The
1680	   MSB (busy flag) should be clear initially, set after the write. */
1681	save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1682	if (save & 0x80) {
1683		pr_debug("w83781d: Detection failed at step 2\n");
1684		goto release;
1685	}
1686	val = ~save & 0x7f;
1687	outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1688	if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1689		outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1690		pr_debug("w83781d: Detection failed at step 3\n");
1691		goto release;
1692	}
1693
1694	/* We found a device, now see if it could be a W83781D */
1695	outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1696	val = inb_p(address + W83781D_DATA_REG_OFFSET);
1697	if (val & 0x80) {
1698		pr_debug("w83781d: Detection failed at step 4\n");
1699		goto release;
1700	}
1701	outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1702	save = inb_p(address + W83781D_DATA_REG_OFFSET);
1703	outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1704	val = inb_p(address + W83781D_DATA_REG_OFFSET);
1705	if ((!(save & 0x80) && (val != 0xa3))
1706	 || ((save & 0x80) && (val != 0x5c))) {
1707		pr_debug("w83781d: Detection failed at step 5\n");
1708		goto release;
1709	}
1710	outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1711	val = inb_p(address + W83781D_DATA_REG_OFFSET);
1712	if (val < 0x03 || val > 0x77) {	/* Not a valid I2C address */
1713		pr_debug("w83781d: Detection failed at step 6\n");
1714		goto release;
1715	}
1716
1717	/* The busy flag should be clear again */
1718	if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1719		pr_debug("w83781d: Detection failed at step 7\n");
1720		goto release;
1721	}
1722
1723	/* Determine the chip type */
1724	outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1725	save = inb_p(address + W83781D_DATA_REG_OFFSET);
1726	outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1727	outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1728	val = inb_p(address + W83781D_DATA_REG_OFFSET);
1729	if ((val & 0xfe) == 0x10	/* W83781D */
1730	 || val == 0x30			/* W83782D */
1731	 || val == 0x21)		/* W83627HF */
1732		found = 1;
1733
1734	if (found)
1735		pr_info("w83781d: Found a %s chip at %#x\n",
1736			val == 0x21 ? "W83627HF" :
1737			val == 0x30 ? "W83782D" : "W83781D", (int)address);
1738
1739 release:
1740	release_region(address, W83781D_EXTENT);
1741	return found;
1742}
1743
1744static int __init
1745w83781d_isa_device_add(unsigned short address)
1746{
1747	struct resource res = {
1748		.start	= address,
1749		.end	= address + W83781D_EXTENT,
1750		.name	= "w83781d",
1751		.flags	= IORESOURCE_IO,
1752	};
1753	int err;
1754
1755	pdev = platform_device_alloc("w83781d", address);
1756	if (!pdev) {
1757		err = -ENOMEM;
1758		printk(KERN_ERR "w83781d: Device allocation failed\n");
1759		goto exit;
1760	}
1761
1762	err = platform_device_add_resources(pdev, &res, 1);
1763	if (err) {
1764		printk(KERN_ERR "w83781d: Device resource addition failed "
1765		       "(%d)\n", err);
1766		goto exit_device_put;
1767	}
1768
1769	err = platform_device_add(pdev);
1770	if (err) {
1771		printk(KERN_ERR "w83781d: Device addition failed (%d)\n",
1772		       err);
1773		goto exit_device_put;
1774	}
1775
1776	return 0;
1777
1778 exit_device_put:
1779	platform_device_put(pdev);
1780 exit:
1781	pdev = NULL;
1782	return err;
1783}
1784
1785static int __init
1786sensors_w83781d_init(void)
1787{
1788	int res;
1789
1790	res = i2c_add_driver(&w83781d_driver);
1791	if (res)
1792		goto exit;
1793
1794	if (w83781d_isa_found(isa_address)) {
1795		res = platform_driver_register(&w83781d_isa_driver);
1796		if (res)
1797			goto exit_unreg_i2c_driver;
1798
1799		/* Sets global pdev as a side effect */
1800		res = w83781d_isa_device_add(isa_address);
1801		if (res)
1802			goto exit_unreg_isa_driver;
1803	}
1804
1805	return 0;
1806
1807 exit_unreg_isa_driver:
1808	platform_driver_unregister(&w83781d_isa_driver);
1809 exit_unreg_i2c_driver:
1810	i2c_del_driver(&w83781d_driver);
1811 exit:
1812	return res;
1813}
1814
1815static void __exit
1816sensors_w83781d_exit(void)
1817{
1818	if (pdev) {
1819		platform_device_unregister(pdev);
1820		platform_driver_unregister(&w83781d_isa_driver);
1821	}
1822	i2c_del_driver(&w83781d_driver);
1823}
1824
1825MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1826	      "Philip Edelbrock <phil@netroedge.com>, "
1827	      "and Mark Studebaker <mdsxyz123@yahoo.com>");
1828MODULE_DESCRIPTION("W83781D driver");
1829MODULE_LICENSE("GPL");
1830
1831module_init(sensors_w83781d_init);
1832module_exit(sensors_w83781d_exit);
1833