1/* 2 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the Free 6 * Software Foundation; either version 2 of the License, or (at your option) 7 * any later version. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 59 16 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17 * 18 * The full GNU General Public License is included in this distribution in the 19 * file called COPYING. 20 */ 21#ifndef IOATDMA_H 22#define IOATDMA_H 23 24#include <linux/dmaengine.h> 25#include "ioatdma_hw.h" 26#include <linux/init.h> 27#include <linux/dmapool.h> 28#include <linux/cache.h> 29#include <linux/pci_ids.h> 30 31#define IOAT_LOW_COMPLETION_MASK 0xffffffc0 32 33extern struct list_head dma_device_list; 34extern struct list_head dma_client_list; 35 36/** 37 * struct ioat_device - internal representation of a IOAT device 38 * @pdev: PCI-Express device 39 * @reg_base: MMIO register space base address 40 * @dma_pool: for allocating DMA descriptors 41 * @common: embedded struct dma_device 42 * @msi: Message Signaled Interrupt number 43 */ 44 45struct ioat_device { 46 struct pci_dev *pdev; 47 void __iomem *reg_base; 48 struct pci_pool *dma_pool; 49 struct pci_pool *completion_pool; 50 51 struct dma_device common; 52 u8 msi; 53}; 54 55/** 56 * struct ioat_dma_chan - internal representation of a DMA channel 57 * @device: 58 * @reg_base: 59 * @sw_in_use: 60 * @completion: 61 * @completion_low: 62 * @completion_high: 63 * @completed_cookie: last cookie seen completed on cleanup 64 * @cookie: value of last cookie given to client 65 * @last_completion: 66 * @xfercap: 67 * @desc_lock: 68 * @free_desc: 69 * @used_desc: 70 * @resource: 71 * @device_node: 72 */ 73 74struct ioat_dma_chan { 75 76 void __iomem *reg_base; 77 78 dma_cookie_t completed_cookie; 79 unsigned long last_completion; 80 81 u32 xfercap; /* XFERCAP register value expanded out */ 82 83 spinlock_t cleanup_lock; 84 spinlock_t desc_lock; 85 struct list_head free_desc; 86 struct list_head used_desc; 87 88 int pending; 89 90 struct ioat_device *device; 91 struct dma_chan common; 92 93 dma_addr_t completion_addr; 94 union { 95 u64 full; /* HW completion writeback */ 96 struct { 97 u32 low; 98 u32 high; 99 }; 100 } *completion_virt; 101}; 102 103/* wrapper around hardware descriptor format + additional software fields */ 104 105/** 106 * struct ioat_desc_sw - wrapper around hardware descriptor 107 * @hw: hardware DMA descriptor 108 * @node: 109 * @cookie: 110 * @phys: 111 */ 112 113struct ioat_desc_sw { 114 struct ioat_dma_descriptor *hw; 115 struct list_head node; 116 dma_cookie_t cookie; 117 dma_addr_t phys; 118 DECLARE_PCI_UNMAP_ADDR(src) 119 DECLARE_PCI_UNMAP_LEN(src_len) 120 DECLARE_PCI_UNMAP_ADDR(dst) 121 DECLARE_PCI_UNMAP_LEN(dst_len) 122}; 123 124#endif /* IOATDMA_H */ 125