1/*
2 * arch/v850/kernel/anna.c -- Anna V850E2 evaluation chip/board
3 *
4 *  Copyright (C) 2002,03  NEC Electronics Corporation
5 *  Copyright (C) 2002,03  Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License.  See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/init.h>
17#include <linux/bootmem.h>
18#include <linux/major.h>
19#include <linux/irq.h>
20
21#include <asm/machdep.h>
22#include <asm/atomic.h>
23#include <asm/page.h>
24#include <asm/v850e_timer_d.h>
25#include <asm/v850e_uart.h>
26
27#include "mach.h"
28
29
30/* SRAM and SDRAM are vaguely contiguous (with a big hole in between; see
31   mach_reserve_bootmem for details); use both as one big area.  */
32#define RAM_START 	SRAM_ADDR
33#define RAM_END		(SDRAM_ADDR + SDRAM_SIZE)
34
35/* The bits of this port are connected to an 8-LED bar-graph.  */
36#define LEDS_PORT	0
37
38
39static void anna_led_tick (void);
40
41
42void __init mach_early_init (void)
43{
44	ANNA_ILBEN    = 0;
45
46	V850E2_CSC(0) = 0x402F;
47	V850E2_CSC(1) = 0x4000;
48	V850E2_BPC    = 0;
49	V850E2_BSC    = 0xAAAA;
50	V850E2_BEC    = 0;
51
52	V850E2_BHC    = 0;	/* cache no memory */
53	V850E2_BCT(0) = 0xB088;
54	V850E2_BCT(1) = 0x0008;
55	V850E2_DWC(0) = 0x0027;
56	V850E2_DWC(1) = 0;
57	V850E2_BCC    = 0x0006;
58	V850E2_ASC    = 0;
59	V850E2_LBS    = 0x0089;
60	V850E2_SCR(3) = 0x21A9;
61	V850E2_RFS(3) = 0x8121;
62
63	v850e_intc_disable_irqs ();
64}
65
66void __init mach_setup (char **cmdline)
67{
68	ANNA_PORT_PM (LEDS_PORT) = 0;	/* Make all LED pins output pins.  */
69	mach_tick = anna_led_tick;
70}
71
72void __init mach_get_physical_ram (unsigned long *ram_start,
73				   unsigned long *ram_len)
74{
75	*ram_start = RAM_START;
76	*ram_len = RAM_END - RAM_START;
77}
78
79void __init mach_reserve_bootmem ()
80{
81	/* The space between SRAM and SDRAM is filled with duplicate
82	   images of SRAM.  Prevent the kernel from using them.  */
83	reserve_bootmem (SRAM_ADDR + SRAM_SIZE,
84			 SDRAM_ADDR - (SRAM_ADDR + SRAM_SIZE));
85}
86
87void mach_gettimeofday (struct timespec *tv)
88{
89	tv->tv_sec = 0;
90	tv->tv_nsec = 0;
91}
92
93void __init mach_sched_init (struct irqaction *timer_action)
94{
95	/* Start hardware timer.  */
96	v850e_timer_d_configure (0, HZ);
97	/* Install timer interrupt handler.  */
98	setup_irq (IRQ_INTCMD(0), timer_action);
99}
100
101static struct v850e_intc_irq_init irq_inits[] = {
102	{ "IRQ", 0, 		NUM_MACH_IRQS,	1, 7 },
103	{ "PIN", IRQ_INTP(0),   IRQ_INTP_NUM,   1, 4 },
104	{ "CCC", IRQ_INTCCC(0),	IRQ_INTCCC_NUM, 1, 5 },
105	{ "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM,	1, 5 },
106	{ "DMA", IRQ_INTDMA(0), IRQ_INTDMA_NUM,	1, 2 },
107	{ "DMXER", IRQ_INTDMXER,1,		1, 2 },
108	{ "SRE", IRQ_INTSRE(0), IRQ_INTSRE_NUM,	3, 3 },
109	{ "SR",	 IRQ_INTSR(0),	IRQ_INTSR_NUM, 	3, 4 },
110	{ "ST",  IRQ_INTST(0), 	IRQ_INTST_NUM, 	3, 5 },
111	{ 0 }
112};
113#define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1)
114
115static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS];
116
117void __init mach_init_irqs (void)
118{
119	v850e_intc_init_irq_types (irq_inits, hw_itypes);
120}
121
122void machine_restart (char *__unused)
123{
124#ifdef CONFIG_RESET_GUARD
125	disable_reset_guard ();
126#endif
127	asm ("jmp r0"); /* Jump to the reset vector.  */
128}
129
130void machine_halt (void)
131{
132#ifdef CONFIG_RESET_GUARD
133	disable_reset_guard ();
134#endif
135	local_irq_disable ();	/* Ignore all interrupts.  */
136	ANNA_PORT_IO(LEDS_PORT) = 0xAA;	/* Note that we halted.  */
137	for (;;)
138		asm ("halt; nop; nop; nop; nop; nop");
139}
140
141void machine_power_off (void)
142{
143	machine_halt ();
144}
145
146/* Called before configuring an on-chip UART.  */
147void anna_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud)
148{
149	/* The Anna connects some general-purpose I/O pins on the CPU to
150	   the RTS/CTS lines of UART 1's serial connection.  I/O pins P07
151	   and P37 are RTS and CTS respectively.  */
152	if (chan == 1) {
153		ANNA_PORT_PM(0) &= ~0x80; /* P07 in output mode */
154		ANNA_PORT_PM(3) |=  0x80; /* P37 in input mode */
155	}
156}
157
158/* Minimum and maximum bounds for the moving upper LED boundary in the
159   clock tick display.  We can't use the last bit because it's used for
160   UART0's CTS output.  */
161#define MIN_MAX_POS 0
162#define MAX_MAX_POS 6
163
164/* There are MAX_MAX_POS^2 - MIN_MAX_POS^2 cycles in the animation, so if
165   we pick 6 and 0 as above, we get 49 cycles, which is when divided into
166   the standard 100 value for HZ, gives us an almost 1s total time.  */
167#define TICKS_PER_FRAME \
168	(HZ / (MAX_MAX_POS * MAX_MAX_POS - MIN_MAX_POS * MIN_MAX_POS))
169
170static void anna_led_tick ()
171{
172	static unsigned counter = 0;
173
174	if (++counter == TICKS_PER_FRAME) {
175		static int pos = 0, max_pos = MAX_MAX_POS, dir = 1;
176
177		if (dir > 0 && pos == max_pos) {
178			dir = -1;
179			if (max_pos == MIN_MAX_POS)
180				max_pos = MAX_MAX_POS;
181			else
182				max_pos--;
183		} else {
184			if (dir < 0 && pos == 0)
185				dir = 1;
186
187			if (pos + dir <= max_pos) {
188				/* Each bit of port 0 has a LED. */
189				clear_bit (pos, &ANNA_PORT_IO(LEDS_PORT));
190				pos += dir;
191				set_bit (pos, &ANNA_PORT_IO(LEDS_PORT));
192			}
193		}
194
195		counter = 0;
196	}
197}
198