1/*
2 * Board setup routines for the Motorola MVME5100.
3 *
4 * Author: Matt Porter <mporter@mvista.com>
5 *
6 * 2001-2004 (c) MontaVista, Software, Inc.  This file is licensed under
7 * the terms of the GNU General Public License version 2.  This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11
12#include <linux/stddef.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/errno.h>
16#include <linux/pci.h>
17#include <linux/initrd.h>
18#include <linux/console.h>
19#include <linux/delay.h>
20#include <linux/ide.h>
21#include <linux/seq_file.h>
22#include <linux/kdev_t.h>
23#include <linux/root_dev.h>
24
25#include <asm/system.h>
26#include <asm/pgtable.h>
27#include <asm/page.h>
28#include <asm/dma.h>
29#include <asm/io.h>
30#include <asm/machdep.h>
31#include <asm/open_pic.h>
32#include <asm/i8259.h>
33#include <asm/todc.h>
34#include <asm/pci-bridge.h>
35#include <asm/bootinfo.h>
36#include <asm/hawk.h>
37
38#include <platforms/pplus.h>
39#include <platforms/mvme5100.h>
40
41static u_char mvme5100_openpic_initsenses[16] __initdata = {
42	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* i8259 cascade */
43	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* TL16C550 UART 1,2 */
44	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet1 front panel or P2 */
45	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Hawk Watchdog 1,2 */
46	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* DS1621 thermal alarm */
47	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT0# */
48	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT1# */
49	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT2# */
50	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT3# */
51	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTA#, PMC2 INTB# */
52	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTB#, PMC2 INTC# */
53	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTC#, PMC2 INTD# */
54	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTD#, PMC2 INTA# */
55	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet 2 (front panel) */
56	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Abort Switch */
57	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* RTC Alarm */
58};
59
60static inline int
61mvme5100_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
62{
63	int irq;
64
65	static char pci_irq_table[][4] =
66	/*
67	 *	PCI IDSEL/INTPIN->INTLINE
68	 * 	   A   B   C   D
69	 */
70	{
71		{  0,  0,  0,  0 },	/* IDSEL 11 - Winbond */
72		{  0,  0,  0,  0 },	/* IDSEL 12 - unused */
73		{ 21, 22, 23, 24 },	/* IDSEL 13 - Universe II */
74		{ 18,  0,  0,  0 },	/* IDSEL 14 - Enet 1 */
75		{  0,  0,  0,  0 },	/* IDSEL 15 - unused */
76		{ 25, 26, 27, 28 },	/* IDSEL 16 - PMC Slot 1 */
77		{ 28, 25, 26, 27 },	/* IDSEL 17 - PMC Slot 2 */
78		{  0,  0,  0,  0 },	/* IDSEL 18 - unused */
79		{ 29,  0,  0,  0 },	/* IDSEL 19 - Enet 2 */
80		{  0,  0,  0,  0 },	/* IDSEL 20 - PMCSPAN */
81	};
82
83	const long min_idsel = 11, max_idsel = 20, irqs_per_slot = 4;
84	irq = PCI_IRQ_TABLE_LOOKUP;
85	/* If lookup is zero, always return 0 */
86	if (!irq)
87		return 0;
88	else
89#ifdef CONFIG_MVME5100_IPMC761_PRESENT
90	/* If IPMC761 present, return table value */
91	return irq;
92#else
93	/* If IPMC761 not present, we don't have an i8259 so adjust */
94	return (irq - NUM_8259_INTERRUPTS);
95#endif
96}
97
98static void
99mvme5100_pcibios_fixup_resources(struct pci_dev *dev)
100{
101	int i;
102
103	if ((dev->vendor == PCI_VENDOR_ID_MOTOROLA) &&
104			(dev->device == PCI_DEVICE_ID_MOTOROLA_HAWK))
105		for (i=0; i<DEVICE_COUNT_RESOURCE; i++)
106		{
107			dev->resource[i].start = 0;
108			dev->resource[i].end = 0;
109		}
110}
111
112static void __init
113mvme5100_setup_bridge(void)
114{
115	struct pci_controller*	hose;
116
117	hose = pcibios_alloc_controller();
118
119	if (!hose)
120		return;
121
122	hose->first_busno = 0;
123	hose->last_busno = 0xff;
124	hose->pci_mem_offset = MVME5100_PCI_MEM_OFFSET;
125
126	pci_init_resource(&hose->io_resource, MVME5100_PCI_LOWER_IO,
127			MVME5100_PCI_UPPER_IO, IORESOURCE_IO,
128			"PCI host bridge");
129
130	pci_init_resource(&hose->mem_resources[0], MVME5100_PCI_LOWER_MEM,
131			MVME5100_PCI_UPPER_MEM, IORESOURCE_MEM,
132			"PCI host bridge");
133
134	hose->io_space.start = MVME5100_PCI_LOWER_IO;
135	hose->io_space.end = MVME5100_PCI_UPPER_IO;
136	hose->mem_space.start = MVME5100_PCI_LOWER_MEM;
137	hose->mem_space.end = MVME5100_PCI_UPPER_MEM;
138	hose->io_base_virt = (void *)MVME5100_ISA_IO_BASE;
139
140	/* Use indirect method of Hawk */
141	setup_indirect_pci(hose, MVME5100_PCI_CONFIG_ADDR,
142			MVME5100_PCI_CONFIG_DATA);
143
144	hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
145
146	ppc_md.pcibios_fixup_resources = mvme5100_pcibios_fixup_resources;
147	ppc_md.pci_swizzle = common_swizzle;
148	ppc_md.pci_map_irq = mvme5100_map_irq;
149}
150
151static void __init
152mvme5100_setup_arch(void)
153{
154	if ( ppc_md.progress )
155		ppc_md.progress("mvme5100_setup_arch: enter", 0);
156
157	loops_per_jiffy = 50000000 / HZ;
158
159#ifdef CONFIG_BLK_DEV_INITRD
160	if (initrd_start)
161		ROOT_DEV = Root_RAM0;
162	else
163#endif
164#ifdef	CONFIG_ROOT_NFS
165		ROOT_DEV = Root_NFS;
166#else
167		ROOT_DEV = Root_SDA2;
168#endif
169
170	if ( ppc_md.progress )
171		ppc_md.progress("mvme5100_setup_arch: find_bridges", 0);
172
173	/* Setup PCI host bridge */
174	mvme5100_setup_bridge();
175
176	/* Find and map our OpenPIC */
177	hawk_mpic_init(MVME5100_PCI_MEM_OFFSET);
178	OpenPIC_InitSenses = mvme5100_openpic_initsenses;
179	OpenPIC_NumInitSenses = sizeof(mvme5100_openpic_initsenses);
180
181	printk("MVME5100 port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n");
182
183	if ( ppc_md.progress )
184		ppc_md.progress("mvme5100_setup_arch: exit", 0);
185
186	return;
187}
188
189static void __init
190mvme5100_init2(void)
191{
192#ifdef CONFIG_MVME5100_IPMC761_PRESENT
193		request_region(0x00,0x20,"dma1");
194		request_region(0x20,0x20,"pic1");
195		request_region(0x40,0x20,"timer");
196		request_region(0x80,0x10,"dma page reg");
197		request_region(0xa0,0x20,"pic2");
198		request_region(0xc0,0x20,"dma2");
199#endif
200	return;
201}
202
203/*
204 * Interrupt setup and service.
205 * Have MPIC on HAWK and cascaded 8259s on Winbond cascaded to MPIC.
206 */
207static void __init
208mvme5100_init_IRQ(void)
209{
210#ifdef CONFIG_MVME5100_IPMC761_PRESENT
211	int i;
212#endif
213
214	if ( ppc_md.progress )
215		ppc_md.progress("init_irq: enter", 0);
216
217	openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
218#ifdef CONFIG_MVME5100_IPMC761_PRESENT
219	openpic_init(NUM_8259_INTERRUPTS);
220	openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
221			&i8259_irq);
222
223	i8259_init(0, 0);
224#else
225	openpic_init(0);
226#endif
227
228	if ( ppc_md.progress )
229		ppc_md.progress("init_irq: exit", 0);
230
231	return;
232}
233
234/*
235 * Set BAT 3 to map 0xf0000000 to end of physical memory space.
236 */
237static __inline__ void
238mvme5100_set_bat(void)
239{
240	mb();
241	mtspr(SPRN_DBAT1U, 0xf0001ffe);
242	mtspr(SPRN_DBAT1L, 0xf000002a);
243	mb();
244}
245
246static unsigned long __init
247mvme5100_find_end_of_memory(void)
248{
249	return hawk_get_mem_size(MVME5100_HAWK_SMC_BASE);
250}
251
252static void __init
253mvme5100_map_io(void)
254{
255	io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO);
256	ioremap_base = 0xfe000000;
257}
258
259static void
260mvme5100_reset_board(void)
261{
262	local_irq_disable();
263
264	/* Set exception prefix high - to the firmware */
265	_nmask_and_or_msr(0, MSR_IP);
266
267	out_8((u_char *)MVME5100_BOARD_MODRST_REG, 0x01);
268
269	return;
270}
271
272static void
273mvme5100_restart(char *cmd)
274{
275	volatile ulong i = 10000000;
276
277	mvme5100_reset_board();
278
279	while (i-- > 0);
280	panic("restart failed\n");
281}
282
283static void
284mvme5100_halt(void)
285{
286	local_irq_disable();
287	while (1);
288}
289
290static void
291mvme5100_power_off(void)
292{
293	mvme5100_halt();
294}
295
296static int
297mvme5100_show_cpuinfo(struct seq_file *m)
298{
299	seq_printf(m, "vendor\t\t: Motorola\n");
300	seq_printf(m, "machine\t\t: MVME5100\n");
301
302	return 0;
303}
304
305TODC_ALLOC();
306
307void __init
308platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
309	      unsigned long r6, unsigned long r7)
310{
311	parse_bootinfo(find_bootinfo());
312	mvme5100_set_bat();
313
314	isa_io_base = MVME5100_ISA_IO_BASE;
315	isa_mem_base = MVME5100_ISA_MEM_BASE;
316	pci_dram_offset = MVME5100_PCI_DRAM_OFFSET;
317
318	ppc_md.setup_arch = mvme5100_setup_arch;
319	ppc_md.show_cpuinfo = mvme5100_show_cpuinfo;
320	ppc_md.init_IRQ = mvme5100_init_IRQ;
321	ppc_md.get_irq = openpic_get_irq;
322	ppc_md.init = mvme5100_init2;
323
324	ppc_md.restart = mvme5100_restart;
325	ppc_md.power_off = mvme5100_power_off;
326	ppc_md.halt = mvme5100_halt;
327
328	ppc_md.find_end_of_memory = mvme5100_find_end_of_memory;
329	ppc_md.setup_io_mappings = mvme5100_map_io;
330
331	TODC_INIT(TODC_TYPE_MK48T37, MVME5100_NVRAM_AS0, MVME5100_NVRAM_AS1,
332			MVME5100_NVRAM_DATA, 8);
333
334	ppc_md.time_init = todc_time_init;
335	ppc_md.set_rtc_time = todc_set_rtc_time;
336	ppc_md.get_rtc_time = todc_get_rtc_time;
337	ppc_md.calibrate_decr = todc_calibrate_decr;
338
339	ppc_md.nvram_read_val = todc_m48txx_read_val;
340	ppc_md.nvram_write_val = todc_m48txx_write_val;
341}
342