1/* 2 * A routine to find out how much memory the machine has. 3 * 4 * Based on: 5 * arch/ppc/kernel/mpc10x_common.c 6 * 7 * Author: Mark A. Greer 8 * mgreer@mvista.com 9 * 10 * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under 11 * the terms of the GNU General Public License version 2. This program 12 * is licensed "as is" without any warranty of any kind, whether express 13 * or implied. 14 */ 15 16#include <linux/pci.h> 17#include <asm/types.h> 18#include <asm/io.h> 19#include "mpc10x.h" 20 21/* 22 * *** WARNING - A BAT MUST be set to access the PCI config addr/data regs *** 23 */ 24 25/* 26 * PCI config space macros, similar to indirect_xxx and early_xxx macros. 27 * We assume bus 0. 28 */ 29#define MPC10X_CFG_read(val, addr, type, op) *val = op((type)(addr)) 30#define MPC10X_CFG_write(val, addr, type, op) op((type *)(addr), (val)) 31 32#define MPC10X_PCI_OP(rw, size, type, op, mask) \ 33static void \ 34mpc10x_##rw##_config_##size(unsigned int __iomem *cfg_addr, \ 35 unsigned int *cfg_data, int devfn, int offset, \ 36 type val) \ 37{ \ 38 out_be32(cfg_addr, \ 39 ((offset & 0xfc) << 24) | (devfn << 16) \ 40 | (0 << 8) | 0x80); \ 41 MPC10X_CFG_##rw(val, cfg_data + (offset & mask), type, op); \ 42 return; \ 43} 44 45MPC10X_PCI_OP(read, byte, u8 *, in_8, 3) 46MPC10X_PCI_OP(read, dword, u32 *, in_le32, 0) 47 48/* 49 * Read the memory controller registers to determine the amount of memory in 50 * the system. This assumes that the firmware has correctly set up the memory 51 * controller registers. On CONFIG_PPC_PREP, we know we are being called 52 * under a PReP memory map. On all other machines, we assume we are under 53 * a CHRP memory map. Further, on CONFIG_PPC_PREP we must rename 54 * this function. 55 */ 56#ifdef CONFIG_PPC_PREP 57#define get_mem_size mpc10x_get_mem_size 58#endif 59unsigned long 60get_mem_size(void) 61{ 62 unsigned int *config_addr, *config_data, val; 63 unsigned long start, end, total, offset; 64 int i; 65 unsigned char bank_enables; 66 67#ifdef CONFIG_PPC_PREP 68 config_addr = (unsigned int *)MPC10X_MAPA_CNFG_ADDR; 69 config_data = (unsigned int *)MPC10X_MAPA_CNFG_DATA; 70#else 71 config_addr = (unsigned int *)MPC10X_MAPB_CNFG_ADDR; 72 config_data = (unsigned int *)MPC10X_MAPB_CNFG_DATA; 73#endif 74 75 mpc10x_read_config_byte(config_addr, config_data, PCI_DEVFN(0,0), 76 MPC10X_MCTLR_MEM_BANK_ENABLES, &bank_enables); 77 78 total = 0; 79 80 for (i = 0; i < 8; i++) { 81 if (bank_enables & (1 << i)) { 82 offset = MPC10X_MCTLR_MEM_START_1 + ((i > 3) ? 4 : 0); 83 mpc10x_read_config_dword(config_addr, config_data, 84 PCI_DEVFN(0,0), offset, &val); 85 start = (val >> ((i & 3) << 3)) & 0xff; 86 87 offset = MPC10X_MCTLR_EXT_MEM_START_1 + ((i>3) ? 4 : 0); 88 mpc10x_read_config_dword(config_addr, config_data, 89 PCI_DEVFN(0,0), offset, &val); 90 val = (val >> ((i & 3) << 3)) & 0x03; 91 start = (val << 28) | (start << 20); 92 93 offset = MPC10X_MCTLR_MEM_END_1 + ((i > 3) ? 4 : 0); 94 mpc10x_read_config_dword(config_addr, config_data, 95 PCI_DEVFN(0,0), offset, &val); 96 end = (val >> ((i & 3) << 3)) & 0xff; 97 98 offset = MPC10X_MCTLR_EXT_MEM_END_1 + ((i > 3) ? 4 : 0); 99 mpc10x_read_config_dword(config_addr, config_data, 100 PCI_DEVFN(0,0), offset, &val); 101 val = (val >> ((i & 3) << 3)) & 0x03; 102 end = (val << 28) | (end << 20) | 0xfffff; 103 104 total += (end - start + 1); 105 } 106 } 107 108 return total; 109} 110