1/* 2 * arch/powerpc/platforms/powermac/low_i2c.c 3 * 4 * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org) 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 * 11 * The linux i2c layer isn't completely suitable for our needs for various 12 * reasons ranging from too late initialisation to semantics not perfectly 13 * matching some requirements of the apple platform functions etc... 14 * 15 * This file thus provides a simple low level unified i2c interface for 16 * powermac that covers the various types of i2c busses used in Apple machines. 17 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit 18 * banging busses found on older chipstes in earlier machines if we ever need 19 * one of them. 20 * 21 * The drivers in this file are synchronous/blocking. In addition, the 22 * keywest one is fairly slow due to the use of msleep instead of interrupts 23 * as the interrupt is currently used by i2c-keywest. In the long run, we 24 * might want to get rid of those high-level interfaces to linux i2c layer 25 * either completely (converting all drivers) or replacing them all with a 26 * single stub driver on top of this one. Once done, the interrupt will be 27 * available for our use. 28 */ 29 30#undef DEBUG 31#undef DEBUG_LOW 32 33#include <linux/types.h> 34#include <linux/sched.h> 35#include <linux/init.h> 36#include <linux/module.h> 37#include <linux/adb.h> 38#include <linux/pmu.h> 39#include <linux/delay.h> 40#include <linux/completion.h> 41#include <linux/platform_device.h> 42#include <linux/interrupt.h> 43#include <linux/completion.h> 44#include <linux/timer.h> 45#include <asm/keylargo.h> 46#include <asm/uninorth.h> 47#include <asm/io.h> 48#include <asm/prom.h> 49#include <asm/machdep.h> 50#include <asm/smu.h> 51#include <asm/pmac_pfunc.h> 52#include <asm/pmac_low_i2c.h> 53 54#ifdef DEBUG 55#define DBG(x...) do {\ 56 printk(KERN_DEBUG "low_i2c:" x); \ 57 } while(0) 58#else 59#define DBG(x...) 60#endif 61 62#ifdef DEBUG_LOW 63#define DBG_LOW(x...) do {\ 64 printk(KERN_DEBUG "low_i2c:" x); \ 65 } while(0) 66#else 67#define DBG_LOW(x...) 68#endif 69 70 71static int pmac_i2c_force_poll = 1; 72 73/* 74 * A bus structure. Each bus in the system has such a structure associated. 75 */ 76struct pmac_i2c_bus 77{ 78 struct list_head link; 79 struct device_node *controller; 80 struct device_node *busnode; 81 int type; 82 int flags; 83 struct i2c_adapter *adapter; 84 void *hostdata; 85 int channel; /* some hosts have multiple */ 86 int mode; /* current mode */ 87 struct semaphore sem; 88 int opened; 89 int polled; /* open mode */ 90 struct platform_device *platform_dev; 91 92 /* ops */ 93 int (*open)(struct pmac_i2c_bus *bus); 94 void (*close)(struct pmac_i2c_bus *bus); 95 int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 96 u32 subaddr, u8 *data, int len); 97}; 98 99static LIST_HEAD(pmac_i2c_busses); 100 101/* 102 * Keywest implementation 103 */ 104 105struct pmac_i2c_host_kw 106{ 107 struct semaphore mutex; /* Access mutex for use by 108 * i2c-keywest */ 109 void __iomem *base; /* register base address */ 110 int bsteps; /* register stepping */ 111 int speed; /* speed */ 112 int irq; 113 u8 *data; 114 unsigned len; 115 int state; 116 int rw; 117 int polled; 118 int result; 119 struct completion complete; 120 spinlock_t lock; 121 struct timer_list timeout_timer; 122}; 123 124/* Register indices */ 125typedef enum { 126 reg_mode = 0, 127 reg_control, 128 reg_status, 129 reg_isr, 130 reg_ier, 131 reg_addr, 132 reg_subaddr, 133 reg_data 134} reg_t; 135 136/* The Tumbler audio equalizer can be really slow sometimes */ 137#define KW_POLL_TIMEOUT (2*HZ) 138 139/* Mode register */ 140#define KW_I2C_MODE_100KHZ 0x00 141#define KW_I2C_MODE_50KHZ 0x01 142#define KW_I2C_MODE_25KHZ 0x02 143#define KW_I2C_MODE_DUMB 0x00 144#define KW_I2C_MODE_STANDARD 0x04 145#define KW_I2C_MODE_STANDARDSUB 0x08 146#define KW_I2C_MODE_COMBINED 0x0C 147#define KW_I2C_MODE_MODE_MASK 0x0C 148#define KW_I2C_MODE_CHAN_MASK 0xF0 149 150/* Control register */ 151#define KW_I2C_CTL_AAK 0x01 152#define KW_I2C_CTL_XADDR 0x02 153#define KW_I2C_CTL_STOP 0x04 154#define KW_I2C_CTL_START 0x08 155 156/* Status register */ 157#define KW_I2C_STAT_BUSY 0x01 158#define KW_I2C_STAT_LAST_AAK 0x02 159#define KW_I2C_STAT_LAST_RW 0x04 160#define KW_I2C_STAT_SDA 0x08 161#define KW_I2C_STAT_SCL 0x10 162 163/* IER & ISR registers */ 164#define KW_I2C_IRQ_DATA 0x01 165#define KW_I2C_IRQ_ADDR 0x02 166#define KW_I2C_IRQ_STOP 0x04 167#define KW_I2C_IRQ_START 0x08 168#define KW_I2C_IRQ_MASK 0x0F 169 170/* State machine states */ 171enum { 172 state_idle, 173 state_addr, 174 state_read, 175 state_write, 176 state_stop, 177 state_dead 178}; 179 180#define WRONG_STATE(name) do {\ 181 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \ 182 "(isr: %02x)\n", \ 183 name, __kw_state_names[host->state], isr); \ 184 } while(0) 185 186static const char *__kw_state_names[] = { 187 "state_idle", 188 "state_addr", 189 "state_read", 190 "state_write", 191 "state_stop", 192 "state_dead" 193}; 194 195static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg) 196{ 197 return readb(host->base + (((unsigned int)reg) << host->bsteps)); 198} 199 200static inline void __kw_write_reg(struct pmac_i2c_host_kw *host, 201 reg_t reg, u8 val) 202{ 203 writeb(val, host->base + (((unsigned)reg) << host->bsteps)); 204 (void)__kw_read_reg(host, reg_subaddr); 205} 206 207#define kw_write_reg(reg, val) __kw_write_reg(host, reg, val) 208#define kw_read_reg(reg) __kw_read_reg(host, reg) 209 210static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host) 211{ 212 int i, j; 213 u8 isr; 214 215 for (i = 0; i < 1000; i++) { 216 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK; 217 if (isr != 0) 218 return isr; 219 220 /* This code is used with the timebase frozen, we cannot rely 221 * on udelay nor schedule when in polled mode ! 222 * For now, just use a bogus loop.... 223 */ 224 if (host->polled) { 225 for (j = 1; j < 100000; j++) 226 mb(); 227 } else 228 msleep(1); 229 } 230 return isr; 231} 232 233static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result) 234{ 235 kw_write_reg(reg_control, KW_I2C_CTL_STOP); 236 host->state = state_stop; 237 host->result = result; 238} 239 240 241static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr) 242{ 243 u8 ack; 244 245 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n", 246 __kw_state_names[host->state], isr); 247 248 if (host->state == state_idle) { 249 printk(KERN_WARNING "low_i2c: Keywest got an out of state" 250 " interrupt, ignoring\n"); 251 kw_write_reg(reg_isr, isr); 252 return; 253 } 254 255 if (isr == 0) { 256 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer" 257 " on keywest !\n"); 258 if (host->state != state_stop) { 259 kw_i2c_do_stop(host, -EIO); 260 return; 261 } 262 ack = kw_read_reg(reg_status); 263 if (ack & KW_I2C_STAT_BUSY) 264 kw_write_reg(reg_status, 0); 265 host->state = state_idle; 266 kw_write_reg(reg_ier, 0x00); 267 if (!host->polled) 268 complete(&host->complete); 269 return; 270 } 271 272 if (isr & KW_I2C_IRQ_ADDR) { 273 ack = kw_read_reg(reg_status); 274 if (host->state != state_addr) { 275 WRONG_STATE("KW_I2C_IRQ_ADDR"); 276 kw_i2c_do_stop(host, -EIO); 277 } 278 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { 279 host->result = -ENXIO; 280 host->state = state_stop; 281 DBG_LOW("KW: NAK on address\n"); 282 } else { 283 if (host->len == 0) 284 kw_i2c_do_stop(host, 0); 285 else if (host->rw) { 286 host->state = state_read; 287 if (host->len > 1) 288 kw_write_reg(reg_control, 289 KW_I2C_CTL_AAK); 290 } else { 291 host->state = state_write; 292 kw_write_reg(reg_data, *(host->data++)); 293 host->len--; 294 } 295 } 296 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR); 297 } 298 299 if (isr & KW_I2C_IRQ_DATA) { 300 if (host->state == state_read) { 301 *(host->data++) = kw_read_reg(reg_data); 302 host->len--; 303 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); 304 if (host->len == 0) 305 host->state = state_stop; 306 else if (host->len == 1) 307 kw_write_reg(reg_control, 0); 308 } else if (host->state == state_write) { 309 ack = kw_read_reg(reg_status); 310 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { 311 DBG_LOW("KW: nack on data write\n"); 312 host->result = -EFBIG; 313 host->state = state_stop; 314 } else if (host->len) { 315 kw_write_reg(reg_data, *(host->data++)); 316 host->len--; 317 } else 318 kw_i2c_do_stop(host, 0); 319 } else { 320 WRONG_STATE("KW_I2C_IRQ_DATA"); 321 if (host->state != state_stop) 322 kw_i2c_do_stop(host, -EIO); 323 } 324 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); 325 } 326 327 if (isr & KW_I2C_IRQ_STOP) { 328 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP); 329 if (host->state != state_stop) { 330 WRONG_STATE("KW_I2C_IRQ_STOP"); 331 host->result = -EIO; 332 } 333 host->state = state_idle; 334 if (!host->polled) 335 complete(&host->complete); 336 } 337 338 /* Below should only happen in manual mode which we don't use ... */ 339 if (isr & KW_I2C_IRQ_START) 340 kw_write_reg(reg_isr, KW_I2C_IRQ_START); 341 342} 343 344/* Interrupt handler */ 345static irqreturn_t kw_i2c_irq(int irq, void *dev_id) 346{ 347 struct pmac_i2c_host_kw *host = dev_id; 348 unsigned long flags; 349 350 spin_lock_irqsave(&host->lock, flags); 351 del_timer(&host->timeout_timer); 352 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); 353 if (host->state != state_idle) { 354 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 355 add_timer(&host->timeout_timer); 356 } 357 spin_unlock_irqrestore(&host->lock, flags); 358 return IRQ_HANDLED; 359} 360 361static void kw_i2c_timeout(unsigned long data) 362{ 363 struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data; 364 unsigned long flags; 365 366 spin_lock_irqsave(&host->lock, flags); 367 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); 368 if (host->state != state_idle) { 369 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 370 add_timer(&host->timeout_timer); 371 } 372 spin_unlock_irqrestore(&host->lock, flags); 373} 374 375static int kw_i2c_open(struct pmac_i2c_bus *bus) 376{ 377 struct pmac_i2c_host_kw *host = bus->hostdata; 378 down(&host->mutex); 379 return 0; 380} 381 382static void kw_i2c_close(struct pmac_i2c_bus *bus) 383{ 384 struct pmac_i2c_host_kw *host = bus->hostdata; 385 up(&host->mutex); 386} 387 388static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 389 u32 subaddr, u8 *data, int len) 390{ 391 struct pmac_i2c_host_kw *host = bus->hostdata; 392 u8 mode_reg = host->speed; 393 int use_irq = host->irq != NO_IRQ && !bus->polled; 394 395 /* Setup mode & subaddress if any */ 396 switch(bus->mode) { 397 case pmac_i2c_mode_dumb: 398 return -EINVAL; 399 case pmac_i2c_mode_std: 400 mode_reg |= KW_I2C_MODE_STANDARD; 401 if (subsize != 0) 402 return -EINVAL; 403 break; 404 case pmac_i2c_mode_stdsub: 405 mode_reg |= KW_I2C_MODE_STANDARDSUB; 406 if (subsize != 1) 407 return -EINVAL; 408 break; 409 case pmac_i2c_mode_combined: 410 mode_reg |= KW_I2C_MODE_COMBINED; 411 if (subsize != 1) 412 return -EINVAL; 413 break; 414 } 415 416 /* Setup channel & clear pending irqs */ 417 kw_write_reg(reg_isr, kw_read_reg(reg_isr)); 418 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4)); 419 kw_write_reg(reg_status, 0); 420 421 /* Set up address and r/w bit, strip possible stale bus number from 422 * address top bits 423 */ 424 kw_write_reg(reg_addr, addrdir & 0xff); 425 426 /* Set up the sub address */ 427 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB 428 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED) 429 kw_write_reg(reg_subaddr, subaddr); 430 431 /* Prepare for async operations */ 432 host->data = data; 433 host->len = len; 434 host->state = state_addr; 435 host->result = 0; 436 host->rw = (addrdir & 1); 437 host->polled = bus->polled; 438 439 /* Enable interrupt if not using polled mode and interrupt is 440 * available 441 */ 442 if (use_irq) { 443 /* Clear completion */ 444 INIT_COMPLETION(host->complete); 445 /* Ack stale interrupts */ 446 kw_write_reg(reg_isr, kw_read_reg(reg_isr)); 447 /* Arm timeout */ 448 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 449 add_timer(&host->timeout_timer); 450 /* Enable emission */ 451 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK); 452 } 453 454 /* Start sending address */ 455 kw_write_reg(reg_control, KW_I2C_CTL_XADDR); 456 457 /* Wait for completion */ 458 if (use_irq) 459 wait_for_completion(&host->complete); 460 else { 461 while(host->state != state_idle) { 462 unsigned long flags; 463 464 u8 isr = kw_i2c_wait_interrupt(host); 465 spin_lock_irqsave(&host->lock, flags); 466 kw_i2c_handle_interrupt(host, isr); 467 spin_unlock_irqrestore(&host->lock, flags); 468 } 469 } 470 471 /* Disable emission */ 472 kw_write_reg(reg_ier, 0); 473 474 return host->result; 475} 476 477static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np) 478{ 479 struct pmac_i2c_host_kw *host; 480 const u32 *psteps, *prate, *addrp; 481 u32 steps; 482 483 host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL); 484 if (host == NULL) { 485 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n", 486 np->full_name); 487 return NULL; 488 } 489 490 /* Apple is kind enough to provide a valid AAPL,address property 491 * on all i2c keywest nodes so far ... we would have to fallback 492 * to macio parsing if that wasn't the case 493 */ 494 addrp = of_get_property(np, "AAPL,address", NULL); 495 if (addrp == NULL) { 496 printk(KERN_ERR "low_i2c: Can't find address for %s\n", 497 np->full_name); 498 kfree(host); 499 return NULL; 500 } 501 init_MUTEX(&host->mutex); 502 init_completion(&host->complete); 503 spin_lock_init(&host->lock); 504 init_timer(&host->timeout_timer); 505 host->timeout_timer.function = kw_i2c_timeout; 506 host->timeout_timer.data = (unsigned long)host; 507 508 psteps = of_get_property(np, "AAPL,address-step", NULL); 509 steps = psteps ? (*psteps) : 0x10; 510 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++) 511 steps >>= 1; 512 /* Select interface rate */ 513 host->speed = KW_I2C_MODE_25KHZ; 514 prate = of_get_property(np, "AAPL,i2c-rate", NULL); 515 if (prate) switch(*prate) { 516 case 100: 517 host->speed = KW_I2C_MODE_100KHZ; 518 break; 519 case 50: 520 host->speed = KW_I2C_MODE_50KHZ; 521 break; 522 case 25: 523 host->speed = KW_I2C_MODE_25KHZ; 524 break; 525 } 526 host->irq = irq_of_parse_and_map(np, 0); 527 if (host->irq == NO_IRQ) 528 printk(KERN_WARNING 529 "low_i2c: Failed to map interrupt for %s\n", 530 np->full_name); 531 532 host->base = ioremap((*addrp), 0x1000); 533 if (host->base == NULL) { 534 printk(KERN_ERR "low_i2c: Can't map registers for %s\n", 535 np->full_name); 536 kfree(host); 537 return NULL; 538 } 539 540 /* Make sure IRQ is disabled */ 541 kw_write_reg(reg_ier, 0); 542 543 /* Request chip interrupt */ 544 if (request_irq(host->irq, kw_i2c_irq, 0, "keywest i2c", host)) 545 host->irq = NO_IRQ; 546 547 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n", 548 *addrp, host->irq, np->full_name); 549 550 return host; 551} 552 553 554static void __init kw_i2c_add(struct pmac_i2c_host_kw *host, 555 struct device_node *controller, 556 struct device_node *busnode, 557 int channel) 558{ 559 struct pmac_i2c_bus *bus; 560 561 bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL); 562 if (bus == NULL) 563 return; 564 565 bus->controller = of_node_get(controller); 566 bus->busnode = of_node_get(busnode); 567 bus->type = pmac_i2c_bus_keywest; 568 bus->hostdata = host; 569 bus->channel = channel; 570 bus->mode = pmac_i2c_mode_std; 571 bus->open = kw_i2c_open; 572 bus->close = kw_i2c_close; 573 bus->xfer = kw_i2c_xfer; 574 init_MUTEX(&bus->sem); 575 if (controller == busnode) 576 bus->flags = pmac_i2c_multibus; 577 list_add(&bus->link, &pmac_i2c_busses); 578 579 printk(KERN_INFO " channel %d bus %s\n", channel, 580 (controller == busnode) ? "<multibus>" : busnode->full_name); 581} 582 583static void __init kw_i2c_probe(void) 584{ 585 struct device_node *np, *child, *parent; 586 587 /* Probe keywest-i2c busses */ 588 for (np = NULL; 589 (np = of_find_compatible_node(np, "i2c","keywest-i2c")) != NULL;){ 590 struct pmac_i2c_host_kw *host; 591 int multibus, chans, i; 592 593 /* Found one, init a host structure */ 594 host = kw_i2c_host_init(np); 595 if (host == NULL) 596 continue; 597 598 child = of_get_next_child(np, NULL); 599 multibus = !child || strcmp(child->name, "i2c-bus"); 600 of_node_put(child); 601 602 /* For a multibus setup, we get the bus count based on the 603 * parent type 604 */ 605 if (multibus) { 606 parent = of_get_parent(np); 607 if (parent == NULL) 608 continue; 609 chans = parent->name[0] == 'u' ? 2 : 1; 610 for (i = 0; i < chans; i++) 611 kw_i2c_add(host, np, np, i); 612 } else { 613 for (child = NULL; 614 (child = of_get_next_child(np, child)) != NULL;) { 615 const u32 *reg = of_get_property(child, 616 "reg", NULL); 617 if (reg == NULL) 618 continue; 619 kw_i2c_add(host, np, child, *reg); 620 } 621 } 622 } 623} 624 625 626/* 627 * 628 * PMU implementation 629 * 630 */ 631 632#ifdef CONFIG_ADB_PMU 633 634/* 635 * i2c command block to the PMU 636 */ 637struct pmu_i2c_hdr { 638 u8 bus; 639 u8 mode; 640 u8 bus2; 641 u8 address; 642 u8 sub_addr; 643 u8 comb_addr; 644 u8 count; 645 u8 data[]; 646}; 647 648static void pmu_i2c_complete(struct adb_request *req) 649{ 650 complete(req->arg); 651} 652 653static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 654 u32 subaddr, u8 *data, int len) 655{ 656 struct adb_request *req = bus->hostdata; 657 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1]; 658 struct completion comp; 659 int read = addrdir & 1; 660 int retry; 661 int rc = 0; 662 663 /* For now, limit ourselves to 16 bytes transfers */ 664 if (len > 16) 665 return -EINVAL; 666 667 init_completion(&comp); 668 669 for (retry = 0; retry < 16; retry++) { 670 memset(req, 0, sizeof(struct adb_request)); 671 hdr->bus = bus->channel; 672 hdr->count = len; 673 674 switch(bus->mode) { 675 case pmac_i2c_mode_std: 676 if (subsize != 0) 677 return -EINVAL; 678 hdr->address = addrdir; 679 hdr->mode = PMU_I2C_MODE_SIMPLE; 680 break; 681 case pmac_i2c_mode_stdsub: 682 case pmac_i2c_mode_combined: 683 if (subsize != 1) 684 return -EINVAL; 685 hdr->address = addrdir & 0xfe; 686 hdr->comb_addr = addrdir; 687 hdr->sub_addr = subaddr; 688 if (bus->mode == pmac_i2c_mode_stdsub) 689 hdr->mode = PMU_I2C_MODE_STDSUB; 690 else 691 hdr->mode = PMU_I2C_MODE_COMBINED; 692 break; 693 default: 694 return -EINVAL; 695 } 696 697 INIT_COMPLETION(comp); 698 req->data[0] = PMU_I2C_CMD; 699 req->reply[0] = 0xff; 700 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1; 701 req->done = pmu_i2c_complete; 702 req->arg = ∁ 703 if (!read && len) { 704 memcpy(hdr->data, data, len); 705 req->nbytes += len; 706 } 707 rc = pmu_queue_request(req); 708 if (rc) 709 return rc; 710 wait_for_completion(&comp); 711 if (req->reply[0] == PMU_I2C_STATUS_OK) 712 break; 713 msleep(15); 714 } 715 if (req->reply[0] != PMU_I2C_STATUS_OK) 716 return -EIO; 717 718 for (retry = 0; retry < 16; retry++) { 719 memset(req, 0, sizeof(struct adb_request)); 720 721 /* I know that looks like a lot, slow as hell, but darwin 722 * does it so let's be on the safe side for now 723 */ 724 msleep(15); 725 726 hdr->bus = PMU_I2C_BUS_STATUS; 727 728 INIT_COMPLETION(comp); 729 req->data[0] = PMU_I2C_CMD; 730 req->reply[0] = 0xff; 731 req->nbytes = 2; 732 req->done = pmu_i2c_complete; 733 req->arg = ∁ 734 rc = pmu_queue_request(req); 735 if (rc) 736 return rc; 737 wait_for_completion(&comp); 738 739 if (req->reply[0] == PMU_I2C_STATUS_OK && !read) 740 return 0; 741 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) { 742 int rlen = req->reply_len - 1; 743 744 if (rlen != len) { 745 printk(KERN_WARNING "low_i2c: PMU returned %d" 746 " bytes, expected %d !\n", rlen, len); 747 return -EIO; 748 } 749 if (len) 750 memcpy(data, &req->reply[1], len); 751 return 0; 752 } 753 } 754 return -EIO; 755} 756 757static void __init pmu_i2c_probe(void) 758{ 759 struct pmac_i2c_bus *bus; 760 struct device_node *busnode; 761 int channel, sz; 762 763 if (!pmu_present()) 764 return; 765 766 /* There might or might not be a "pmu-i2c" node, we use that 767 * or via-pmu itself, whatever we find. I haven't seen a machine 768 * with separate bus nodes, so we assume a multibus setup 769 */ 770 busnode = of_find_node_by_name(NULL, "pmu-i2c"); 771 if (busnode == NULL) 772 busnode = of_find_node_by_name(NULL, "via-pmu"); 773 if (busnode == NULL) 774 return; 775 776 printk(KERN_INFO "PMU i2c %s\n", busnode->full_name); 777 778 /* 779 * We add bus 1 and 2 only for now, bus 0 is "special" 780 */ 781 for (channel = 1; channel <= 2; channel++) { 782 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request); 783 bus = kzalloc(sz, GFP_KERNEL); 784 if (bus == NULL) 785 return; 786 787 bus->controller = busnode; 788 bus->busnode = busnode; 789 bus->type = pmac_i2c_bus_pmu; 790 bus->channel = channel; 791 bus->mode = pmac_i2c_mode_std; 792 bus->hostdata = bus + 1; 793 bus->xfer = pmu_i2c_xfer; 794 init_MUTEX(&bus->sem); 795 bus->flags = pmac_i2c_multibus; 796 list_add(&bus->link, &pmac_i2c_busses); 797 798 printk(KERN_INFO " channel %d bus <multibus>\n", channel); 799 } 800} 801 802#endif /* CONFIG_ADB_PMU */ 803 804 805/* 806 * 807 * SMU implementation 808 * 809 */ 810 811#ifdef CONFIG_PMAC_SMU 812 813static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc) 814{ 815 complete(misc); 816} 817 818static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 819 u32 subaddr, u8 *data, int len) 820{ 821 struct smu_i2c_cmd *cmd = bus->hostdata; 822 struct completion comp; 823 int read = addrdir & 1; 824 int rc = 0; 825 826 if ((read && len > SMU_I2C_READ_MAX) || 827 ((!read) && len > SMU_I2C_WRITE_MAX)) 828 return -EINVAL; 829 830 memset(cmd, 0, sizeof(struct smu_i2c_cmd)); 831 cmd->info.bus = bus->channel; 832 cmd->info.devaddr = addrdir; 833 cmd->info.datalen = len; 834 835 switch(bus->mode) { 836 case pmac_i2c_mode_std: 837 if (subsize != 0) 838 return -EINVAL; 839 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE; 840 break; 841 case pmac_i2c_mode_stdsub: 842 case pmac_i2c_mode_combined: 843 if (subsize > 3 || subsize < 1) 844 return -EINVAL; 845 cmd->info.sublen = subsize; 846 /* that's big-endian only but heh ! */ 847 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize), 848 subsize); 849 if (bus->mode == pmac_i2c_mode_stdsub) 850 cmd->info.type = SMU_I2C_TRANSFER_STDSUB; 851 else 852 cmd->info.type = SMU_I2C_TRANSFER_COMBINED; 853 break; 854 default: 855 return -EINVAL; 856 } 857 if (!read && len) 858 memcpy(cmd->info.data, data, len); 859 860 init_completion(&comp); 861 cmd->done = smu_i2c_complete; 862 cmd->misc = ∁ 863 rc = smu_queue_i2c(cmd); 864 if (rc < 0) 865 return rc; 866 wait_for_completion(&comp); 867 rc = cmd->status; 868 869 if (read && len) 870 memcpy(data, cmd->info.data, len); 871 return rc < 0 ? rc : 0; 872} 873 874static void __init smu_i2c_probe(void) 875{ 876 struct device_node *controller, *busnode; 877 struct pmac_i2c_bus *bus; 878 const u32 *reg; 879 int sz; 880 881 if (!smu_present()) 882 return; 883 884 controller = of_find_node_by_name(NULL, "smu-i2c-control"); 885 if (controller == NULL) 886 controller = of_find_node_by_name(NULL, "smu"); 887 if (controller == NULL) 888 return; 889 890 printk(KERN_INFO "SMU i2c %s\n", controller->full_name); 891 892 /* Look for childs, note that they might not be of the right 893 * type as older device trees mix i2c busses and other thigns 894 * at the same level 895 */ 896 for (busnode = NULL; 897 (busnode = of_get_next_child(controller, busnode)) != NULL;) { 898 if (strcmp(busnode->type, "i2c") && 899 strcmp(busnode->type, "i2c-bus")) 900 continue; 901 reg = of_get_property(busnode, "reg", NULL); 902 if (reg == NULL) 903 continue; 904 905 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd); 906 bus = kzalloc(sz, GFP_KERNEL); 907 if (bus == NULL) 908 return; 909 910 bus->controller = controller; 911 bus->busnode = of_node_get(busnode); 912 bus->type = pmac_i2c_bus_smu; 913 bus->channel = *reg; 914 bus->mode = pmac_i2c_mode_std; 915 bus->hostdata = bus + 1; 916 bus->xfer = smu_i2c_xfer; 917 init_MUTEX(&bus->sem); 918 bus->flags = 0; 919 list_add(&bus->link, &pmac_i2c_busses); 920 921 printk(KERN_INFO " channel %x bus %s\n", 922 bus->channel, busnode->full_name); 923 } 924} 925 926#endif /* CONFIG_PMAC_SMU */ 927 928/* 929 * 930 * Core code 931 * 932 */ 933 934 935struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node) 936{ 937 struct device_node *p = of_node_get(node); 938 struct device_node *prev = NULL; 939 struct pmac_i2c_bus *bus; 940 941 while(p) { 942 list_for_each_entry(bus, &pmac_i2c_busses, link) { 943 if (p == bus->busnode) { 944 if (prev && bus->flags & pmac_i2c_multibus) { 945 const u32 *reg; 946 reg = of_get_property(prev, "reg", 947 NULL); 948 if (!reg) 949 continue; 950 if (((*reg) >> 8) != bus->channel) 951 continue; 952 } 953 of_node_put(p); 954 of_node_put(prev); 955 return bus; 956 } 957 } 958 of_node_put(prev); 959 prev = p; 960 p = of_get_parent(p); 961 } 962 return NULL; 963} 964EXPORT_SYMBOL_GPL(pmac_i2c_find_bus); 965 966u8 pmac_i2c_get_dev_addr(struct device_node *device) 967{ 968 const u32 *reg = of_get_property(device, "reg", NULL); 969 970 if (reg == NULL) 971 return 0; 972 973 return (*reg) & 0xff; 974} 975EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr); 976 977struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus) 978{ 979 return bus->controller; 980} 981EXPORT_SYMBOL_GPL(pmac_i2c_get_controller); 982 983struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus) 984{ 985 return bus->busnode; 986} 987EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node); 988 989int pmac_i2c_get_type(struct pmac_i2c_bus *bus) 990{ 991 return bus->type; 992} 993EXPORT_SYMBOL_GPL(pmac_i2c_get_type); 994 995int pmac_i2c_get_flags(struct pmac_i2c_bus *bus) 996{ 997 return bus->flags; 998} 999EXPORT_SYMBOL_GPL(pmac_i2c_get_flags); 1000 1001int pmac_i2c_get_channel(struct pmac_i2c_bus *bus) 1002{ 1003 return bus->channel; 1004} 1005EXPORT_SYMBOL_GPL(pmac_i2c_get_channel); 1006 1007 1008void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus, 1009 struct i2c_adapter *adapter) 1010{ 1011 WARN_ON(bus->adapter != NULL); 1012 bus->adapter = adapter; 1013} 1014EXPORT_SYMBOL_GPL(pmac_i2c_attach_adapter); 1015 1016void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus, 1017 struct i2c_adapter *adapter) 1018{ 1019 WARN_ON(bus->adapter != adapter); 1020 bus->adapter = NULL; 1021} 1022EXPORT_SYMBOL_GPL(pmac_i2c_detach_adapter); 1023 1024struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus) 1025{ 1026 return bus->adapter; 1027} 1028EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter); 1029 1030struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter) 1031{ 1032 struct pmac_i2c_bus *bus; 1033 1034 list_for_each_entry(bus, &pmac_i2c_busses, link) 1035 if (bus->adapter == adapter) 1036 return bus; 1037 return NULL; 1038} 1039EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus); 1040 1041int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter) 1042{ 1043 struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev); 1044 1045 if (bus == NULL) 1046 return 0; 1047 return (bus->adapter == adapter); 1048} 1049EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter); 1050 1051int pmac_low_i2c_lock(struct device_node *np) 1052{ 1053 struct pmac_i2c_bus *bus, *found = NULL; 1054 1055 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1056 if (np == bus->controller) { 1057 found = bus; 1058 break; 1059 } 1060 } 1061 if (!found) 1062 return -ENODEV; 1063 return pmac_i2c_open(bus, 0); 1064} 1065EXPORT_SYMBOL_GPL(pmac_low_i2c_lock); 1066 1067int pmac_low_i2c_unlock(struct device_node *np) 1068{ 1069 struct pmac_i2c_bus *bus, *found = NULL; 1070 1071 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1072 if (np == bus->controller) { 1073 found = bus; 1074 break; 1075 } 1076 } 1077 if (!found) 1078 return -ENODEV; 1079 pmac_i2c_close(bus); 1080 return 0; 1081} 1082EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock); 1083 1084 1085int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled) 1086{ 1087 int rc; 1088 1089 down(&bus->sem); 1090 bus->polled = polled || pmac_i2c_force_poll; 1091 bus->opened = 1; 1092 bus->mode = pmac_i2c_mode_std; 1093 if (bus->open && (rc = bus->open(bus)) != 0) { 1094 bus->opened = 0; 1095 up(&bus->sem); 1096 return rc; 1097 } 1098 return 0; 1099} 1100EXPORT_SYMBOL_GPL(pmac_i2c_open); 1101 1102void pmac_i2c_close(struct pmac_i2c_bus *bus) 1103{ 1104 WARN_ON(!bus->opened); 1105 if (bus->close) 1106 bus->close(bus); 1107 bus->opened = 0; 1108 up(&bus->sem); 1109} 1110EXPORT_SYMBOL_GPL(pmac_i2c_close); 1111 1112int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode) 1113{ 1114 WARN_ON(!bus->opened); 1115 1116 /* Report me if you see the error below as there might be a new 1117 * "combined4" mode that I need to implement for the SMU bus 1118 */ 1119 if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) { 1120 printk(KERN_ERR "low_i2c: Invalid mode %d requested on" 1121 " bus %s !\n", mode, bus->busnode->full_name); 1122 return -EINVAL; 1123 } 1124 bus->mode = mode; 1125 1126 return 0; 1127} 1128EXPORT_SYMBOL_GPL(pmac_i2c_setmode); 1129 1130int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 1131 u32 subaddr, u8 *data, int len) 1132{ 1133 int rc; 1134 1135 WARN_ON(!bus->opened); 1136 1137 DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x," 1138 " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize, 1139 subaddr, len, bus->busnode->full_name); 1140 1141 rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len); 1142 1143#ifdef DEBUG 1144 if (rc) 1145 DBG("xfer error %d\n", rc); 1146#endif 1147 return rc; 1148} 1149EXPORT_SYMBOL_GPL(pmac_i2c_xfer); 1150 1151/* some quirks for platform function decoding */ 1152enum { 1153 pmac_i2c_quirk_invmask = 0x00000001u, 1154 pmac_i2c_quirk_skip = 0x00000002u, 1155}; 1156 1157static void pmac_i2c_devscan(void (*callback)(struct device_node *dev, 1158 int quirks)) 1159{ 1160 struct pmac_i2c_bus *bus; 1161 struct device_node *np; 1162 static struct whitelist_ent { 1163 char *name; 1164 char *compatible; 1165 int quirks; 1166 } whitelist[] = { 1167 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip }, 1168 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip }, 1169 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask }, 1170 { "i2c-cpu-voltage", NULL, 0}, 1171 { "temp-monitor", NULL, 0 }, 1172 { "supply-monitor", NULL, 0 }, 1173 { NULL, NULL, 0 }, 1174 }; 1175 1176 /* Only some devices need to have platform functions instanciated 1177 * here. For now, we have a table. Others, like 9554 i2c GPIOs used 1178 * on Xserve, if we ever do a driver for them, will use their own 1179 * platform function instance 1180 */ 1181 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1182 for (np = NULL; 1183 (np = of_get_next_child(bus->busnode, np)) != NULL;) { 1184 struct whitelist_ent *p; 1185 /* If multibus, check if device is on that bus */ 1186 if (bus->flags & pmac_i2c_multibus) 1187 if (bus != pmac_i2c_find_bus(np)) 1188 continue; 1189 for (p = whitelist; p->name != NULL; p++) { 1190 if (strcmp(np->name, p->name)) 1191 continue; 1192 if (p->compatible && 1193 !of_device_is_compatible(np, p->compatible)) 1194 continue; 1195 if (p->quirks & pmac_i2c_quirk_skip) 1196 break; 1197 callback(np, p->quirks); 1198 break; 1199 } 1200 } 1201 } 1202} 1203 1204#define MAX_I2C_DATA 64 1205 1206struct pmac_i2c_pf_inst 1207{ 1208 struct pmac_i2c_bus *bus; 1209 u8 addr; 1210 u8 buffer[MAX_I2C_DATA]; 1211 u8 scratch[MAX_I2C_DATA]; 1212 int bytes; 1213 int quirks; 1214}; 1215 1216static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args) 1217{ 1218 struct pmac_i2c_pf_inst *inst; 1219 struct pmac_i2c_bus *bus; 1220 1221 bus = pmac_i2c_find_bus(func->node); 1222 if (bus == NULL) { 1223 printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n", 1224 func->node->full_name); 1225 return NULL; 1226 } 1227 if (pmac_i2c_open(bus, 0)) { 1228 printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n", 1229 func->node->full_name); 1230 return NULL; 1231 } 1232 1233 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL); 1234 if (inst == NULL) { 1235 pmac_i2c_close(bus); 1236 return NULL; 1237 } 1238 inst->bus = bus; 1239 inst->addr = pmac_i2c_get_dev_addr(func->node); 1240 inst->quirks = (int)(long)func->driver_data; 1241 return inst; 1242} 1243 1244static void pmac_i2c_do_end(struct pmf_function *func, void *instdata) 1245{ 1246 struct pmac_i2c_pf_inst *inst = instdata; 1247 1248 if (inst == NULL) 1249 return; 1250 pmac_i2c_close(inst->bus); 1251 if (inst) 1252 kfree(inst); 1253} 1254 1255static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len) 1256{ 1257 struct pmac_i2c_pf_inst *inst = instdata; 1258 1259 inst->bytes = len; 1260 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0, 1261 inst->buffer, len); 1262} 1263 1264static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data) 1265{ 1266 struct pmac_i2c_pf_inst *inst = instdata; 1267 1268 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0, 1269 (u8 *)data, len); 1270} 1271 1272/* This function is used to do the masking & OR'ing for the "rmw" type 1273 * callbacks. Ze should apply the mask and OR in the values in the 1274 * buffer before writing back. The problem is that it seems that 1275 * various darwin drivers implement the mask/or differently, thus 1276 * we need to check the quirks first 1277 */ 1278static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst, 1279 u32 len, const u8 *mask, const u8 *val) 1280{ 1281 int i; 1282 1283 if (inst->quirks & pmac_i2c_quirk_invmask) { 1284 for (i = 0; i < len; i ++) 1285 inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i]; 1286 } else { 1287 for (i = 0; i < len; i ++) 1288 inst->scratch[i] = (inst->buffer[i] & ~mask[i]) 1289 | (val[i] & mask[i]); 1290 } 1291} 1292 1293static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen, 1294 u32 totallen, const u8 *maskdata, 1295 const u8 *valuedata) 1296{ 1297 struct pmac_i2c_pf_inst *inst = instdata; 1298 1299 if (masklen > inst->bytes || valuelen > inst->bytes || 1300 totallen > inst->bytes || valuelen > masklen) 1301 return -EINVAL; 1302 1303 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata); 1304 1305 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0, 1306 inst->scratch, totallen); 1307} 1308 1309static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len) 1310{ 1311 struct pmac_i2c_pf_inst *inst = instdata; 1312 1313 inst->bytes = len; 1314 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr, 1315 inst->buffer, len); 1316} 1317 1318static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len, 1319 const u8 *data) 1320{ 1321 struct pmac_i2c_pf_inst *inst = instdata; 1322 1323 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1, 1324 subaddr, (u8 *)data, len); 1325} 1326 1327static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode) 1328{ 1329 struct pmac_i2c_pf_inst *inst = instdata; 1330 1331 return pmac_i2c_setmode(inst->bus, mode); 1332} 1333 1334static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen, 1335 u32 valuelen, u32 totallen, const u8 *maskdata, 1336 const u8 *valuedata) 1337{ 1338 struct pmac_i2c_pf_inst *inst = instdata; 1339 1340 if (masklen > inst->bytes || valuelen > inst->bytes || 1341 totallen > inst->bytes || valuelen > masklen) 1342 return -EINVAL; 1343 1344 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata); 1345 1346 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1, 1347 subaddr, inst->scratch, totallen); 1348} 1349 1350static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len, 1351 const u8 *maskdata, 1352 const u8 *valuedata) 1353{ 1354 struct pmac_i2c_pf_inst *inst = instdata; 1355 int i, match; 1356 1357 /* Get return value pointer, it's assumed to be a u32 */ 1358 if (!args || !args->count || !args->u[0].p) 1359 return -EINVAL; 1360 1361 /* Check buffer */ 1362 if (len > inst->bytes) 1363 return -EINVAL; 1364 1365 for (i = 0, match = 1; match && i < len; i ++) 1366 if ((inst->buffer[i] & maskdata[i]) != valuedata[i]) 1367 match = 0; 1368 *args->u[0].p = match; 1369 return 0; 1370} 1371 1372static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration) 1373{ 1374 msleep((duration + 999) / 1000); 1375 return 0; 1376} 1377 1378 1379static struct pmf_handlers pmac_i2c_pfunc_handlers = { 1380 .begin = pmac_i2c_do_begin, 1381 .end = pmac_i2c_do_end, 1382 .read_i2c = pmac_i2c_do_read, 1383 .write_i2c = pmac_i2c_do_write, 1384 .rmw_i2c = pmac_i2c_do_rmw, 1385 .read_i2c_sub = pmac_i2c_do_read_sub, 1386 .write_i2c_sub = pmac_i2c_do_write_sub, 1387 .rmw_i2c_sub = pmac_i2c_do_rmw_sub, 1388 .set_i2c_mode = pmac_i2c_do_set_mode, 1389 .mask_and_compare = pmac_i2c_do_mask_and_comp, 1390 .delay = pmac_i2c_do_delay, 1391}; 1392 1393static void __init pmac_i2c_dev_create(struct device_node *np, int quirks) 1394{ 1395 DBG("dev_create(%s)\n", np->full_name); 1396 1397 pmf_register_driver(np, &pmac_i2c_pfunc_handlers, 1398 (void *)(long)quirks); 1399} 1400 1401static void __init pmac_i2c_dev_init(struct device_node *np, int quirks) 1402{ 1403 DBG("dev_create(%s)\n", np->full_name); 1404 1405 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL); 1406} 1407 1408static void pmac_i2c_dev_suspend(struct device_node *np, int quirks) 1409{ 1410 DBG("dev_suspend(%s)\n", np->full_name); 1411 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL); 1412} 1413 1414static void pmac_i2c_dev_resume(struct device_node *np, int quirks) 1415{ 1416 DBG("dev_resume(%s)\n", np->full_name); 1417 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL); 1418} 1419 1420void pmac_pfunc_i2c_suspend(void) 1421{ 1422 pmac_i2c_devscan(pmac_i2c_dev_suspend); 1423} 1424 1425void pmac_pfunc_i2c_resume(void) 1426{ 1427 pmac_i2c_devscan(pmac_i2c_dev_resume); 1428} 1429 1430/* 1431 * Initialize us: probe all i2c busses on the machine, instantiate 1432 * busses and platform functions as needed. 1433 */ 1434/* This is non-static as it might be called early by smp code */ 1435int __init pmac_i2c_init(void) 1436{ 1437 static int i2c_inited; 1438 1439 if (i2c_inited) 1440 return 0; 1441 i2c_inited = 1; 1442 1443 if (!machine_is(powermac)) 1444 return 0; 1445 1446 /* Probe keywest-i2c busses */ 1447 kw_i2c_probe(); 1448 1449#ifdef CONFIG_ADB_PMU 1450 /* Probe PMU i2c busses */ 1451 pmu_i2c_probe(); 1452#endif 1453 1454#ifdef CONFIG_PMAC_SMU 1455 /* Probe SMU i2c busses */ 1456 smu_i2c_probe(); 1457#endif 1458 1459 /* Now add plaform functions for some known devices */ 1460 pmac_i2c_devscan(pmac_i2c_dev_create); 1461 1462 return 0; 1463} 1464arch_initcall(pmac_i2c_init); 1465 1466/* Since pmac_i2c_init can be called too early for the platform device 1467 * registration, we need to do it at a later time. In our case, subsys 1468 * happens to fit well, though I agree it's a bit of a hack... 1469 */ 1470static int __init pmac_i2c_create_platform_devices(void) 1471{ 1472 struct pmac_i2c_bus *bus; 1473 int i = 0; 1474 1475 /* In the case where we are initialized from smp_init(), we must 1476 * not use the timer (and thus the irq). It's safe from now on 1477 * though 1478 */ 1479 pmac_i2c_force_poll = 0; 1480 1481 /* Create platform devices */ 1482 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1483 bus->platform_dev = 1484 platform_device_alloc("i2c-powermac", i++); 1485 if (bus->platform_dev == NULL) 1486 return -ENOMEM; 1487 bus->platform_dev->dev.platform_data = bus; 1488 platform_device_add(bus->platform_dev); 1489 } 1490 1491 /* Now call platform "init" functions */ 1492 pmac_i2c_devscan(pmac_i2c_dev_init); 1493 1494 return 0; 1495} 1496subsys_initcall(pmac_i2c_create_platform_devices); 1497