1/* 2 * arch/mips/dec/prom/call_o32.S 3 * 4 * O32 interface for the 64 (or N32) ABI. 5 * 6 * Copyright (C) 2002 Maciej W. Rozycki 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * as published by the Free Software Foundation; either version 11 * 2 of the License, or (at your option) any later version. 12 */ 13 14#include <asm/asm.h> 15#include <asm/regdef.h> 16 17/* Maximum number of arguments supported. Must be even! */ 18#define O32_ARGC 32 19/* Number of static registers we save. */ 20#define O32_STATC 11 21/* Frame size for both of the above. */ 22#define O32_FRAMESZ (4 * O32_ARGC + SZREG * O32_STATC) 23 24 .text 25 26/* 27 * O32 function call dispatcher, for interfacing 32-bit ROM routines. 28 * 29 * The standard 64 (N32) calling sequence is supported, with a0 30 * holding a function pointer, a1-a7 -- its first seven arguments 31 * and the stack -- remaining ones (up to O32_ARGC, including a1-a7). 32 * Static registers, gp and fp are preserved, v0 holds a result. 33 * This code relies on the called o32 function for sp and ra 34 * restoration and thus both this dispatcher and the current stack 35 * have to be placed in a KSEGx (or KUSEG) address space. Any 36 * pointers passed have to point to addresses within one of these 37 * spaces as well. 38 */ 39NESTED(call_o32, O32_FRAMESZ, ra) 40 REG_SUBU sp,O32_FRAMESZ 41 42 REG_S ra,O32_FRAMESZ-1*SZREG(sp) 43 REG_S fp,O32_FRAMESZ-2*SZREG(sp) 44 REG_S gp,O32_FRAMESZ-3*SZREG(sp) 45 REG_S s7,O32_FRAMESZ-4*SZREG(sp) 46 REG_S s6,O32_FRAMESZ-5*SZREG(sp) 47 REG_S s5,O32_FRAMESZ-6*SZREG(sp) 48 REG_S s4,O32_FRAMESZ-7*SZREG(sp) 49 REG_S s3,O32_FRAMESZ-8*SZREG(sp) 50 REG_S s2,O32_FRAMESZ-9*SZREG(sp) 51 REG_S s1,O32_FRAMESZ-10*SZREG(sp) 52 REG_S s0,O32_FRAMESZ-11*SZREG(sp) 53 54 move jp,a0 55 56 sll a0,a1,zero 57 sll a1,a2,zero 58 sll a2,a3,zero 59 sll a3,a4,zero 60 sw a5,0x10(sp) 61 sw a6,0x14(sp) 62 sw a7,0x18(sp) 63 64 PTR_LA t0,O32_FRAMESZ(sp) 65 PTR_LA t1,0x1c(sp) 66 li t2,O32_ARGC-7 671: 68 lw t3,(t0) 69 REG_ADDU t0,SZREG 70 sw t3,(t1) 71 REG_SUBU t2,1 72 REG_ADDU t1,4 73 bnez t2,1b 74 75 jalr jp 76 77 REG_L s0,O32_FRAMESZ-11*SZREG(sp) 78 REG_L s1,O32_FRAMESZ-10*SZREG(sp) 79 REG_L s2,O32_FRAMESZ-9*SZREG(sp) 80 REG_L s3,O32_FRAMESZ-8*SZREG(sp) 81 REG_L s4,O32_FRAMESZ-7*SZREG(sp) 82 REG_L s5,O32_FRAMESZ-6*SZREG(sp) 83 REG_L s6,O32_FRAMESZ-5*SZREG(sp) 84 REG_L s7,O32_FRAMESZ-4*SZREG(sp) 85 REG_L gp,O32_FRAMESZ-3*SZREG(sp) 86 REG_L fp,O32_FRAMESZ-2*SZREG(sp) 87 REG_L ra,O32_FRAMESZ-1*SZREG(sp) 88 89 REG_ADDU sp,O32_FRAMESZ 90 jr ra 91END(call_o32) 92