1/* 2 * 3 * BRIEF MODULE DESCRIPTION 4 * Alchemy Db1x00 board setup. 5 * 6 * Copyright 2000 MontaVista Software Inc. 7 * Author: MontaVista Software, Inc. 8 * ppopov@mvista.com or source@mvista.com 9 * 10 * This program is free software; you can redistribute it and/or modify it 11 * under the terms of the GNU General Public License as published by the 12 * Free Software Foundation; either version 2 of the License, or (at your 13 * option) any later version. 14 * 15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * You should have received a copy of the GNU General Public License along 27 * with this program; if not, write to the Free Software Foundation, Inc., 28 * 675 Mass Ave, Cambridge, MA 02139, USA. 29 */ 30#include <linux/init.h> 31#include <linux/sched.h> 32#include <linux/ioport.h> 33#include <linux/mm.h> 34#include <linux/console.h> 35#include <linux/mc146818rtc.h> 36#include <linux/delay.h> 37 38#include <asm/cpu.h> 39#include <asm/bootinfo.h> 40#include <asm/irq.h> 41#include <asm/mipsregs.h> 42#include <asm/reboot.h> 43#include <asm/pgtable.h> 44#include <asm/mach-au1x00/au1000.h> 45#include <asm/mach-db1x00/db1x00.h> 46 47static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; 48 49void board_reset (void) 50{ 51 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 52 bcsr->swreset = 0x0000; 53} 54 55void __init board_setup(void) 56{ 57 u32 pin_func; 58 59 pin_func = 0; 60 /* not valid for 1550 */ 61 62#if defined(CONFIG_IRDA) && (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100)) 63 /* set IRFIRSEL instead of GPIO15 */ 64 pin_func = au_readl(SYS_PINFUNC) | (u32)((1<<8)); 65 au_writel(pin_func, SYS_PINFUNC); 66 /* power off until the driver is in use */ 67 bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK; 68 bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF; 69 au_sync(); 70#endif 71 bcsr->pcmcia = 0x0000; /* turn off PCMCIA power */ 72 73#ifdef CONFIG_MIPS_MIRAGE 74 /* enable GPIO[31:0] inputs */ 75 au_writel(0, SYS_PININPUTEN); 76 77 /* GPIO[20] is output, tristate the other input primary GPIO's */ 78 au_writel((u32)(~(1<<20)), SYS_TRIOUTCLR); 79 80 /* set GPIO[210:208] instead of SSI_0 */ 81 pin_func = au_readl(SYS_PINFUNC) | (u32)(1); 82 83 /* set GPIO[215:211] for LED's */ 84 pin_func |= (u32)((5<<2)); 85 86 /* set GPIO[214:213] for more LED's */ 87 pin_func |= (u32)((5<<12)); 88 89 /* set GPIO[207:200] instead of PCMCIA/LCD */ 90 pin_func |= (u32)((3<<17)); 91 au_writel(pin_func, SYS_PINFUNC); 92 93 /* Enable speaker amplifier. This should 94 * be part of the audio driver. 95 */ 96 au_writel(au_readl(GPIO2_DIR) | 0x200, GPIO2_DIR); 97 au_writel(0x02000200, GPIO2_OUTPUT); 98#endif 99 100 au_sync(); 101 102#ifdef CONFIG_MIPS_DB1000 103 printk("AMD Alchemy Au1000/Db1000 Board\n"); 104#endif 105#ifdef CONFIG_MIPS_DB1500 106 printk("AMD Alchemy Au1500/Db1500 Board\n"); 107#endif 108#ifdef CONFIG_MIPS_DB1100 109 printk("AMD Alchemy Au1100/Db1100 Board\n"); 110#endif 111#ifdef CONFIG_MIPS_BOSPORUS 112 printk("AMD Alchemy Bosporus Board\n"); 113#endif 114#ifdef CONFIG_MIPS_MIRAGE 115 printk("AMD Alchemy Mirage Board\n"); 116#endif 117#ifdef CONFIG_MIPS_DB1550 118 printk("AMD Alchemy Au1550/Db1550 Board\n"); 119#endif 120} 121