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  • only in /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/m68knommu/platform/5307/
1/***************************************************************************/
2
3/*
4 *	linux/arch/m68knommu/platform/5307/config.c
5 *
6 *	Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 *	Copyright (C) 2000, Lineo (www.lineo.com)
8 */
9
10/***************************************************************************/
11
12#include <linux/kernel.h>
13#include <linux/sched.h>
14#include <linux/param.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <asm/irq.h>
18#include <asm/dma.h>
19#include <asm/traps.h>
20#include <asm/machdep.h>
21#include <asm/coldfire.h>
22#include <asm/mcftimer.h>
23#include <asm/mcfsim.h>
24#include <asm/mcfdma.h>
25#include <asm/mcfwdebug.h>
26
27/***************************************************************************/
28
29void coldfire_tick(void);
30void coldfire_timer_init(irq_handler_t handler);
31unsigned long coldfire_timer_offset(void);
32void coldfire_trap_init(void);
33void coldfire_reset(void);
34
35extern unsigned int mcf_timervector;
36extern unsigned int mcf_profilevector;
37extern unsigned int mcf_timerlevel;
38
39/***************************************************************************/
40
41/*
42 *	Some platforms need software versions of the GPIO data registers.
43 */
44unsigned short ppdata;
45unsigned char ledbank = 0xff;
46
47/***************************************************************************/
48
49/*
50 *	DMA channel base address table.
51 */
52unsigned int   dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
53        MCF_MBAR + MCFDMA_BASE0,
54        MCF_MBAR + MCFDMA_BASE1,
55        MCF_MBAR + MCFDMA_BASE2,
56        MCF_MBAR + MCFDMA_BASE3,
57};
58
59unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
60
61/***************************************************************************/
62
63void mcf_autovector(unsigned int vec)
64{
65	volatile unsigned char  *mbar;
66
67	if ((vec >= 25) && (vec <= 31)) {
68		mbar = (volatile unsigned char *) MCF_MBAR;
69		vec = 0x1 << (vec - 24);
70		*(mbar + MCFSIM_AVR) |= vec;
71		mcf_setimr(mcf_getimr() & ~vec);
72	}
73}
74
75/***************************************************************************/
76
77void mcf_settimericr(unsigned int timer, unsigned int level)
78{
79	volatile unsigned char *icrp;
80	unsigned int icr, imr;
81
82	if (timer <= 2) {
83		switch (timer) {
84		case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
85		default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
86		}
87
88		icrp = (volatile unsigned char *) (MCF_MBAR + icr);
89		*icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
90		mcf_setimr(mcf_getimr() & ~imr);
91	}
92}
93
94/***************************************************************************/
95
96int mcf_timerirqpending(int timer)
97{
98	unsigned int imr = 0;
99
100	switch (timer) {
101	case 1:  imr = MCFSIM_IMR_TIMER1; break;
102	case 2:  imr = MCFSIM_IMR_TIMER2; break;
103	default: break;
104	}
105	return (mcf_getipr() & imr);
106}
107
108/***************************************************************************/
109
110void config_BSP(char *commandp, int size)
111{
112	mcf_setimr(MCFSIM_IMR_MASKALL);
113
114#if defined(CONFIG_BOOTPARAM)
115	strncpy(commandp, CONFIG_BOOTPARAM_STRING, size);
116	commandp[size-1] = 0;
117#elif defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \
118      defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || \
119      defined(CONFIG_CLEOPATRA)
120	/* Copy command line from FLASH to local buffer... */
121	memcpy(commandp, (char *) 0xf0004000, size);
122	commandp[size-1] = 0;
123	/* Different timer setup - to prevent device clash */
124	mcf_timervector = 30;
125	mcf_profilevector = 31;
126	mcf_timerlevel = 6;
127#else
128	memset(commandp, 0, size);
129#endif
130
131	mach_sched_init = coldfire_timer_init;
132	mach_tick = coldfire_tick;
133	mach_gettimeoffset = coldfire_timer_offset;
134	mach_trap_init = coldfire_trap_init;
135	mach_reset = coldfire_reset;
136
137#ifdef MCF_BDM_DISABLE
138	/*
139	 * Disable the BDM clocking.  This also turns off most of the rest of
140	 * the BDM device.  This is good for EMC reasons. This option is not
141	 * incompatible with the memory protection option.
142	 */
143	wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
144#endif
145}
146
147/***************************************************************************/
148