1#include <linux/smp.h> 2#include <linux/timex.h> 3#include <linux/string.h> 4#include <asm/semaphore.h> 5#include <linux/seq_file.h> 6#include <linux/cpufreq.h> 7 8/* 9 * Get CPU information for use by the procfs. 10 */ 11static int show_cpuinfo(struct seq_file *m, void *v) 12{ 13 /* 14 * These flag bits must match the definitions in <asm/cpufeature.h>. 15 * NULL means this bit is undefined or reserved; either way it doesn't 16 * have meaning as far as Linux is concerned. Note that it's important 17 * to realize there is a difference between this table and CPUID -- if 18 * applications want to get the raw CPUID data, they should access 19 * /dev/cpu/<cpu_nr>/cpuid instead. 20 */ 21 static const char * const x86_cap_flags[] = { 22 /* Intel-defined */ 23 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", 24 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov", 25 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx", 26 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe", 27 28 /* AMD-defined */ 29 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 30 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL, 31 NULL, NULL, NULL, "mp", "nx", NULL, "mmxext", NULL, 32 NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm", "3dnowext", "3dnow", 33 34 /* Transmeta-defined */ 35 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL, 36 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 37 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 38 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 39 40 /* Other (Linux-defined) */ 41 "cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr", 42 NULL, NULL, NULL, NULL, 43 "constant_tsc", "up", NULL, NULL, NULL, NULL, NULL, NULL, 44 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 45 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 46 47 /* Intel-defined (#2) */ 48 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est", 49 "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL, 50 NULL, NULL, "dca", NULL, NULL, NULL, NULL, "popcnt", 51 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 52 53 /* VIA/Cyrix/Centaur-defined */ 54 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en", 55 "ace2", "ace2_en", "phe", "phe_en", "pmm", "pmm_en", NULL, NULL, 56 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 57 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 58 59 /* AMD-defined (#2) */ 60 "lahf_lm", "cmp_legacy", "svm", "extapic", "cr8legacy", "abm", 61 "sse4a", "misalignsse", 62 "3dnowprefetch", "osvw", "ibs", NULL, NULL, NULL, NULL, NULL, 63 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 64 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 65 }; 66 static const char * const x86_power_flags[] = { 67 "ts", /* temperature sensor */ 68 "fid", /* frequency id control */ 69 "vid", /* voltage id control */ 70 "ttp", /* thermal trip */ 71 "tm", 72 "stc", 73 "100mhzsteps", 74 "hwpstate", 75 "", /* constant_tsc - moved to flags */ 76 /* nothing */ 77 }; 78 struct cpuinfo_x86 *c = v; 79 int i, n = c - cpu_data; 80 int fpu_exception; 81 82#ifdef CONFIG_SMP 83 if (!cpu_online(n)) 84 return 0; 85#endif 86 seq_printf(m, "processor\t: %d\n" 87 "vendor_id\t: %s\n" 88 "cpu family\t: %d\n" 89 "model\t\t: %d\n" 90 "model name\t: %s\n", 91 n, 92 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown", 93 c->x86, 94 c->x86_model, 95 c->x86_model_id[0] ? c->x86_model_id : "unknown"); 96 97 if (c->x86_mask || c->cpuid_level >= 0) 98 seq_printf(m, "stepping\t: %d\n", c->x86_mask); 99 else 100 seq_printf(m, "stepping\t: unknown\n"); 101 102 if ( cpu_has(c, X86_FEATURE_TSC) ) { 103 unsigned int freq = cpufreq_quick_get(n); 104 if (!freq) 105 freq = cpu_khz; 106 seq_printf(m, "cpu MHz\t\t: %u.%03u\n", 107 freq / 1000, (freq % 1000)); 108 } 109 110 /* Cache size */ 111 if (c->x86_cache_size >= 0) 112 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size); 113#ifdef CONFIG_X86_HT 114 if (c->x86_max_cores * smp_num_siblings > 1) { 115 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); 116 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[n])); 117 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id); 118 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); 119 } 120#endif 121 122 /* We use exception 16 if we have hardware math and we've either seen it or the CPU claims it is internal */ 123 fpu_exception = c->hard_math && (ignore_fpu_irq || cpu_has_fpu); 124 seq_printf(m, "fdiv_bug\t: %s\n" 125 "hlt_bug\t\t: %s\n" 126 "f00f_bug\t: %s\n" 127 "coma_bug\t: %s\n" 128 "fpu\t\t: %s\n" 129 "fpu_exception\t: %s\n" 130 "cpuid level\t: %d\n" 131 "wp\t\t: %s\n" 132 "flags\t\t:", 133 c->fdiv_bug ? "yes" : "no", 134 c->hlt_works_ok ? "no" : "yes", 135 c->f00f_bug ? "yes" : "no", 136 c->coma_bug ? "yes" : "no", 137 c->hard_math ? "yes" : "no", 138 fpu_exception ? "yes" : "no", 139 c->cpuid_level, 140 c->wp_works_ok ? "yes" : "no"); 141 142 for ( i = 0 ; i < 32*NCAPINTS ; i++ ) 143 if ( test_bit(i, c->x86_capability) && 144 x86_cap_flags[i] != NULL ) 145 seq_printf(m, " %s", x86_cap_flags[i]); 146 147 for (i = 0; i < 32; i++) 148 if (c->x86_power & (1 << i)) { 149 if (i < ARRAY_SIZE(x86_power_flags) && 150 x86_power_flags[i]) 151 seq_printf(m, "%s%s", 152 x86_power_flags[i][0]?" ":"", 153 x86_power_flags[i]); 154 else 155 seq_printf(m, " [%d]", i); 156 } 157 158 seq_printf(m, "\nbogomips\t: %lu.%02lu\n", 159 c->loops_per_jiffy/(500000/HZ), 160 (c->loops_per_jiffy/(5000/HZ)) % 100); 161 seq_printf(m, "clflush size\t: %u\n\n", c->x86_clflush_size); 162 163 return 0; 164} 165 166static void *c_start(struct seq_file *m, loff_t *pos) 167{ 168 return *pos < NR_CPUS ? cpu_data + *pos : NULL; 169} 170static void *c_next(struct seq_file *m, void *v, loff_t *pos) 171{ 172 ++*pos; 173 return c_start(m, pos); 174} 175static void c_stop(struct seq_file *m, void *v) 176{ 177} 178struct seq_operations cpuinfo_op = { 179 .start = c_start, 180 .next = c_next, 181 .stop = c_stop, 182 .show = show_cpuinfo, 183}; 184