1/*
2 * arch/arm/plat-omap/usb.c -- platform level USB initialization
3 *
4 * Copyright (C) 2004 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19 */
20
21#undef	DEBUG
22
23#include <linux/module.h>
24#include <linux/kernel.h>
25#include <linux/types.h>
26#include <linux/errno.h>
27#include <linux/init.h>
28#include <linux/platform_device.h>
29#include <linux/usb/otg.h>
30
31#include <asm/io.h>
32#include <asm/irq.h>
33#include <asm/system.h>
34#include <asm/hardware.h>
35
36#include <asm/arch/mux.h>
37#include <asm/arch/usb.h>
38#include <asm/arch/board.h>
39
40#ifdef CONFIG_ARCH_OMAP1
41
42#define INT_USB_IRQ_GEN		IH2_BASE + 20
43#define INT_USB_IRQ_NISO	IH2_BASE + 30
44#define INT_USB_IRQ_ISO		IH2_BASE + 29
45#define INT_USB_IRQ_HGEN	INT_USB_HHC_1
46#define INT_USB_IRQ_OTG		IH2_BASE + 8
47
48#else
49
50#define INT_USB_IRQ_GEN		INT_24XX_USB_IRQ_GEN
51#define INT_USB_IRQ_NISO	INT_24XX_USB_IRQ_NISO
52#define INT_USB_IRQ_ISO		INT_24XX_USB_IRQ_ISO
53#define INT_USB_IRQ_HGEN	INT_24XX_USB_IRQ_HGEN
54#define INT_USB_IRQ_OTG		INT_24XX_USB_IRQ_OTG
55
56#endif
57
58
59/* These routines should handle the standard chip-specific modes
60 * for usb0/1/2 ports, covering basic mux and transceiver setup.
61 *
62 * Some board-*.c files will need to set up additional mux options,
63 * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
64 */
65
66/* TESTED ON:
67 *  - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
68 *  - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
69 *  - 5912 OSK UDC, with *nonstandard* A-to-A cable
70 *  - 1510 Innovator UDC with bundled usb0 cable
71 *  - 1510 Innovator OHCI with bundled usb1/usb2 cable
72 *  - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
73 *  - 1710 custom development board using alternate pin group
74 *  - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
75 */
76
77/*-------------------------------------------------------------------------*/
78
79#ifdef	CONFIG_ARCH_OMAP_OTG
80
81static struct otg_transceiver *xceiv;
82
83/**
84 * otg_get_transceiver - find the (single) OTG transceiver driver
85 *
86 * Returns the transceiver driver, after getting a refcount to it; or
87 * null if there is no such transceiver.  The caller is responsible for
88 * releasing that count.
89 */
90struct otg_transceiver *otg_get_transceiver(void)
91{
92	if (xceiv)
93		get_device(xceiv->dev);
94	return xceiv;
95}
96EXPORT_SYMBOL(otg_get_transceiver);
97
98int otg_set_transceiver(struct otg_transceiver *x)
99{
100	if (xceiv && x)
101		return -EBUSY;
102	xceiv = x;
103	return 0;
104}
105EXPORT_SYMBOL(otg_set_transceiver);
106
107#endif
108
109/*-------------------------------------------------------------------------*/
110
111#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
112
113static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
114{
115	u32	syscon1 = 0;
116
117	if (cpu_is_omap24xx())
118		CONTROL_DEVCONF_REG &= ~USBT0WRMODEI(USB_BIDIR_TLL);
119
120	if (nwires == 0) {
121		if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
122			/* pulldown D+/D- */
123			USB_TRANSCEIVER_CTRL_REG &= ~(3 << 1);
124		}
125		return 0;
126	}
127
128	if (is_device) {
129		if (cpu_is_omap24xx())
130			omap_cfg_reg(J20_24XX_USB0_PUEN);
131		else
132			omap_cfg_reg(W4_USB_PUEN);
133	}
134
135	/* internal transceiver (unavailable on 17xx, 24xx) */
136	if (!cpu_class_is_omap2() && nwires == 2) {
137		// omap_cfg_reg(P9_USB_DP);
138		// omap_cfg_reg(R8_USB_DM);
139
140		if (cpu_is_omap15xx()) {
141			/* This works on 1510-Innovator */
142			return 0;
143		}
144
145		/* NOTES:
146		 *  - peripheral should configure VBUS detection!
147		 *  - only peripherals may use the internal D+/D- pulldowns
148		 *  - OTG support on this port not yet written
149		 */
150
151		USB_TRANSCEIVER_CTRL_REG &= ~(7 << 4);
152		if (!is_device)
153			USB_TRANSCEIVER_CTRL_REG |= (3 << 1);
154
155		return 3 << 16;
156	}
157
158	/* alternate pin config, external transceiver */
159	if (cpu_is_omap15xx()) {
160		printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
161		return 0;
162	}
163
164	if (cpu_is_omap24xx()) {
165		omap_cfg_reg(K18_24XX_USB0_DAT);
166		omap_cfg_reg(K19_24XX_USB0_TXEN);
167		omap_cfg_reg(J14_24XX_USB0_SE0);
168		if (nwires != 3)
169			omap_cfg_reg(J18_24XX_USB0_RCV);
170	} else {
171		omap_cfg_reg(V6_USB0_TXD);
172		omap_cfg_reg(W9_USB0_TXEN);
173		omap_cfg_reg(W5_USB0_SE0);
174		if (nwires != 3)
175			omap_cfg_reg(Y5_USB0_RCV);
176	}
177
178	/* NOTE:  SPEED and SUSP aren't configured here.  OTG hosts
179	 * may be able to use I2C requests to set those bits along
180	 * with VBUS switching and overcurrent detection.
181	 */
182
183	if (cpu_class_is_omap1() && nwires != 6)
184		USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R;
185
186	switch (nwires) {
187	case 3:
188		syscon1 = 2;
189		if (cpu_is_omap24xx())
190			CONTROL_DEVCONF_REG |= USBT0WRMODEI(USB_BIDIR);
191		break;
192	case 4:
193		syscon1 = 1;
194		if (cpu_is_omap24xx())
195			CONTROL_DEVCONF_REG |= USBT0WRMODEI(USB_BIDIR);
196		break;
197	case 6:
198		syscon1 = 3;
199		if (cpu_is_omap24xx()) {
200			omap_cfg_reg(J19_24XX_USB0_VP);
201			omap_cfg_reg(K20_24XX_USB0_VM);
202			CONTROL_DEVCONF_REG |= USBT0WRMODEI(USB_UNIDIR);
203		} else {
204			omap_cfg_reg(AA9_USB0_VP);
205			omap_cfg_reg(R9_USB0_VM);
206			USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R;
207		}
208		break;
209	default:
210		printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
211			0, nwires);
212	}
213	return syscon1 << 16;
214}
215
216static u32 __init omap_usb1_init(unsigned nwires)
217{
218	u32	syscon1 = 0;
219
220	if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6)
221		USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB1_UNI_R;
222	if (cpu_is_omap24xx())
223		CONTROL_DEVCONF_REG &= ~USBT1WRMODEI(USB_BIDIR_TLL);
224
225	if (nwires == 0)
226		return 0;
227
228	/* external transceiver */
229	if (cpu_class_is_omap1()) {
230		omap_cfg_reg(USB1_TXD);
231		omap_cfg_reg(USB1_TXEN);
232		if (nwires != 3)
233			omap_cfg_reg(USB1_RCV);
234	}
235
236	if (cpu_is_omap15xx()) {
237		omap_cfg_reg(USB1_SEO);
238		omap_cfg_reg(USB1_SPEED);
239		// SUSP
240	} else if (cpu_is_omap1610() || cpu_is_omap5912()) {
241		omap_cfg_reg(W13_1610_USB1_SE0);
242		omap_cfg_reg(R13_1610_USB1_SPEED);
243		// SUSP
244	} else if (cpu_is_omap1710()) {
245		omap_cfg_reg(R13_1710_USB1_SE0);
246		// SUSP
247	} else if (cpu_is_omap24xx()) {
248		/* NOTE:  board-specific code must set up pin muxing for usb1,
249		 * since each signal could come out on either of two balls.
250		 */
251	} else {
252		pr_debug("usb%d cpu unrecognized\n", 1);
253		return 0;
254	}
255
256	switch (nwires) {
257	case 2:
258		if (!cpu_is_omap24xx())
259			goto bad;
260		/* NOTE: board-specific code must override this setting if
261		 * this TLL link is not using DP/DM
262		 */
263		syscon1 = 1;
264		CONTROL_DEVCONF_REG |= USBT1WRMODEI(USB_BIDIR_TLL);
265		break;
266	case 3:
267		syscon1 = 2;
268		if (cpu_is_omap24xx())
269			CONTROL_DEVCONF_REG |= USBT1WRMODEI(USB_BIDIR);
270		break;
271	case 4:
272		syscon1 = 1;
273		if (cpu_is_omap24xx())
274			CONTROL_DEVCONF_REG |= USBT1WRMODEI(USB_BIDIR);
275		break;
276	case 6:
277		if (cpu_is_omap24xx())
278			goto bad;
279		syscon1 = 3;
280		omap_cfg_reg(USB1_VP);
281		omap_cfg_reg(USB1_VM);
282		if (!cpu_is_omap15xx())
283			USB_TRANSCEIVER_CTRL_REG |= CONF_USB1_UNI_R;
284		break;
285	default:
286bad:
287		printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
288			1, nwires);
289	}
290	return syscon1 << 20;
291}
292
293static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
294{
295	u32	syscon1 = 0;
296
297	if (cpu_is_omap24xx()) {
298		CONTROL_DEVCONF_REG &= ~(USBT2WRMODEI(USB_BIDIR_TLL)
299					| USBT2TLL5PI);
300		alt_pingroup = 0;
301	}
302
303	/* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
304	if (alt_pingroup || nwires == 0)
305		return 0;
306
307	if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6)
308		USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R;
309
310	/* external transceiver */
311	if (cpu_is_omap15xx()) {
312		omap_cfg_reg(USB2_TXD);
313		omap_cfg_reg(USB2_TXEN);
314		omap_cfg_reg(USB2_SEO);
315		if (nwires != 3)
316			omap_cfg_reg(USB2_RCV);
317		/* there is no USB2_SPEED */
318	} else if (cpu_is_omap16xx()) {
319		omap_cfg_reg(V6_USB2_TXD);
320		omap_cfg_reg(W9_USB2_TXEN);
321		omap_cfg_reg(W5_USB2_SE0);
322		if (nwires != 3)
323			omap_cfg_reg(Y5_USB2_RCV);
324	} else if (cpu_is_omap24xx()) {
325		omap_cfg_reg(Y11_24XX_USB2_DAT);
326		omap_cfg_reg(AA10_24XX_USB2_SE0);
327		if (nwires > 2)
328			omap_cfg_reg(AA12_24XX_USB2_TXEN);
329		if (nwires > 3)
330			omap_cfg_reg(AA6_24XX_USB2_RCV);
331	} else {
332		pr_debug("usb%d cpu unrecognized\n", 1);
333		return 0;
334	}
335	// if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP);
336
337	switch (nwires) {
338	case 2:
339		if (!cpu_is_omap24xx())
340			goto bad;
341		/* NOTE: board-specific code must override this setting if
342		 * this TLL link is not using DP/DM
343		 */
344		syscon1 = 1;
345		CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_BIDIR_TLL);
346		break;
347	case 3:
348		syscon1 = 2;
349		if (cpu_is_omap24xx())
350			CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_BIDIR);
351		break;
352	case 4:
353		syscon1 = 1;
354		if (cpu_is_omap24xx())
355			CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_BIDIR);
356		break;
357	case 5:
358		if (!cpu_is_omap24xx())
359			goto bad;
360		omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
361		/* NOTE: board-specific code must override this setting if
362		 * this TLL link is not using DP/DM.  Something must also
363		 * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
364		 */
365		syscon1 = 3;
366		CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_UNIDIR_TLL)
367					| USBT2TLL5PI;
368		break;
369	case 6:
370		if (cpu_is_omap24xx())
371			goto bad;
372		syscon1 = 3;
373		if (cpu_is_omap15xx()) {
374			omap_cfg_reg(USB2_VP);
375			omap_cfg_reg(USB2_VM);
376		} else {
377			omap_cfg_reg(AA9_USB2_VP);
378			omap_cfg_reg(R9_USB2_VM);
379			USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R;
380		}
381		break;
382	default:
383bad:
384		printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
385			2, nwires);
386	}
387	return syscon1 << 24;
388}
389
390#endif
391
392/*-------------------------------------------------------------------------*/
393
394#if	defined(CONFIG_USB_GADGET_OMAP) || defined(CONFIG_USB_OHCI_HCD) || \
395	defined(CONFIG_USB_OHCI_HCD_MODULE) || (defined(CONFIG_USB_OTG) && \
396	defined(CONFIG_ARCH_OMAP_OTG))
397static void usb_release(struct device *dev)
398{
399	/* normally not freed */
400}
401#endif
402
403#ifdef	CONFIG_USB_GADGET_OMAP
404
405static struct resource udc_resources[] = {
406	/* order is significant! */
407	{		/* registers */
408		.start		= UDC_BASE,
409		.end		= UDC_BASE + 0xff,
410		.flags		= IORESOURCE_MEM,
411	}, {		/* general IRQ */
412		.start		= INT_USB_IRQ_GEN,
413		.flags		= IORESOURCE_IRQ,
414	}, {		/* PIO IRQ */
415		.start		= INT_USB_IRQ_NISO,
416		.flags		= IORESOURCE_IRQ,
417	}, {		/* SOF IRQ */
418		.start		= INT_USB_IRQ_ISO,
419		.flags		= IORESOURCE_IRQ,
420	},
421};
422
423static u64 udc_dmamask = ~(u32)0;
424
425static struct platform_device udc_device = {
426	.name		= "omap_udc",
427	.id		= -1,
428	.dev = {
429		.release		= usb_release,
430		.dma_mask		= &udc_dmamask,
431		.coherent_dma_mask	= 0xffffffff,
432	},
433	.num_resources	= ARRAY_SIZE(udc_resources),
434	.resource	= udc_resources,
435};
436
437#endif
438
439#if	defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
440
441/* The dmamask must be set for OHCI to work */
442static u64 ohci_dmamask = ~(u32)0;
443
444static struct resource ohci_resources[] = {
445	{
446		.start	= OMAP_OHCI_BASE,
447		.end	= OMAP_OHCI_BASE + 0xff,
448		.flags	= IORESOURCE_MEM,
449	},
450	{
451		.start	= INT_USB_IRQ_HGEN,
452		.flags	= IORESOURCE_IRQ,
453	},
454};
455
456static struct platform_device ohci_device = {
457	.name			= "ohci",
458	.id			= -1,
459	.dev = {
460		.release		= usb_release,
461		.dma_mask		= &ohci_dmamask,
462		.coherent_dma_mask	= 0xffffffff,
463	},
464	.num_resources	= ARRAY_SIZE(ohci_resources),
465	.resource		= ohci_resources,
466};
467
468#endif
469
470#if	defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
471
472static struct resource otg_resources[] = {
473	/* order is significant! */
474	{
475		.start		= OTG_BASE,
476		.end		= OTG_BASE + 0xff,
477		.flags		= IORESOURCE_MEM,
478	}, {
479		.start		= INT_USB_IRQ_OTG,
480		.flags		= IORESOURCE_IRQ,
481	},
482};
483
484static struct platform_device otg_device = {
485	.name		= "omap_otg",
486	.id		= -1,
487	.dev = {
488		.release		= usb_release,
489	},
490	.num_resources	= ARRAY_SIZE(otg_resources),
491	.resource	= otg_resources,
492};
493
494#endif
495
496/*-------------------------------------------------------------------------*/
497
498#define ULPD_CLOCK_CTRL_REG	__REG16(ULPD_CLOCK_CTRL)
499#define ULPD_SOFT_REQ_REG	__REG16(ULPD_SOFT_REQ)
500
501
502// as does (on omap1) any nonzero value for config->otg port number
503#ifdef	CONFIG_USB_GADGET_OMAP
504#define	is_usb0_device(config)	1
505#else
506#define	is_usb0_device(config)	0
507#endif
508
509/*-------------------------------------------------------------------------*/
510
511#ifdef	CONFIG_ARCH_OMAP_OTG
512
513void __init
514omap_otg_init(struct omap_usb_config *config)
515{
516	u32		syscon = OTG_SYSCON_1_REG & 0xffff;
517	int		status;
518	int		alt_pingroup = 0;
519
520	/* NOTE:  no bus or clock setup (yet?) */
521
522	syscon = OTG_SYSCON_1_REG & 0xffff;
523	if (!(syscon & OTG_RESET_DONE))
524		pr_debug("USB resets not complete?\n");
525
526	// OTG_IRQ_EN_REG = 0;
527
528	/* pin muxing and transceiver pinouts */
529	if (config->pins[0] > 2)	/* alt pingroup 2 */
530		alt_pingroup = 1;
531	syscon |= omap_usb0_init(config->pins[0], is_usb0_device(config));
532	syscon |= omap_usb1_init(config->pins[1]);
533	syscon |= omap_usb2_init(config->pins[2], alt_pingroup);
534	pr_debug("OTG_SYSCON_1_REG = %08x\n", syscon);
535	OTG_SYSCON_1_REG = syscon;
536
537	syscon = config->hmc_mode;
538	syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
539#ifdef	CONFIG_USB_OTG
540	if (config->otg)
541		syscon |= OTG_EN;
542#endif
543	if (cpu_class_is_omap1())
544		pr_debug("USB_TRANSCEIVER_CTRL_REG = %03x\n", USB_TRANSCEIVER_CTRL_REG);
545	pr_debug("OTG_SYSCON_2_REG = %08x\n", syscon);
546	OTG_SYSCON_2_REG = syscon;
547
548	printk("USB: hmc %d", config->hmc_mode);
549	if (!alt_pingroup)
550		printk(", usb2 alt %d wires", config->pins[2]);
551	else if (config->pins[0])
552		printk(", usb0 %d wires%s", config->pins[0],
553			is_usb0_device(config) ? " (dev)" : "");
554	if (config->pins[1])
555		printk(", usb1 %d wires", config->pins[1]);
556	if (!alt_pingroup && config->pins[2])
557		printk(", usb2 %d wires", config->pins[2]);
558	if (config->otg)
559		printk(", Mini-AB on usb%d", config->otg - 1);
560	printk("\n");
561
562	if (cpu_class_is_omap1()) {
563		/* leave USB clocks/controllers off until needed */
564		ULPD_SOFT_REQ_REG &= ~SOFT_USB_CLK_REQ;
565		ULPD_CLOCK_CTRL_REG &= ~USB_MCLK_EN;
566		ULPD_CLOCK_CTRL_REG |= DIS_USB_PVCI_CLK;
567	}
568	syscon = OTG_SYSCON_1_REG;
569	syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
570
571#ifdef	CONFIG_USB_GADGET_OMAP
572	if (config->otg || config->register_dev) {
573		syscon &= ~DEV_IDLE_EN;
574		udc_device.dev.platform_data = config;
575		status = platform_device_register(&udc_device);
576		if (status)
577			pr_debug("can't register UDC device, %d\n", status);
578	}
579#endif
580
581#if	defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
582	if (config->otg || config->register_host) {
583		syscon &= ~HST_IDLE_EN;
584		ohci_device.dev.platform_data = config;
585		if (cpu_is_omap730())
586			ohci_resources[1].start = INT_730_USB_HHC_1;
587		status = platform_device_register(&ohci_device);
588		if (status)
589			pr_debug("can't register OHCI device, %d\n", status);
590	}
591#endif
592
593#ifdef	CONFIG_USB_OTG
594	if (config->otg) {
595		syscon &= ~OTG_IDLE_EN;
596		otg_device.dev.platform_data = config;
597		if (cpu_is_omap730())
598			otg_resources[1].start = INT_730_USB_OTG;
599		status = platform_device_register(&otg_device);
600		if (status)
601			pr_debug("can't register OTG device, %d\n", status);
602	}
603#endif
604	pr_debug("OTG_SYSCON_1_REG = %08x\n", syscon);
605	OTG_SYSCON_1_REG = syscon;
606
607	status = 0;
608}
609
610#else
611static inline void omap_otg_init(struct omap_usb_config *config) {}
612#endif
613
614/*-------------------------------------------------------------------------*/
615
616#ifdef	CONFIG_ARCH_OMAP15XX
617
618#define ULPD_DPLL_CTRL_REG	__REG16(ULPD_DPLL_CTRL)
619#define DPLL_IOB		(1 << 13)
620#define DPLL_PLL_ENABLE		(1 << 4)
621#define DPLL_LOCK		(1 << 0)
622
623#define ULPD_APLL_CTRL_REG	__REG16(ULPD_APLL_CTRL)
624#define APLL_NDPLL_SWITCH	(1 << 0)
625
626
627static void __init omap_1510_usb_init(struct omap_usb_config *config)
628{
629	unsigned int val;
630
631	omap_usb0_init(config->pins[0], is_usb0_device(config));
632	omap_usb1_init(config->pins[1]);
633	omap_usb2_init(config->pins[2], 0);
634
635	val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
636	val |= (config->hmc_mode << 1);
637	omap_writel(val, MOD_CONF_CTRL_0);
638
639	printk("USB: hmc %d", config->hmc_mode);
640	if (config->pins[0])
641		printk(", usb0 %d wires%s", config->pins[0],
642			is_usb0_device(config) ? " (dev)" : "");
643	if (config->pins[1])
644		printk(", usb1 %d wires", config->pins[1]);
645	if (config->pins[2])
646		printk(", usb2 %d wires", config->pins[2]);
647	printk("\n");
648
649	/* use DPLL for 48 MHz function clock */
650	pr_debug("APLL %04x DPLL %04x REQ %04x\n", ULPD_APLL_CTRL_REG,
651			ULPD_DPLL_CTRL_REG, ULPD_SOFT_REQ_REG);
652	ULPD_APLL_CTRL_REG &= ~APLL_NDPLL_SWITCH;
653	ULPD_DPLL_CTRL_REG |= DPLL_IOB | DPLL_PLL_ENABLE;
654	ULPD_SOFT_REQ_REG |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
655	while (!(ULPD_DPLL_CTRL_REG & DPLL_LOCK))
656		cpu_relax();
657
658#ifdef	CONFIG_USB_GADGET_OMAP
659	if (config->register_dev) {
660		int status;
661
662		udc_device.dev.platform_data = config;
663		status = platform_device_register(&udc_device);
664		if (status)
665			pr_debug("can't register UDC device, %d\n", status);
666		/* udc driver gates 48MHz by D+ pullup */
667	}
668#endif
669
670#if	defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
671	if (config->register_host) {
672		int status;
673
674		ohci_device.dev.platform_data = config;
675		status = platform_device_register(&ohci_device);
676		if (status)
677			pr_debug("can't register OHCI device, %d\n", status);
678		/* hcd explicitly gates 48MHz */
679	}
680#endif
681}
682
683#else
684static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
685#endif
686
687/*-------------------------------------------------------------------------*/
688
689static struct omap_usb_config platform_data;
690
691static int __init
692omap_usb_init(void)
693{
694	const struct omap_usb_config *config;
695
696	config = omap_get_config(OMAP_TAG_USB, struct omap_usb_config);
697	if (config == NULL) {
698		printk(KERN_ERR "USB: No board-specific "
699				"platform config found\n");
700		return -ENODEV;
701	}
702	platform_data = *config;
703
704	if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx())
705		omap_otg_init(&platform_data);
706	else if (cpu_is_omap15xx())
707		omap_1510_usb_init(&platform_data);
708	else {
709		printk(KERN_ERR "USB: No init for your chip yet\n");
710		return -ENODEV;
711	}
712	return 0;
713}
714
715subsys_initcall(omap_usb_init);
716