1/* 2 * linux/arch/arm/mach-realview/core.h 3 * 4 * Copyright (C) 2004 ARM Limited 5 * Copyright (C) 2000 Deep Blue Solutions Ltd 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 */ 21 22#ifndef __ASM_ARCH_REALVIEW_H 23#define __ASM_ARCH_REALVIEW_H 24 25#include <linux/amba/bus.h> 26 27#include <asm/leds.h> 28#include <asm/io.h> 29 30extern struct sys_timer realview_timer; 31 32#define AMBA_DEVICE(name,busid,base,plat) \ 33static struct amba_device name##_device = { \ 34 .dev = { \ 35 .coherent_dma_mask = ~0, \ 36 .bus_id = busid, \ 37 .platform_data = plat, \ 38 }, \ 39 .res = { \ 40 .start = REALVIEW_##base##_BASE, \ 41 .end = (REALVIEW_##base##_BASE) + SZ_4K - 1,\ 42 .flags = IORESOURCE_MEM, \ 43 }, \ 44 .dma_mask = ~0, \ 45 .irq = base##_IRQ, \ 46 /* .dma = base##_DMA,*/ \ 47} 48 49/* 50 * These devices are connected via the core APB bridge 51 */ 52#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } 53#define GPIO2_DMA { 0, 0 } 54#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } 55#define GPIO3_DMA { 0, 0 } 56 57#define AACI_IRQ { IRQ_AACI, NO_IRQ } 58#define AACI_DMA { 0x80, 0x81 } 59#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_MMCI0B } 60#define MMCI0_DMA { 0x84, 0 } 61#define KMI0_IRQ { IRQ_KMI0, NO_IRQ } 62#define KMI0_DMA { 0, 0 } 63#define KMI1_IRQ { IRQ_KMI1, NO_IRQ } 64#define KMI1_DMA { 0, 0 } 65 66/* 67 * These devices are connected directly to the multi-layer AHB switch 68 */ 69#define SMC_IRQ { NO_IRQ, NO_IRQ } 70#define SMC_DMA { 0, 0 } 71#define MPMC_IRQ { NO_IRQ, NO_IRQ } 72#define MPMC_DMA { 0, 0 } 73#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } 74#define CLCD_DMA { 0, 0 } 75#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } 76#define DMAC_DMA { 0, 0 } 77 78/* 79 * These devices are connected via the core APB bridge 80 */ 81#define SCTL_IRQ { NO_IRQ, NO_IRQ } 82#define SCTL_DMA { 0, 0 } 83#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } 84#define WATCHDOG_DMA { 0, 0 } 85#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } 86#define GPIO0_DMA { 0, 0 } 87#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } 88#define GPIO1_DMA { 0, 0 } 89#define RTC_IRQ { IRQ_RTCINT, NO_IRQ } 90#define RTC_DMA { 0, 0 } 91 92/* 93 * These devices are connected via the DMA APB bridge 94 */ 95#define SCI_IRQ { IRQ_SCIINT, NO_IRQ } 96#define SCI_DMA { 7, 6 } 97#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } 98#define UART0_DMA { 15, 14 } 99#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } 100#define UART1_DMA { 13, 12 } 101#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } 102#define UART2_DMA { 11, 10 } 103#define UART3_IRQ { IRQ_UART3, NO_IRQ } 104#define UART3_DMA { 0x86, 0x87 } 105#define SSP_IRQ { IRQ_SSPINT, NO_IRQ } 106#define SSP_DMA { 9, 8 } 107 108 109extern struct platform_device realview_flash_device; 110extern struct platform_device realview_smc91x_device; 111extern struct platform_device realview_i2c_device; 112extern struct mmc_platform_data realview_mmc0_plat_data; 113extern struct mmc_platform_data realview_mmc1_plat_data; 114extern struct clk realview_clcd_clk; 115extern struct clcd_board clcd_plat_data; 116 117extern void realview_leds_event(led_event_t ledevt); 118 119#endif 120