1SMBus Protocol Summary 2====================== 3The following is a summary of the SMBus protocol. It applies to 4all revisions of the protocol (1.0, 1.1, and 2.0). 5Certain protocol features which are not supported by 6this package are briefly described at the end of this document. 7 8Some adapters understand only the SMBus (System Management Bus) protocol, 9which is a subset from the I2C protocol. Fortunately, many devices use 10only the same subset, which makes it possible to put them on an SMBus. 11If you write a driver for some I2C device, please try to use the SMBus 12commands if at all possible (if the device uses only that subset of the 13I2C protocol). This makes it possible to use the device driver on both 14SMBus adapters and I2C adapters (the SMBus command set is automatically 15translated to I2C on I2C adapters, but plain I2C commands can not be 16handled at all on most pure SMBus adapters). 17 18Below is a list of SMBus commands. 19 20Key to symbols 21============== 22 23S (1 bit) : Start bit 24P (1 bit) : Stop bit 25Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0. 26A, NA (1 bit) : Accept and reverse accept bit. 27Addr (7 bits): I2C 7 bit address. Note that this can be expanded as usual to 28 get a 10 bit I2C address. 29Comm (8 bits): Command byte, a data byte which often selects a register on 30 the device. 31Data (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh 32 for 16 bit data. 33Count (8 bits): A data byte containing the length of a block operation. 34 35[..]: Data sent by I2C device, as opposed to data sent by the host adapter. 36 37 38SMBus Write Quick 39================= 40 41This sends a single bit to the device, at the place of the Rd/Wr bit. 42There is no equivalent Read Quick command. 43 44A Addr Rd/Wr [A] P 45 46 47SMBus Read Byte 48=============== 49 50This reads a single byte from a device, without specifying a device 51register. Some devices are so simple that this interface is enough; for 52others, it is a shorthand if you want to read the same register as in 53the previous SMBus command. 54 55S Addr Rd [A] [Data] NA P 56 57 58SMBus Write Byte 59================ 60 61This is the reverse of Read Byte: it sends a single byte to a device. 62See Read Byte for more information. 63 64S Addr Wr [A] Data [A] P 65 66 67SMBus Read Byte Data 68==================== 69 70This reads a single byte from a device, from a designated register. 71The register is specified through the Comm byte. 72 73S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P 74 75 76SMBus Read Word Data 77==================== 78 79This command is very like Read Byte Data; again, data is read from a 80device, from a designated register that is specified through the Comm 81byte. But this time, the data is a complete word (16 bits). 82 83S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P 84 85 86SMBus Write Byte Data 87===================== 88 89This writes a single byte to a device, to a designated register. The 90register is specified through the Comm byte. This is the opposite of 91the Read Byte Data command. 92 93S Addr Wr [A] Comm [A] Data [A] P 94 95 96SMBus Write Word Data 97===================== 98 99This is the opposite operation of the Read Word Data command. 16 bits 100of data is written to a device, to the designated register that is 101specified through the Comm byte. 102 103S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P 104 105 106SMBus Process Call 107================== 108 109This command selects a device register (through the Comm byte), sends 11016 bits of data to it, and reads 16 bits of data in return. 111 112S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] 113 S Addr Rd [A] [DataLow] A [DataHigh] NA P 114 115 116SMBus Block Read 117================ 118 119This command reads a block of up to 32 bytes from a device, from a 120designated register that is specified through the Comm byte. The amount 121of data is specified by the device in the Count byte. 122 123S Addr Wr [A] Comm [A] 124 S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P 125 126 127SMBus Block Write 128================= 129 130The opposite of the Block Read command, this writes up to 32 bytes to 131a device, to a designated register that is specified through the 132Comm byte. The amount of data is specified in the Count byte. 133 134S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P 135 136 137SMBus Block Process Call 138======================== 139 140SMBus Block Process Call was introduced in Revision 2.0 of the specification. 141 142This command selects a device register (through the Comm byte), sends 1431 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return. 144 145S Addr Wr [A] Comm [A] Count [A] Data [A] ... 146 S Addr Rd [A] [Count] A [Data] ... A P 147 148 149SMBus Host Notify 150================= 151 152This command is sent from a SMBus device acting as a master to the 153SMBus host acting as a slave. 154It is the same form as Write Word, with the command code replaced by the 155alerting device's address. 156 157[S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P] 158 159 160Packet Error Checking (PEC) 161=========================== 162Packet Error Checking was introduced in Revision 1.1 of the specification. 163 164PEC adds a CRC-8 error-checking byte to all transfers. 165 166 167Address Resolution Protocol (ARP) 168================================= 169The Address Resolution Protocol was introduced in Revision 2.0 of 170the specification. It is a higher-layer protocol which uses the 171messages above. 172 173ARP adds device enumeration and dynamic address assignment to 174the protocol. All ARP communications use slave address 0x61 and 175require PEC checksums. 176 177 178I2C Block Transactions 179====================== 180The following I2C block transactions are supported by the 181SMBus layer and are described here for completeness. 182I2C block transactions do not limit the number of bytes transferred 183but the SMBus layer places a limit of 32 bytes. 184 185 186I2C Block Read 187============== 188 189This command reads a block of bytes from a device, from a 190designated register that is specified through the Comm byte. 191 192S Addr Wr [A] Comm [A] 193 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P 194 195 196I2C Block Read (2 Comm bytes) 197============================= 198 199This command reads a block of bytes from a device, from a 200designated register that is specified through the two Comm bytes. 201 202S Addr Wr [A] Comm1 [A] Comm2 [A] 203 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P 204 205 206I2C Block Write 207=============== 208 209The opposite of the Block Read command, this writes bytes to 210a device, to a designated register that is specified through the 211Comm byte. Note that command lengths of 0, 2, or more bytes are 212supported as they are indistinguishable from data. 213 214S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P 215