1README on the LCD Panels 2======================== 3 4Configuration options for several LCD panels, available from Logic PD, 5are included in the kernel source. This README will help you 6understand the configuration data and give you some guidance for 7adding support for other panels if you wish. 8 9 10lcd-panels.h 11------------ 12 13There is no way, at present, to detect which panel is attached to the 14system at runtime. Thus the kernel configuration is static. The file 15arch/arm/mach-ld7a40x/lcd-panels.h (or similar) defines all of the 16panel specific parameters. 17 18It should be possible for this data to be shared among several device 19families. The current layout may be insufficiently general, but it is 20amenable to improvement. 21 22 23PIXEL_CLOCK 24----------- 25 26The panel data sheets will give a range of acceptable pixel clocks. 27The fundamental LCDCLK input frequency is divided down by a PCD 28constant in field '.tim2'. It may happen that it is impossible to set 29the pixel clock within this range. A clock which is too slow will 30tend to flicker. For the highest quality image, set the clock as high 31as possible. 32 33 34MARGINS 35------- 36 37These values may be difficult to glean from the panel data sheet. In 38the case of the Sharp panels, the upper margin is explicitly called 39out as a specific number of lines from the top of the frame. The 40other values may not matter as much as the panels tend to 41automatically center the image. 42 43 44Sync Sense 45---------- 46 47The sense of the hsync and vsync pulses may be called out in the data 48sheet. On one panel, the sense of these pulses determine the height 49of the visible region on the panel. Most of the Sharp panels use 50negative sense sync pulses set by the TIM2_IHS and TIM2_IVS bits in 51'.tim2'. 52 53 54Pel Layout 55---------- 56 57The Sharp color TFT panels are all configured for 16 bit direct color 58modes. The amba-lcd driver sets the pel mode to 565 for 5 bits of 59each red and blue and 6 bits of green. 60