1/* 2 * HND SiliconBackplane MIPS/ARM cores software interface. 3 * 4 * Copyright (C) 2013, Broadcom Corporation. All Rights Reserved. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 13 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 15 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 16 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 * 18 * $Id: hndcpu.h 401759 2013-05-13 16:08:08Z $ 19 */ 20 21#ifndef _hndcpu_h_ 22#define _hndcpu_h_ 23 24#if defined(mips) 25#include <hndmips.h> 26#elif defined(__arm__) || defined(__thumb__) || defined(__thumb2__) 27#include <hndarm.h> 28#endif 29 30extern uint si_irq(si_t *sih); 31extern uint32 si_cpu_clock(si_t *sih); 32extern uint32 si_mem_clock(si_t *sih); 33extern void hnd_cpu_wait(si_t *sih); 34extern void hnd_cpu_jumpto(void *addr); 35extern void hnd_cpu_reset(si_t *sih); 36#if defined(BCMDBG_LOADAVG) && defined(__ARM_ARCH_7R__) 37extern void hnd_cpu_loadavg_timer(si_t *sih, uint32 val); 38#else 39extern void hnd_cpu_deadman_timer(si_t *sih, uint32 val); 40#endif 41extern void si_router_coma(si_t *sih, int reset, int delay); 42extern void si_dmc_phyctl(si_t *sih, uint32 phyctl_val); 43extern uint32 si_arm_sflags(si_t *sih); 44 45#endif /* _hndcpu_h_ */ 46