1/* 2 * Universal Interface for Intel High Definition Audio Codec 3 * 4 * HD audio interface patch for Silicon Labs 3054/5 modem codec 5 * 6 * Copyright (c) 2005 Sasha Khapyorsky <sashak@alsa-project.org> 7 * Takashi Iwai <tiwai@suse.de> 8 * 9 * 10 * This driver is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This driver is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 */ 24 25#include <sound/driver.h> 26#include <linux/init.h> 27#include <linux/delay.h> 28#include <linux/slab.h> 29#include <sound/core.h> 30#include "hda_codec.h" 31#include "hda_local.h" 32 33 34/* si3054 verbs */ 35#define SI3054_VERB_READ_NODE 0x900 36#define SI3054_VERB_WRITE_NODE 0x100 37 38/* si3054 nodes (registers) */ 39#define SI3054_EXTENDED_MID 2 40#define SI3054_LINE_RATE 3 41#define SI3054_LINE_LEVEL 4 42#define SI3054_GPIO_CFG 5 43#define SI3054_GPIO_POLARITY 6 44#define SI3054_GPIO_STICKY 7 45#define SI3054_GPIO_WAKEUP 8 46#define SI3054_GPIO_STATUS 9 47#define SI3054_GPIO_CONTROL 10 48#define SI3054_MISC_AFE 11 49#define SI3054_CHIPID 12 50#define SI3054_LINE_CFG1 13 51#define SI3054_LINE_STATUS 14 52#define SI3054_DC_TERMINATION 15 53#define SI3054_LINE_CONFIG 16 54#define SI3054_CALLPROG_ATT 17 55#define SI3054_SQ_CONTROL 18 56#define SI3054_MISC_CONTROL 19 57#define SI3054_RING_CTRL1 20 58#define SI3054_RING_CTRL2 21 59 60/* extended MID */ 61#define SI3054_MEI_READY 0xf 62 63/* line level */ 64#define SI3054_ATAG_MASK 0x00f0 65#define SI3054_DTAG_MASK 0xf000 66 67/* GPIO bits */ 68#define SI3054_GPIO_OH 0x0001 69#define SI3054_GPIO_CID 0x0002 70 71/* chipid and revisions */ 72#define SI3054_CHIPID_CODEC_REV_MASK 0x000f 73#define SI3054_CHIPID_DAA_REV_MASK 0x00f0 74#define SI3054_CHIPID_INTERNATIONAL 0x0100 75#define SI3054_CHIPID_DAA_ID 0x0f00 76#define SI3054_CHIPID_CODEC_ID (1<<12) 77 78/* si3054 codec registers (nodes) access macros */ 79#define GET_REG(codec,reg) (snd_hda_codec_read(codec,reg,0,SI3054_VERB_READ_NODE,0)) 80#define SET_REG(codec,reg,val) (snd_hda_codec_write(codec,reg,0,SI3054_VERB_WRITE_NODE,val)) 81 82 83struct si3054_spec { 84 unsigned international; 85 struct hda_pcm pcm; 86}; 87 88 89/* 90 * Modem mixer 91 */ 92 93#define PRIVATE_VALUE(reg,mask) ((reg<<16)|(mask&0xffff)) 94#define PRIVATE_REG(val) ((val>>16)&0xffff) 95#define PRIVATE_MASK(val) (val&0xffff) 96 97static int si3054_switch_info(struct snd_kcontrol *kcontrol, 98 struct snd_ctl_elem_info *uinfo) 99{ 100 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 101 uinfo->count = 1; 102 uinfo->value.integer.min = 0; 103 uinfo->value.integer.max = 1; 104 return 0; 105} 106 107static int si3054_switch_get(struct snd_kcontrol *kcontrol, 108 struct snd_ctl_elem_value *uvalue) 109{ 110 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 111 u16 reg = PRIVATE_REG(kcontrol->private_value); 112 u16 mask = PRIVATE_MASK(kcontrol->private_value); 113 uvalue->value.integer.value[0] = (GET_REG(codec, reg)) & mask ? 1 : 0 ; 114 return 0; 115} 116 117static int si3054_switch_put(struct snd_kcontrol *kcontrol, 118 struct snd_ctl_elem_value *uvalue) 119{ 120 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 121 u16 reg = PRIVATE_REG(kcontrol->private_value); 122 u16 mask = PRIVATE_MASK(kcontrol->private_value); 123 if (uvalue->value.integer.value[0]) 124 SET_REG(codec, reg, (GET_REG(codec, reg)) | mask); 125 else 126 SET_REG(codec, reg, (GET_REG(codec, reg)) & ~mask); 127 return 0; 128} 129 130#define SI3054_KCONTROL(kname,reg,mask) { \ 131 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 132 .name = kname, \ 133 .info = si3054_switch_info, \ 134 .get = si3054_switch_get, \ 135 .put = si3054_switch_put, \ 136 .private_value = PRIVATE_VALUE(reg,mask), \ 137} 138 139 140static struct snd_kcontrol_new si3054_modem_mixer[] = { 141 SI3054_KCONTROL("Off-hook Switch", SI3054_GPIO_CONTROL, SI3054_GPIO_OH), 142 SI3054_KCONTROL("Caller ID Switch", SI3054_GPIO_CONTROL, SI3054_GPIO_CID), 143 {} 144}; 145 146static int si3054_build_controls(struct hda_codec *codec) 147{ 148 return snd_hda_add_new_ctls(codec, si3054_modem_mixer); 149} 150 151 152/* 153 * PCM callbacks 154 */ 155 156static int si3054_pcm_prepare(struct hda_pcm_stream *hinfo, 157 struct hda_codec *codec, 158 unsigned int stream_tag, 159 unsigned int format, 160 struct snd_pcm_substream *substream) 161{ 162 u16 val; 163 164 SET_REG(codec, SI3054_LINE_RATE, substream->runtime->rate); 165 val = GET_REG(codec, SI3054_LINE_LEVEL); 166 val &= 0xff << (8 * (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)); 167 val |= ((stream_tag & 0xf) << 4) << (8 * (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)); 168 SET_REG(codec, SI3054_LINE_LEVEL, val); 169 170 snd_hda_codec_setup_stream(codec, hinfo->nid, 171 stream_tag, 0, format); 172 return 0; 173} 174 175static int si3054_pcm_open(struct hda_pcm_stream *hinfo, 176 struct hda_codec *codec, 177 struct snd_pcm_substream *substream) 178{ 179 static unsigned int rates[] = { 8000, 9600, 16000 }; 180 static struct snd_pcm_hw_constraint_list hw_constraints_rates = { 181 .count = ARRAY_SIZE(rates), 182 .list = rates, 183 .mask = 0, 184 }; 185 substream->runtime->hw.period_bytes_min = 80; 186 return snd_pcm_hw_constraint_list(substream->runtime, 0, 187 SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 188} 189 190 191static struct hda_pcm_stream si3054_pcm = { 192 .substreams = 1, 193 .channels_min = 1, 194 .channels_max = 1, 195 .nid = 0x1, 196 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_KNOT, 197 .formats = SNDRV_PCM_FMTBIT_S16_LE, 198 .maxbps = 16, 199 .ops = { 200 .open = si3054_pcm_open, 201 .prepare = si3054_pcm_prepare, 202 }, 203}; 204 205 206static int si3054_build_pcms(struct hda_codec *codec) 207{ 208 struct si3054_spec *spec = codec->spec; 209 struct hda_pcm *info = &spec->pcm; 210 si3054_pcm.nid = codec->mfg; 211 codec->num_pcms = 1; 212 codec->pcm_info = info; 213 info->name = "Si3054 Modem"; 214 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = si3054_pcm; 215 info->stream[SNDRV_PCM_STREAM_CAPTURE] = si3054_pcm; 216 info->is_modem = 1; 217 return 0; 218} 219 220 221/* 222 * Init part 223 */ 224 225static int si3054_init(struct hda_codec *codec) 226{ 227 struct si3054_spec *spec = codec->spec; 228 unsigned wait_count; 229 u16 val; 230 231 snd_hda_codec_write(codec, AC_NODE_ROOT, 0, AC_VERB_SET_CODEC_RESET, 0); 232 snd_hda_codec_write(codec, codec->mfg, 0, AC_VERB_SET_STREAM_FORMAT, 0); 233 SET_REG(codec, SI3054_LINE_RATE, 9600); 234 SET_REG(codec, SI3054_LINE_LEVEL, SI3054_DTAG_MASK|SI3054_ATAG_MASK); 235 SET_REG(codec, SI3054_EXTENDED_MID, 0); 236 237 wait_count = 10; 238 do { 239 msleep(2); 240 val = GET_REG(codec, SI3054_EXTENDED_MID); 241 } while ((val & SI3054_MEI_READY) != SI3054_MEI_READY && wait_count--); 242 243 if((val&SI3054_MEI_READY) != SI3054_MEI_READY) { 244 snd_printk(KERN_ERR "si3054: cannot initialize. EXT MID = %04x\n", val); 245 /* let's pray that this is no fatal error */ 246 /* return -EACCES; */ 247 } 248 249 SET_REG(codec, SI3054_GPIO_POLARITY, 0xffff); 250 SET_REG(codec, SI3054_GPIO_CFG, 0x0); 251 SET_REG(codec, SI3054_MISC_AFE, 0); 252 SET_REG(codec, SI3054_LINE_CFG1,0x200); 253 254 if((GET_REG(codec,SI3054_LINE_STATUS) & (1<<6)) == 0) { 255 snd_printd("Link Frame Detect(FDT) is not ready (line status: %04x)\n", 256 GET_REG(codec,SI3054_LINE_STATUS)); 257 } 258 259 spec->international = GET_REG(codec, SI3054_CHIPID) & SI3054_CHIPID_INTERNATIONAL; 260 261 return 0; 262} 263 264static void si3054_free(struct hda_codec *codec) 265{ 266 kfree(codec->spec); 267} 268 269 270/* 271 */ 272 273static struct hda_codec_ops si3054_patch_ops = { 274 .build_controls = si3054_build_controls, 275 .build_pcms = si3054_build_pcms, 276 .init = si3054_init, 277 .free = si3054_free, 278#ifdef CONFIG_PM 279 //.suspend = si3054_suspend, 280 .resume = si3054_init, 281#endif 282}; 283 284static int patch_si3054(struct hda_codec *codec) 285{ 286 struct si3054_spec *spec = kzalloc(sizeof(*spec), GFP_KERNEL); 287 if (spec == NULL) 288 return -ENOMEM; 289 codec->spec = spec; 290 codec->patch_ops = si3054_patch_ops; 291 return 0; 292} 293 294/* 295 * patch entries 296 */ 297struct hda_codec_preset snd_hda_preset_si3054[] = { 298 { .id = 0x163c3055, .name = "Si3054", .patch = patch_si3054 }, 299 { .id = 0x163c3155, .name = "Si3054", .patch = patch_si3054 }, 300 { .id = 0x11c11040, .name = "Si3054", .patch = patch_si3054 }, 301 { .id = 0x11c13026, .name = "Si3054", .patch = patch_si3054 }, 302 { .id = 0x11c13055, .name = "Si3054", .patch = patch_si3054 }, 303 { .id = 0x11c13155, .name = "Si3054", .patch = patch_si3054 }, 304 { .id = 0x10573055, .name = "Si3054", .patch = patch_si3054 }, 305 { .id = 0x10573057, .name = "Si3054", .patch = patch_si3054 }, 306 { .id = 0x10573155, .name = "Si3054", .patch = patch_si3054 }, 307 /* Asus A8J Modem (SM56) */ 308 { .id = 0x15433155, .name = "Si3054", .patch = patch_si3054 }, 309 {} 310}; 311