1/* 2 ********************************************************************** 3 * sblive_fx.h 4 * Copyright 1999, 2000 Creative Labs, Inc. 5 * 6 ********************************************************************** 7 * 8 * Date Author Summary of changes 9 * ---- ------ ------------------ 10 * October 20, 1999 Bertrand Lee base code release 11 * 12 ********************************************************************** 13 * 14 * This program is free software; you can redistribute it and/or 15 * modify it under the terms of the GNU General Public License as 16 * published by the Free Software Foundation; either version 2 of 17 * the License, or (at your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 * GNU General Public License for more details. 23 * 24 * You should have received a copy of the GNU General Public 25 * License along with this program; if not, write to the Free 26 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, 27 * USA. 28 * 29 ********************************************************************** 30 */ 31 32#ifndef _EFXMGR_H 33#define _EFXMGR_H 34 35struct emu_efx_info_t{ 36 int opcode_shift; 37 int high_operand_shift; 38 int instruction_start; 39 int gpr_base; 40 int output_base; 41}; 42 43 44#define WRITE_EFX(a, b, c) sblive_writeptr((a), emu_efx_info[card->is_audigy].instruction_start + (b), 0, (c)) 45 46#define OP(op, z, w, x, y) \ 47 do { WRITE_EFX(card, (pc) * 2, ((x) << emu_efx_info[card->is_audigy].high_operand_shift) | (y)); \ 48 WRITE_EFX(card, (pc) * 2 + 1, ((op) << emu_efx_info[card->is_audigy].opcode_shift ) | ((z) << emu_efx_info[card->is_audigy].high_operand_shift) | (w)); \ 49 ++pc; } while (0) 50 51#define NUM_INPUTS 0x20 52#define NUM_OUTPUTS 0x20 53#define NUM_GPRS 0x100 54 55#define A_NUM_INPUTS 0x60 56#define A_NUM_OUTPUTS 0x60 57#define A_NUM_GPRS 0x200 58 59#define GPR_NAME_SIZE 32 60#define PATCH_NAME_SIZE 32 61 62struct dsp_rpatch { 63 char name[PATCH_NAME_SIZE]; 64 u16 code_start; 65 u16 code_size; 66 67 unsigned long gpr_used[NUM_GPRS / (sizeof(unsigned long) * 8) + 1]; 68 unsigned long gpr_input[NUM_GPRS / (sizeof(unsigned long) * 8) + 1]; 69 unsigned long route[NUM_OUTPUTS]; 70 unsigned long route_v[NUM_OUTPUTS]; 71}; 72 73struct dsp_patch { 74 char name[PATCH_NAME_SIZE]; 75 u8 id; 76 unsigned long input; /* bitmap of the lines used as inputs */ 77 unsigned long output; /* bitmap of the lines used as outputs */ 78 u16 code_start; 79 u16 code_size; 80 81 unsigned long gpr_used[NUM_GPRS / (sizeof(unsigned long) * 8) + 1]; /* bitmap of used gprs */ 82 unsigned long gpr_input[NUM_GPRS / (sizeof(unsigned long) * 8) + 1]; 83 u8 traml_istart; /* starting address of the internal tram lines used */ 84 u8 traml_isize; /* number of internal tram lines used */ 85 86 u8 traml_estart; 87 u8 traml_esize; 88 89 u16 tramb_istart; /* starting address of the internal tram memory used */ 90 u16 tramb_isize; /* amount of internal memory used */ 91 u32 tramb_estart; 92 u32 tramb_esize; 93}; 94 95struct dsp_gpr { 96 u8 type; /* gpr type, STATIC, DYNAMIC, INPUT, OUTPUT, CONTROL */ 97 char name[GPR_NAME_SIZE]; /* gpr value, only valid for control gprs */ 98 s32 min, max; /* value range for this gpr, only valid for control gprs */ 99 u8 line; /* which input/output line is the gpr attached, only valid for input/output gprs */ 100 u8 usage; 101}; 102 103enum { 104 GPR_TYPE_NULL = 0, 105 GPR_TYPE_IO, 106 GPR_TYPE_STATIC, 107 GPR_TYPE_DYNAMIC, 108 GPR_TYPE_CONTROL, 109 GPR_TYPE_CONSTANT 110}; 111 112#define GPR_BASE 0x100 113#define OUTPUT_BASE 0x20 114 115#define A_GPR_BASE 0x400 116#define A_OUTPUT_BASE 0x60 117 118#define MAX_PATCHES_PAGES 32 119 120struct patch_manager { 121 void *patch[MAX_PATCHES_PAGES]; 122 int current_pages; 123 struct dsp_rpatch rpatch; 124 struct dsp_gpr gpr[NUM_GPRS]; /* gpr usage table */ 125 spinlock_t lock; 126 s16 ctrl_gpr[SOUND_MIXER_NRDEVICES][2]; 127}; 128 129#define PATCHES_PER_PAGE (PAGE_SIZE / sizeof(struct dsp_patch)) 130 131#define PATCH(mgr, i) ((struct dsp_patch *) (mgr)->patch[(i) / PATCHES_PER_PAGE] + (i) % PATCHES_PER_PAGE) 132 133/* PCM volume control */ 134#define TMP_PCM_L 0x100 //temp PCM L (after the vol control) 135#define TMP_PCM_R 0x101 136#define VOL_PCM_L 0x102 //vol PCM 137#define VOL_PCM_R 0x103 138 139/* Routing patch */ 140#define TMP_AC_L 0x104 //tmp ac97 out 141#define TMP_AC_R 0x105 142#define TMP_REAR_L 0x106 //output - Temp Rear 143#define TMP_REAR_R 0x107 144#define TMP_DIGI_L 0x108 //output - Temp digital 145#define TMP_DIGI_R 0x109 146#define DSP_VOL_L 0x10a // main dsp volume 147#define DSP_VOL_R 0x10b 148 149/* hw inputs */ 150#define PCM_IN_L 0x00 151#define PCM_IN_R 0x01 152 153#define PCM1_IN_L 0x04 154#define PCM1_IN_R 0x05 155//mutilchannel playback stream appear here: 156 157#define MULTI_FRONT_L 0x08 158#define MULTI_FRONT_R 0x09 159#define MULTI_REAR_L 0x0a 160#define MULTI_REAR_R 0x0b 161#define MULTI_CENTER 0x0c 162#define MULTI_LFE 0x0d 163 164#define AC97_IN_L 0x10 165#define AC97_IN_R 0x11 166#define SPDIF_CD_L 0x12 167#define SPDIF_CD_R 0x13 168 169/* hw outputs */ 170#define AC97_FRONT_L 0x20 171#define AC97_FRONT_R 0x21 172#define DIGITAL_OUT_L 0x22 173#define DIGITAL_OUT_R 0x23 174#define DIGITAL_CENTER 0x24 175#define DIGITAL_LFE 0x25 176 177#define ANALOG_REAR_L 0x28 178#define ANALOG_REAR_R 0x29 179#define ADC_REC_L 0x2a 180#define ADC_REC_R 0x2b 181 182#define ANALOG_CENTER 0x31 183#define ANALOG_LFE 0x32 184 185 186#define INPUT_PATCH_START(patch, nm, ln, i) \ 187do { \ 188 patch = PATCH(mgr, patch_n); \ 189 strcpy(patch->name, nm); \ 190 patch->code_start = pc * 2; \ 191 patch->input = (1<<(0x1f&ln)); \ 192 patch->output= (1<<(0x1f&ln)); \ 193 patch->id = i; \ 194} while(0) 195 196#define INPUT_PATCH_END(patch) \ 197do { \ 198 patch->code_size = pc * 2 - patch->code_start; \ 199 patch_n++; \ 200} while(0) 201 202 203#define ROUTING_PATCH_START(patch, nm) \ 204do { \ 205 patch = &mgr->rpatch; \ 206 strcpy(patch->name, nm); \ 207 patch->code_start = pc * 2; \ 208} while(0) 209 210#define ROUTING_PATCH_END(patch) \ 211do { \ 212 patch->code_size = pc * 2 - patch->code_start; \ 213} while(0) 214 215#define CONNECT(input, output) set_bit(input, &rpatch->route[(output) - OUTPUT_BASE]); 216 217#define CONNECT_V(input, output) set_bit(input, &rpatch->route_v[(output) - OUTPUT_BASE]); 218 219#define OUTPUT_PATCH_START(patch, nm, ln, i) \ 220do { \ 221 patch = PATCH(mgr, patch_n); \ 222 strcpy(patch->name, nm); \ 223 patch->code_start = pc * 2; \ 224 patch->input = (1<<(0x1f&ln)); \ 225 patch->output= (1<<(0x1f&ln)); \ 226 patch->id = i; \ 227} while(0) 228 229#define OUTPUT_PATCH_END(patch) \ 230do { \ 231 patch->code_size = pc * 2 - patch->code_start; \ 232 patch_n++; \ 233} while(0) 234 235#define GET_OUTPUT_GPR(patch, g, ln) \ 236do { \ 237 mgr->gpr[(g) - GPR_BASE].type = GPR_TYPE_IO; \ 238 mgr->gpr[(g) - GPR_BASE].usage++; \ 239 mgr->gpr[(g) - GPR_BASE].line = ln; \ 240 set_bit((g) - GPR_BASE, patch->gpr_used); \ 241} while(0) 242 243#define GET_INPUT_GPR(patch, g, ln) \ 244do { \ 245 mgr->gpr[(g) - GPR_BASE].type = GPR_TYPE_IO; \ 246 mgr->gpr[(g) - GPR_BASE].usage++; \ 247 mgr->gpr[(g) - GPR_BASE].line = ln; \ 248 set_bit((g) - GPR_BASE, patch->gpr_used); \ 249 set_bit((g) - GPR_BASE, patch->gpr_input); \ 250} while(0) 251 252#define GET_DYNAMIC_GPR(patch, g) \ 253do { \ 254 mgr->gpr[(g) - GPR_BASE].type = GPR_TYPE_DYNAMIC; \ 255 mgr->gpr[(g) - GPR_BASE].usage++; \ 256 set_bit((g) - GPR_BASE, patch->gpr_used); \ 257} while(0) 258 259#define GET_CONTROL_GPR(patch, g, nm, a, b) \ 260do { \ 261 strcpy(mgr->gpr[(g) - GPR_BASE].name, nm); \ 262 mgr->gpr[(g) - GPR_BASE].type = GPR_TYPE_CONTROL; \ 263 mgr->gpr[(g) - GPR_BASE].usage++; \ 264 mgr->gpr[(g) - GPR_BASE].min = a; \ 265 mgr->gpr[(g) - GPR_BASE].max = b; \ 266 sblive_writeptr(card, g, 0, b); \ 267 set_bit((g) - GPR_BASE, patch->gpr_used); \ 268} while(0) 269 270#endif /* _EFXMGR_H */ 271