1/* 2 * Philips UDA1341 mixer device driver 3 * Copyright (c) 2002 Tomas Kasparek <tomas.kasparek@seznam.cz> 4 * 5 * Portions are Copyright (C) 2000 Lernout & Hauspie Speech Products, N.V. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License. 9 * 10 * History: 11 * 12 * 2002-03-13 Tomas Kasparek initial release - based on uda1341.c from OSS 13 * 2002-03-28 Tomas Kasparek basic mixer is working (volume, bass, treble) 14 * 2002-03-30 Tomas Kasparek proc filesystem support, complete mixer and DSP 15 * features support 16 * 2002-04-12 Tomas Kasparek proc interface update, code cleanup 17 * 2002-05-12 Tomas Kasparek another code cleanup 18 */ 19 20/* $Id: uda1341.c,v 1.1.1.1 2007/08/03 18:53:59 Exp $ */ 21 22#include <sound/driver.h> 23#include <linux/module.h> 24#include <linux/init.h> 25#include <linux/types.h> 26#include <linux/slab.h> 27#include <linux/errno.h> 28#include <linux/ioctl.h> 29 30#include <asm/uaccess.h> 31 32#include <sound/core.h> 33#include <sound/control.h> 34#include <sound/initval.h> 35#include <sound/info.h> 36 37#include <linux/l3/l3.h> 38 39#include <sound/uda1341.h> 40 41/* {{{ HW regs definition */ 42 43#define STAT0 0x00 44#define STAT1 0x80 45#define STAT_MASK 0x80 46 47#define DATA0_0 0x00 48#define DATA0_1 0x40 49#define DATA0_2 0x80 50#define DATA_MASK 0xc0 51 52#define IS_DATA0(x) ((x) >= data0_0 && (x) <= data0_2) 53#define IS_DATA1(x) ((x) == data1) 54#define IS_STATUS(x) ((x) == stat0 || (x) == stat1) 55#define IS_EXTEND(x) ((x) >= ext0 && (x) <= ext6) 56 57/* }}} */ 58 59 60static const char *peak_names[] = { 61 "before", 62 "after", 63}; 64 65static const char *filter_names[] = { 66 "flat", 67 "min", 68 "min", 69 "max", 70}; 71 72static const char *mixer_names[] = { 73 "double differential", 74 "input channel 1 (line in)", 75 "input channel 2 (microphone)", 76 "digital mixer", 77}; 78 79static const char *deemp_names[] = { 80 "none", 81 "32 kHz", 82 "44.1 kHz", 83 "48 kHz", 84}; 85 86enum uda1341_regs_names { 87 stat0, 88 stat1, 89 data0_0, 90 data0_1, 91 data0_2, 92 data1, 93 ext0, 94 ext1, 95 ext2, 96 empty, 97 ext4, 98 ext5, 99 ext6, 100 uda1341_reg_last, 101}; 102 103static const char *uda1341_reg_names[] = { 104 "stat 0 ", 105 "stat 1 ", 106 "data 00", 107 "data 01", 108 "data 02", 109 "data 1 ", 110 "ext 0", 111 "ext 1", 112 "ext 2", 113 "empty", 114 "ext 4", 115 "ext 5", 116 "ext 6", 117}; 118 119static const int uda1341_enum_items[] = { 120 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 121 2, //peak - before/after 122 4, //deemp - none/32/44.1/48 123 0, 124 4, //filter - flat/min/min/max 125 0, 0, 0, 126 4, //mixer - differ/line/mic/mixer 127 0, 0, 0, 0, 0, 128}; 129 130static const char ** uda1341_enum_names[] = { 131 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 132 peak_names, //peak - before/after 133 deemp_names, //deemp - none/32/44.1/48 134 NULL, 135 filter_names, //filter - flat/min/min/max 136 NULL, NULL, NULL, 137 mixer_names, //mixer - differ/line/mic/mixer 138 NULL, NULL, NULL, NULL, NULL, 139}; 140 141typedef int uda1341_cfg[CMD_LAST]; 142 143struct uda1341 { 144 int (*write) (struct l3_client *uda1341, unsigned short reg, unsigned short val); 145 int (*read) (struct l3_client *uda1341, unsigned short reg); 146 unsigned char regs[uda1341_reg_last]; 147 int active; 148 spinlock_t reg_lock; 149 struct snd_card *card; 150 uda1341_cfg cfg; 151#ifdef CONFIG_PM 152 unsigned char suspend_regs[uda1341_reg_last]; 153 uda1341_cfg suspend_cfg; 154#endif 155}; 156 157/* transfer 8bit integer into string with binary representation */ 158static void int2str_bin8(uint8_t val, char *buf) 159{ 160 const int size = sizeof(val) * 8; 161 int i; 162 163 for (i= 0; i < size; i++){ 164 *(buf++) = (val >> (size - 1)) ? '1' : '0'; 165 val <<= 1; 166 } 167 *buf = '\0'; //end the string with zero 168} 169 170/* {{{ HW manipulation routines */ 171 172static int snd_uda1341_codec_write(struct l3_client *clnt, unsigned short reg, unsigned short val) 173{ 174 struct uda1341 *uda = clnt->driver_data; 175 unsigned char buf[2] = { 0xc0, 0xe0 }; // for EXT addressing 176 int err = 0; 177 178 uda->regs[reg] = val; 179 180 if (uda->active) { 181 if (IS_DATA0(reg)) { 182 err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)&val, 1); 183 } else if (IS_DATA1(reg)) { 184 err = l3_write(clnt, UDA1341_DATA1, (const unsigned char *)&val, 1); 185 } else if (IS_STATUS(reg)) { 186 err = l3_write(clnt, UDA1341_STATUS, (const unsigned char *)&val, 1); 187 } else if (IS_EXTEND(reg)) { 188 buf[0] |= (reg - ext0) & 0x7; //EXT address 189 buf[1] |= val; //EXT data 190 err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)buf, 2); 191 } 192 } else 193 printk(KERN_ERR "UDA1341 codec not active!\n"); 194 return err; 195} 196 197static int snd_uda1341_codec_read(struct l3_client *clnt, unsigned short reg) 198{ 199 unsigned char val; 200 int err; 201 202 err = l3_read(clnt, reg, &val, 1); 203 if (err == 1) 204 // use just 6bits - the rest is address of the reg 205 return val & 63; 206 return err < 0 ? err : -EIO; 207} 208 209static inline int snd_uda1341_valid_reg(struct l3_client *clnt, unsigned short reg) 210{ 211 return reg < uda1341_reg_last; 212} 213 214static int snd_uda1341_update_bits(struct l3_client *clnt, unsigned short reg, 215 unsigned short mask, unsigned short shift, 216 unsigned short value, int flush) 217{ 218 int change; 219 unsigned short old, new; 220 struct uda1341 *uda = clnt->driver_data; 221 222 223 if (!snd_uda1341_valid_reg(clnt, reg)) 224 return -EINVAL; 225 spin_lock(&uda->reg_lock); 226 old = uda->regs[reg]; 227 new = (old & ~(mask << shift)) | (value << shift); 228 change = old != new; 229 if (change) { 230 if (flush) uda->write(clnt, reg, new); 231 uda->regs[reg] = new; 232 } 233 spin_unlock(&uda->reg_lock); 234 return change; 235} 236 237static int snd_uda1341_cfg_write(struct l3_client *clnt, unsigned short what, 238 unsigned short value, int flush) 239{ 240 struct uda1341 *uda = clnt->driver_data; 241 int ret = 0; 242#ifdef CONFIG_PM 243 int reg; 244#endif 245 246 247 uda->cfg[what] = value; 248 249 switch(what) { 250 case CMD_RESET: 251 ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, 1, flush); // MUTE 252 ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 1, flush); // RESET 253 ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 0, flush); // RESTORE 254 uda->cfg[CMD_RESET]=0; 255 break; 256 case CMD_FS: 257 ret = snd_uda1341_update_bits(clnt, stat0, 3, 4, value, flush); 258 break; 259 case CMD_FORMAT: 260 ret = snd_uda1341_update_bits(clnt, stat0, 7, 1, value, flush); 261 break; 262 case CMD_OGAIN: 263 ret = snd_uda1341_update_bits(clnt, stat1, 1, 6, value, flush); 264 break; 265 case CMD_IGAIN: 266 ret = snd_uda1341_update_bits(clnt, stat1, 1, 5, value, flush); 267 break; 268 case CMD_DAC: 269 ret = snd_uda1341_update_bits(clnt, stat1, 1, 0, value, flush); 270 break; 271 case CMD_ADC: 272 ret = snd_uda1341_update_bits(clnt, stat1, 1, 1, value, flush); 273 break; 274 case CMD_VOLUME: 275 ret = snd_uda1341_update_bits(clnt, data0_0, 63, 0, value, flush); 276 break; 277 case CMD_BASS: 278 ret = snd_uda1341_update_bits(clnt, data0_1, 15, 2, value, flush); 279 break; 280 case CMD_TREBBLE: 281 ret = snd_uda1341_update_bits(clnt, data0_1, 3, 0, value, flush); 282 break; 283 case CMD_PEAK: 284 ret = snd_uda1341_update_bits(clnt, data0_2, 1, 5, value, flush); 285 break; 286 case CMD_DEEMP: 287 ret = snd_uda1341_update_bits(clnt, data0_2, 3, 3, value, flush); 288 break; 289 case CMD_MUTE: 290 ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, value, flush); 291 break; 292 case CMD_FILTER: 293 ret = snd_uda1341_update_bits(clnt, data0_2, 3, 0, value, flush); 294 break; 295 case CMD_CH1: 296 ret = snd_uda1341_update_bits(clnt, ext0, 31, 0, value, flush); 297 break; 298 case CMD_CH2: 299 ret = snd_uda1341_update_bits(clnt, ext1, 31, 0, value, flush); 300 break; 301 case CMD_MIC: 302 ret = snd_uda1341_update_bits(clnt, ext2, 7, 2, value, flush); 303 break; 304 case CMD_MIXER: 305 ret = snd_uda1341_update_bits(clnt, ext2, 3, 0, value, flush); 306 break; 307 case CMD_AGC: 308 ret = snd_uda1341_update_bits(clnt, ext4, 1, 4, value, flush); 309 break; 310 case CMD_IG: 311 ret = snd_uda1341_update_bits(clnt, ext4, 3, 0, value & 0x3, flush); 312 ret = snd_uda1341_update_bits(clnt, ext5, 31, 0, value >> 2, flush); 313 break; 314 case CMD_AGC_TIME: 315 ret = snd_uda1341_update_bits(clnt, ext6, 7, 2, value, flush); 316 break; 317 case CMD_AGC_LEVEL: 318 ret = snd_uda1341_update_bits(clnt, ext6, 3, 0, value, flush); 319 break; 320#ifdef CONFIG_PM 321 case CMD_SUSPEND: 322 for (reg = stat0; reg < uda1341_reg_last; reg++) 323 uda->suspend_regs[reg] = uda->regs[reg]; 324 for (reg = 0; reg < CMD_LAST; reg++) 325 uda->suspend_cfg[reg] = uda->cfg[reg]; 326 break; 327 case CMD_RESUME: 328 for (reg = stat0; reg < uda1341_reg_last; reg++) 329 snd_uda1341_codec_write(clnt, reg, uda->suspend_regs[reg]); 330 for (reg = 0; reg < CMD_LAST; reg++) 331 uda->cfg[reg] = uda->suspend_cfg[reg]; 332 break; 333#endif 334 default: 335 ret = -EINVAL; 336 break; 337 } 338 339 if (!uda->active) 340 printk(KERN_ERR "UDA1341 codec not active!\n"); 341 return ret; 342} 343 344/* }}} */ 345 346/* {{{ Proc interface */ 347#ifdef CONFIG_PROC_FS 348 349static const char *format_names[] = { 350 "I2S-bus", 351 "LSB 16bits", 352 "LSB 18bits", 353 "LSB 20bits", 354 "MSB", 355 "in LSB 16bits/out MSB", 356 "in LSB 18bits/out MSB", 357 "in LSB 20bits/out MSB", 358}; 359 360static const char *fs_names[] = { 361 "512*fs", 362 "384*fs", 363 "256*fs", 364 "Unused - bad value!", 365}; 366 367static const char* bass_values[][16] = { 368 {"0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", 369 "0 dB", "0 dB", "0 dB", "0 dB", "undefined", }, //flat 370 {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB", 371 "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min 372 {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB", 373 "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min 374 {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "20 dB", 375 "22 dB", "24 dB", "24 dB", "24 dB", "undefined",}, // max 376}; 377 378static const char *mic_sens_value[] = { 379 "-3 dB", "0 dB", "3 dB", "9 dB", "15 dB", "21 dB", "27 dB", "not used", 380}; 381 382static const unsigned short AGC_atime[] = { 383 11, 16, 11, 16, 21, 11, 16, 21, 384}; 385 386static const unsigned short AGC_dtime[] = { 387 100, 100, 200, 200, 200, 400, 400, 400, 388}; 389 390static const char *AGC_level[] = { 391 "-9.0", "-11.5", "-15.0", "-17.5", 392}; 393 394static const char *ig_small_value[] = { 395 "-3.0", "-2.5", "-2.0", "-1.5", "-1.0", "-0.5", 396}; 397 398/* 399 * this was computed as peak_value[i] = pow((63-i)*1.42,1.013) 400 * 401 * UDA1341 datasheet on page 21: Peak value (dB) = (Peak level - 63.5)*5*log2 402 * There is an table with these values [level]=value: [3]=-90.31, [7]=-84.29 403 * [61]=-2.78, [62] = -1.48, [63] = 0.0 404 * I tried to compute it, but using but even using logarithm with base either 10 or 2 405 * i was'n able to get values in the table from the formula. So I constructed another 406 * formula (see above) to interpolate the values as good as possible. If there is some 407 * mistake, please contact me on tomas.kasparek@seznam.cz. Thanks. 408 * UDA1341TS datasheet is available at: 409 * http://www-us9.semiconductors.com/acrobat/datasheets/UDA1341TS_3.pdf 410 */ 411static const char *peak_value[] = { 412 "-INF dB", "N.A.", "N.A", "90.31 dB", "N.A.", "N.A.", "N.A.", "-84.29 dB", 413 "-82.65 dB", "-81.13 dB", "-79.61 dB", "-78.09 dB", "-76.57 dB", "-75.05 dB", "-73.53 dB", 414 "-72.01 dB", "-70.49 dB", "-68.97 dB", "-67.45 dB", "-65.93 dB", "-64.41 dB", "-62.90 dB", 415 "-61.38 dB", "-59.86 dB", "-58.35 dB", "-56.83 dB", "-55.32 dB", "-53.80 dB", "-52.29 dB", 416 "-50.78 dB", "-49.26 dB", "-47.75 dB", "-46.24 dB", "-44.73 dB", "-43.22 dB", "-41.71 dB", 417 "-40.20 dB", "-38.69 dB", "-37.19 dB", "-35.68 dB", "-34.17 dB", "-32.67 dB", "-31.17 dB", 418 "-29.66 dB", "-28.16 dB", "-26.66 dB", "-25.16 dB", "-23.66 dB", "-22.16 dB", "-20.67 dB", 419 "-19.17 dB", "-17.68 dB", "-16.19 dB", "-14.70 dB", "-13.21 dB", "-11.72 dB", "-10.24 dB", 420 "-8.76 dB", "-7.28 dB", "-5.81 dB", "-4.34 dB", "-2.88 dB", "-1.43 dB", "0.00 dB", 421}; 422 423static void snd_uda1341_proc_read(struct snd_info_entry *entry, 424 struct snd_info_buffer *buffer) 425{ 426 struct l3_client *clnt = entry->private_data; 427 struct uda1341 *uda = clnt->driver_data; 428 int peak; 429 430 peak = snd_uda1341_codec_read(clnt, UDA1341_DATA1); 431 if (peak < 0) 432 peak = 0; 433 434 snd_iprintf(buffer, "%s\n\n", uda->card->longname); 435 436 // for information about computed values see UDA1341TS datasheet pages 15 - 21 437 snd_iprintf(buffer, "DAC power : %s\n", uda->cfg[CMD_DAC] ? "on" : "off"); 438 snd_iprintf(buffer, "ADC power : %s\n", uda->cfg[CMD_ADC] ? "on" : "off"); 439 snd_iprintf(buffer, "Clock frequency : %s\n", fs_names[uda->cfg[CMD_FS]]); 440 snd_iprintf(buffer, "Data format : %s\n\n", format_names[uda->cfg[CMD_FORMAT]]); 441 442 snd_iprintf(buffer, "Filter mode : %s\n", filter_names[uda->cfg[CMD_FILTER]]); 443 snd_iprintf(buffer, "Mixer mode : %s\n", mixer_names[uda->cfg[CMD_MIXER]]); 444 snd_iprintf(buffer, "De-emphasis : %s\n", deemp_names[uda->cfg[CMD_DEEMP]]); 445 snd_iprintf(buffer, "Peak detection pos. : %s\n", uda->cfg[CMD_PEAK] ? "after" : "before"); 446 snd_iprintf(buffer, "Peak value : %s\n\n", peak_value[peak]); 447 448 snd_iprintf(buffer, "Automatic Gain Ctrl : %s\n", uda->cfg[CMD_AGC] ? "on" : "off"); 449 snd_iprintf(buffer, "AGC attack time : %d ms\n", AGC_atime[uda->cfg[CMD_AGC_TIME]]); 450 snd_iprintf(buffer, "AGC decay time : %d ms\n", AGC_dtime[uda->cfg[CMD_AGC_TIME]]); 451 snd_iprintf(buffer, "AGC output level : %s dB\n\n", AGC_level[uda->cfg[CMD_AGC_LEVEL]]); 452 453 snd_iprintf(buffer, "Mute : %s\n", uda->cfg[CMD_MUTE] ? "on" : "off"); 454 455 if (uda->cfg[CMD_VOLUME] == 0) 456 snd_iprintf(buffer, "Volume : 0 dB\n"); 457 else if (uda->cfg[CMD_VOLUME] < 62) 458 snd_iprintf(buffer, "Volume : %d dB\n", -1*uda->cfg[CMD_VOLUME] +1); 459 else 460 snd_iprintf(buffer, "Volume : -INF dB\n"); 461 snd_iprintf(buffer, "Bass : %s\n", bass_values[uda->cfg[CMD_FILTER]][uda->cfg[CMD_BASS]]); 462 snd_iprintf(buffer, "Trebble : %d dB\n", uda->cfg[CMD_FILTER] ? 2*uda->cfg[CMD_TREBBLE] : 0); 463 snd_iprintf(buffer, "Input Gain (6dB) : %s\n", uda->cfg[CMD_IGAIN] ? "on" : "off"); 464 snd_iprintf(buffer, "Output Gain (6dB) : %s\n", uda->cfg[CMD_OGAIN] ? "on" : "off"); 465 snd_iprintf(buffer, "Mic sensitivity : %s\n", mic_sens_value[uda->cfg[CMD_MIC]]); 466 467 468 if(uda->cfg[CMD_CH1] < 31) 469 snd_iprintf(buffer, "Mixer gain channel 1: -%d.%c dB\n", 470 ((uda->cfg[CMD_CH1] >> 1) * 3) + (uda->cfg[CMD_CH1] & 1), 471 uda->cfg[CMD_CH1] & 1 ? '5' : '0'); 472 else 473 snd_iprintf(buffer, "Mixer gain channel 1: -INF dB\n"); 474 if(uda->cfg[CMD_CH2] < 31) 475 snd_iprintf(buffer, "Mixer gain channel 2: -%d.%c dB\n", 476 ((uda->cfg[CMD_CH2] >> 1) * 3) + (uda->cfg[CMD_CH2] & 1), 477 uda->cfg[CMD_CH2] & 1 ? '5' : '0'); 478 else 479 snd_iprintf(buffer, "Mixer gain channel 2: -INF dB\n"); 480 481 if(uda->cfg[CMD_IG] > 5) 482 snd_iprintf(buffer, "Input Amp. Gain ch 2: %d.%c dB\n", 483 (uda->cfg[CMD_IG] >> 1) -3, uda->cfg[CMD_IG] & 1 ? '5' : '0'); 484 else 485 snd_iprintf(buffer, "Input Amp. Gain ch 2: %s dB\n", ig_small_value[uda->cfg[CMD_IG]]); 486} 487 488static void snd_uda1341_proc_regs_read(struct snd_info_entry *entry, 489 struct snd_info_buffer *buffer) 490{ 491 struct l3_client *clnt = entry->private_data; 492 struct uda1341 *uda = clnt->driver_data; 493 int reg; 494 char buf[12]; 495 496 for (reg = 0; reg < uda1341_reg_last; reg ++) { 497 if (reg == empty) 498 continue; 499 int2str_bin8(uda->regs[reg], buf); 500 snd_iprintf(buffer, "%s = %s\n", uda1341_reg_names[reg], buf); 501 } 502 503 int2str_bin8(snd_uda1341_codec_read(clnt, UDA1341_DATA1), buf); 504 snd_iprintf(buffer, "DATA1 = %s\n", buf); 505} 506#endif /* CONFIG_PROC_FS */ 507 508static void __devinit snd_uda1341_proc_init(struct snd_card *card, struct l3_client *clnt) 509{ 510 struct snd_info_entry *entry; 511 512 if (! snd_card_proc_new(card, "uda1341", &entry)) 513 snd_info_set_text_ops(entry, clnt, snd_uda1341_proc_read); 514 if (! snd_card_proc_new(card, "uda1341-regs", &entry)) 515 snd_info_set_text_ops(entry, clnt, snd_uda1341_proc_regs_read); 516} 517 518/* }}} */ 519 520/* {{{ Mixer controls setting */ 521 522/* {{{ UDA1341 single functions */ 523 524#define UDA1341_SINGLE(xname, where, reg, shift, mask, invert) \ 525{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_single, \ 526 .get = snd_uda1341_get_single, .put = snd_uda1341_put_single, \ 527 .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \ 528} 529 530static int snd_uda1341_info_single(struct snd_kcontrol *kcontrol, 531 struct snd_ctl_elem_info *uinfo) 532{ 533 int mask = (kcontrol->private_value >> 12) & 63; 534 535 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 536 uinfo->count = 1; 537 uinfo->value.integer.min = 0; 538 uinfo->value.integer.max = mask; 539 return 0; 540} 541 542static int snd_uda1341_get_single(struct snd_kcontrol *kcontrol, 543 struct snd_ctl_elem_value *ucontrol) 544{ 545 struct l3_client *clnt = snd_kcontrol_chip(kcontrol); 546 struct uda1341 *uda = clnt->driver_data; 547 int where = kcontrol->private_value & 31; 548 int mask = (kcontrol->private_value >> 12) & 63; 549 int invert = (kcontrol->private_value >> 18) & 1; 550 551 ucontrol->value.integer.value[0] = uda->cfg[where]; 552 if (invert) 553 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 554 555 return 0; 556} 557 558static int snd_uda1341_put_single(struct snd_kcontrol *kcontrol, 559 struct snd_ctl_elem_value *ucontrol) 560{ 561 struct l3_client *clnt = snd_kcontrol_chip(kcontrol); 562 struct uda1341 *uda = clnt->driver_data; 563 int where = kcontrol->private_value & 31; 564 int reg = (kcontrol->private_value >> 5) & 15; 565 int shift = (kcontrol->private_value >> 9) & 7; 566 int mask = (kcontrol->private_value >> 12) & 63; 567 int invert = (kcontrol->private_value >> 18) & 1; 568 unsigned short val; 569 570 val = (ucontrol->value.integer.value[0] & mask); 571 if (invert) 572 val = mask - val; 573 574 uda->cfg[where] = val; 575 return snd_uda1341_update_bits(clnt, reg, mask, shift, val, FLUSH); 576} 577 578/* }}} */ 579 580/* {{{ UDA1341 enum functions */ 581 582#define UDA1341_ENUM(xname, where, reg, shift, mask, invert) \ 583{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_enum, \ 584 .get = snd_uda1341_get_enum, .put = snd_uda1341_put_enum, \ 585 .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \ 586} 587 588static int snd_uda1341_info_enum(struct snd_kcontrol *kcontrol, 589 struct snd_ctl_elem_info *uinfo) 590{ 591 int where = kcontrol->private_value & 31; 592 const char **texts; 593 594 // this register we don't handle this way 595 if (!uda1341_enum_items[where]) 596 return -EINVAL; 597 598 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 599 uinfo->count = 1; 600 uinfo->value.enumerated.items = uda1341_enum_items[where]; 601 602 if (uinfo->value.enumerated.item >= uda1341_enum_items[where]) 603 uinfo->value.enumerated.item = uda1341_enum_items[where] - 1; 604 605 texts = uda1341_enum_names[where]; 606 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 607 return 0; 608} 609 610static int snd_uda1341_get_enum(struct snd_kcontrol *kcontrol, 611 struct snd_ctl_elem_value *ucontrol) 612{ 613 struct l3_client *clnt = snd_kcontrol_chip(kcontrol); 614 struct uda1341 *uda = clnt->driver_data; 615 int where = kcontrol->private_value & 31; 616 617 ucontrol->value.enumerated.item[0] = uda->cfg[where]; 618 return 0; 619} 620 621static int snd_uda1341_put_enum(struct snd_kcontrol *kcontrol, 622 struct snd_ctl_elem_value *ucontrol) 623{ 624 struct l3_client *clnt = snd_kcontrol_chip(kcontrol); 625 struct uda1341 *uda = clnt->driver_data; 626 int where = kcontrol->private_value & 31; 627 int reg = (kcontrol->private_value >> 5) & 15; 628 int shift = (kcontrol->private_value >> 9) & 7; 629 int mask = (kcontrol->private_value >> 12) & 63; 630 631 uda->cfg[where] = (ucontrol->value.enumerated.item[0] & mask); 632 633 return snd_uda1341_update_bits(clnt, reg, mask, shift, uda->cfg[where], FLUSH); 634} 635 636/* }}} */ 637 638/* {{{ UDA1341 2regs functions */ 639 640#define UDA1341_2REGS(xname, where, reg_1, reg_2, shift_1, shift_2, mask_1, mask_2, invert) \ 641{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .info = snd_uda1341_info_2regs, \ 642 .get = snd_uda1341_get_2regs, .put = snd_uda1341_put_2regs, \ 643 .private_value = where | (reg_1 << 5) | (reg_2 << 9) | (shift_1 << 13) | (shift_2 << 16) | \ 644 (mask_1 << 19) | (mask_2 << 25) | (invert << 31) \ 645} 646 647 648static int snd_uda1341_info_2regs(struct snd_kcontrol *kcontrol, 649 struct snd_ctl_elem_info *uinfo) 650{ 651 int mask_1 = (kcontrol->private_value >> 19) & 63; 652 int mask_2 = (kcontrol->private_value >> 25) & 63; 653 int mask; 654 655 mask = (mask_2 + 1) * (mask_1 + 1) - 1; 656 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 657 uinfo->count = 1; 658 uinfo->value.integer.min = 0; 659 uinfo->value.integer.max = mask; 660 return 0; 661} 662 663static int snd_uda1341_get_2regs(struct snd_kcontrol *kcontrol, 664 struct snd_ctl_elem_value *ucontrol) 665{ 666 struct l3_client *clnt = snd_kcontrol_chip(kcontrol); 667 struct uda1341 *uda = clnt->driver_data; 668 int where = kcontrol->private_value & 31; 669 int mask_1 = (kcontrol->private_value >> 19) & 63; 670 int mask_2 = (kcontrol->private_value >> 25) & 63; 671 int invert = (kcontrol->private_value >> 31) & 1; 672 int mask; 673 674 mask = (mask_2 + 1) * (mask_1 + 1) - 1; 675 676 ucontrol->value.integer.value[0] = uda->cfg[where]; 677 if (invert) 678 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 679 return 0; 680} 681 682static int snd_uda1341_put_2regs(struct snd_kcontrol *kcontrol, 683 struct snd_ctl_elem_value *ucontrol) 684{ 685 struct l3_client *clnt = snd_kcontrol_chip(kcontrol); 686 struct uda1341 *uda = clnt->driver_data; 687 int where = kcontrol->private_value & 31; 688 int reg_1 = (kcontrol->private_value >> 5) & 15; 689 int reg_2 = (kcontrol->private_value >> 9) & 15; 690 int shift_1 = (kcontrol->private_value >> 13) & 7; 691 int shift_2 = (kcontrol->private_value >> 16) & 7; 692 int mask_1 = (kcontrol->private_value >> 19) & 63; 693 int mask_2 = (kcontrol->private_value >> 25) & 63; 694 int invert = (kcontrol->private_value >> 31) & 1; 695 int mask; 696 unsigned short val1, val2, val; 697 698 val = ucontrol->value.integer.value[0]; 699 700 mask = (mask_2 + 1) * (mask_1 + 1) - 1; 701 702 val1 = val & mask_1; 703 val2 = (val / (mask_1 + 1)) & mask_2; 704 705 if (invert) { 706 val1 = mask_1 - val1; 707 val2 = mask_2 - val2; 708 } 709 710 uda->cfg[where] = invert ? mask - val : val; 711 712 snd_uda1341_update_bits(clnt, reg_1, mask_1, shift_1, val1, FLUSH); 713 return snd_uda1341_update_bits(clnt, reg_2, mask_2, shift_2, val2, FLUSH); 714} 715 716/* }}} */ 717 718static struct snd_kcontrol_new snd_uda1341_controls[] = { 719 UDA1341_SINGLE("Master Playback Switch", CMD_MUTE, data0_2, 2, 1, 1), 720 UDA1341_SINGLE("Master Playback Volume", CMD_VOLUME, data0_0, 0, 63, 1), 721 722 UDA1341_SINGLE("Bass Playback Volume", CMD_BASS, data0_1, 2, 15, 0), 723 UDA1341_SINGLE("Treble Playback Volume", CMD_TREBBLE, data0_1, 0, 3, 0), 724 725 UDA1341_SINGLE("Input Gain Switch", CMD_IGAIN, stat1, 5, 1, 0), 726 UDA1341_SINGLE("Output Gain Switch", CMD_OGAIN, stat1, 6, 1, 0), 727 728 UDA1341_SINGLE("Mixer Gain Channel 1 Volume", CMD_CH1, ext0, 0, 31, 1), 729 UDA1341_SINGLE("Mixer Gain Channel 2 Volume", CMD_CH2, ext1, 0, 31, 1), 730 731 UDA1341_SINGLE("Mic Sensitivity Volume", CMD_MIC, ext2, 2, 7, 0), 732 733 UDA1341_SINGLE("AGC Output Level", CMD_AGC_LEVEL, ext6, 0, 3, 0), 734 UDA1341_SINGLE("AGC Time Constant", CMD_AGC_TIME, ext6, 2, 7, 0), 735 UDA1341_SINGLE("AGC Time Constant Switch", CMD_AGC, ext4, 4, 1, 0), 736 737 UDA1341_SINGLE("DAC Power", CMD_DAC, stat1, 0, 1, 0), 738 UDA1341_SINGLE("ADC Power", CMD_ADC, stat1, 1, 1, 0), 739 740 UDA1341_ENUM("Peak detection", CMD_PEAK, data0_2, 5, 1, 0), 741 UDA1341_ENUM("De-emphasis", CMD_DEEMP, data0_2, 3, 3, 0), 742 UDA1341_ENUM("Mixer mode", CMD_MIXER, ext2, 0, 3, 0), 743 UDA1341_ENUM("Filter mode", CMD_FILTER, data0_2, 0, 3, 0), 744 745 UDA1341_2REGS("Gain Input Amplifier Gain (channel 2)", CMD_IG, ext4, ext5, 0, 0, 3, 31, 0), 746}; 747 748static void uda1341_free(struct l3_client *clnt) 749{ 750 l3_detach_client(clnt); // calls kfree for driver_data (struct uda1341) 751 kfree(clnt); 752} 753 754static int uda1341_dev_free(struct snd_device *device) 755{ 756 struct l3_client *clnt = device->device_data; 757 uda1341_free(clnt); 758 return 0; 759} 760 761int __init snd_chip_uda1341_mixer_new(struct snd_card *card, struct l3_client **clntp) 762{ 763 static struct snd_device_ops ops = { 764 .dev_free = uda1341_dev_free, 765 }; 766 struct l3_client *clnt; 767 int idx, err; 768 769 snd_assert(card != NULL, return -EINVAL); 770 771 clnt = kzalloc(sizeof(*clnt), GFP_KERNEL); 772 if (clnt == NULL) 773 return -ENOMEM; 774 775 if ((err = l3_attach_client(clnt, "l3-bit-sa1100-gpio", UDA1341_ALSA_NAME))) { 776 kfree(clnt); 777 return err; 778 } 779 780 for (idx = 0; idx < ARRAY_SIZE(snd_uda1341_controls); idx++) { 781 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_uda1341_controls[idx], clnt))) < 0) { 782 uda1341_free(clnt); 783 return err; 784 } 785 } 786 787 if ((err = snd_device_new(card, SNDRV_DEV_CODEC, clnt, &ops)) < 0) { 788 uda1341_free(clnt); 789 return err; 790 } 791 792 *clntp = clnt; 793 strcpy(card->mixername, "UDA1341TS Mixer"); 794 ((struct uda1341 *)clnt->driver_data)->card = card; 795 796 snd_uda1341_proc_init(card, clnt); 797 798 return 0; 799} 800 801/* }}} */ 802 803/* {{{ L3 operations */ 804 805static int uda1341_attach(struct l3_client *clnt) 806{ 807 struct uda1341 *uda; 808 809 uda = kzalloc(sizeof(*uda), 0, GFP_KERNEL); 810 if (!uda) 811 return -ENOMEM; 812 813 /* init fixed parts of my copy of registers */ 814 uda->regs[stat0] = STAT0; 815 uda->regs[stat1] = STAT1; 816 817 uda->regs[data0_0] = DATA0_0; 818 uda->regs[data0_1] = DATA0_1; 819 uda->regs[data0_2] = DATA0_2; 820 821 uda->write = snd_uda1341_codec_write; 822 uda->read = snd_uda1341_codec_read; 823 824 spin_lock_init(&uda->reg_lock); 825 826 clnt->driver_data = uda; 827 return 0; 828} 829 830static void uda1341_detach(struct l3_client *clnt) 831{ 832 kfree(clnt->driver_data); 833} 834 835static int 836uda1341_command(struct l3_client *clnt, int cmd, void *arg) 837{ 838 if (cmd != CMD_READ_REG) 839 return snd_uda1341_cfg_write(clnt, cmd, (int) arg, FLUSH); 840 841 return snd_uda1341_codec_read(clnt, (int) arg); 842} 843 844static int uda1341_open(struct l3_client *clnt) 845{ 846 struct uda1341 *uda = clnt->driver_data; 847 848 uda->active = 1; 849 850 /* init default configuration */ 851 snd_uda1341_cfg_write(clnt, CMD_RESET, 0, REGS_ONLY); 852 snd_uda1341_cfg_write(clnt, CMD_FS, F256, FLUSH); // unknown state after reset 853 snd_uda1341_cfg_write(clnt, CMD_FORMAT, LSB16, FLUSH); // unknown state after reset 854 snd_uda1341_cfg_write(clnt, CMD_OGAIN, ON, FLUSH); // default off after reset 855 snd_uda1341_cfg_write(clnt, CMD_IGAIN, ON, FLUSH); // default off after reset 856 snd_uda1341_cfg_write(clnt, CMD_DAC, ON, FLUSH); // ??? default value after reset 857 snd_uda1341_cfg_write(clnt, CMD_ADC, ON, FLUSH); // ??? default value after reset 858 snd_uda1341_cfg_write(clnt, CMD_VOLUME, 20, FLUSH); // default 0dB after reset 859 snd_uda1341_cfg_write(clnt, CMD_BASS, 0, REGS_ONLY); // default value after reset 860 snd_uda1341_cfg_write(clnt, CMD_TREBBLE, 0, REGS_ONLY); // default value after reset 861 snd_uda1341_cfg_write(clnt, CMD_PEAK, AFTER, REGS_ONLY);// default value after reset 862 snd_uda1341_cfg_write(clnt, CMD_DEEMP, NONE, REGS_ONLY);// default value after reset 863 //at this moment should be QMUTED by h3600_audio_init 864 snd_uda1341_cfg_write(clnt, CMD_MUTE, OFF, REGS_ONLY); // default value after reset 865 snd_uda1341_cfg_write(clnt, CMD_FILTER, MAX, FLUSH); // defaul flat after reset 866 snd_uda1341_cfg_write(clnt, CMD_CH1, 31, FLUSH); // default value after reset 867 snd_uda1341_cfg_write(clnt, CMD_CH2, 4, FLUSH); // default value after reset 868 snd_uda1341_cfg_write(clnt, CMD_MIC, 4, FLUSH); // default 0dB after reset 869 snd_uda1341_cfg_write(clnt, CMD_MIXER, MIXER, FLUSH); // default doub.dif.mode 870 snd_uda1341_cfg_write(clnt, CMD_AGC, OFF, FLUSH); // default value after reset 871 snd_uda1341_cfg_write(clnt, CMD_IG, 0, FLUSH); // unknown state after reset 872 snd_uda1341_cfg_write(clnt, CMD_AGC_TIME, 0, FLUSH); // default value after reset 873 snd_uda1341_cfg_write(clnt, CMD_AGC_LEVEL, 0, FLUSH); // default value after reset 874 875 return 0; 876} 877 878static void uda1341_close(struct l3_client *clnt) 879{ 880 struct uda1341 *uda = clnt->driver_data; 881 882 uda->active = 0; 883} 884 885/* }}} */ 886 887/* {{{ Module and L3 initialization */ 888 889static struct l3_ops uda1341_ops = { 890 .open = uda1341_open, 891 .command = uda1341_command, 892 .close = uda1341_close, 893}; 894 895static struct l3_driver uda1341_driver = { 896 .name = UDA1341_ALSA_NAME, 897 .attach_client = uda1341_attach, 898 .detach_client = uda1341_detach, 899 .ops = &uda1341_ops, 900 .owner = THIS_MODULE, 901}; 902 903static int __init uda1341_init(void) 904{ 905 return l3_add_driver(&uda1341_driver); 906} 907 908static void __exit uda1341_exit(void) 909{ 910 l3_del_driver(&uda1341_driver); 911} 912 913module_init(uda1341_init); 914module_exit(uda1341_exit); 915 916MODULE_AUTHOR("Tomas Kasparek <tomas.kasparek@seznam.cz>"); 917MODULE_LICENSE("GPL"); 918MODULE_DESCRIPTION("Philips UDA1341 CODEC driver for ALSA"); 919MODULE_SUPPORTED_DEVICE("{{UDA1341,UDA1341TS}}"); 920 921EXPORT_SYMBOL(snd_chip_uda1341_mixer_new); 922 923/* }}} */ 924 925/* 926 * Local variables: 927 * indent-tabs-mode: t 928 * End: 929 */ 930