1/*  *********************************************************************
2    *  SB1250 Board Support Package
3    *
4    *  LDT constants				File: sb1250_ldt.h
5    *
6    *  This module contains constants and macros to describe
7    *  the LDT interface on the SB1250.
8    *
9    *  SB1250 specification level:  User's manual 1/02/02
10    *
11    *********************************************************************
12    *
13    *  Copyright 2000,2001,2002,2003
14    *  Broadcom Corporation. All rights reserved.
15    *
16    *  This program is free software; you can redistribute it and/or
17    *  modify it under the terms of the GNU General Public License as
18    *  published by the Free Software Foundation; either version 2 of
19    *  the License, or (at your option) any later version.
20    *
21    *  This program is distributed in the hope that it will be useful,
22    *  but WITHOUT ANY WARRANTY; without even the implied warranty of
23    *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
24    *  GNU General Public License for more details.
25    *
26    *  You should have received a copy of the GNU General Public License
27    *  along with this program; if not, write to the Free Software
28    *  Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29    *  MA 02111-1307 USA
30    ********************************************************************* */
31
32
33#ifndef _SB1250_LDT_H
34#define _SB1250_LDT_H
35
36#include "sb1250_defs.h"
37
38#define K_LDT_VENDOR_SIBYTE	0x166D
39#define K_LDT_DEVICE_SB1250	0x0002
40
41/*
42 * LDT Interface Type 1 (bridge) configuration header
43 */
44
45#define R_LDT_TYPE1_DEVICEID	0x0000
46#define R_LDT_TYPE1_CMDSTATUS	0x0004
47#define R_LDT_TYPE1_CLASSREV	0x0008
48#define R_LDT_TYPE1_DEVHDR	0x000C
49#define R_LDT_TYPE1_BAR0	0x0010	/* not used */
50#define R_LDT_TYPE1_BAR1	0x0014	/* not used */
51
52#define R_LDT_TYPE1_BUSID	0x0018	/* bus ID register */
53#define R_LDT_TYPE1_SECSTATUS	0x001C	/* secondary status / I/O base/limit */
54#define R_LDT_TYPE1_MEMLIMIT	0x0020
55#define R_LDT_TYPE1_PREFETCH	0x0024
56#define R_LDT_TYPE1_PREF_BASE	0x0028
57#define R_LDT_TYPE1_PREF_LIMIT	0x002C
58#define R_LDT_TYPE1_IOLIMIT	0x0030
59#define R_LDT_TYPE1_CAPPTR	0x0034
60#define R_LDT_TYPE1_ROMADDR	0x0038
61#define R_LDT_TYPE1_BRCTL	0x003C
62#define R_LDT_TYPE1_CMD		0x0040
63#define R_LDT_TYPE1_LINKCTRL	0x0044
64#define R_LDT_TYPE1_LINKFREQ	0x0048
65#define R_LDT_TYPE1_RESERVED1	0x004C
66#define R_LDT_TYPE1_SRICMD	0x0050
67#define R_LDT_TYPE1_SRITXNUM	0x0054
68#define R_LDT_TYPE1_SRIRXNUM	0x0058
69#define R_LDT_TYPE1_ERRSTATUS   0x0068
70#define R_LDT_TYPE1_SRICTRL	0x006C
71#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
72#define R_LDT_TYPE1_ADDSTATUS	0x0070
73#endif /* 1250 PASS2 || 112x PASS1 */
74#define R_LDT_TYPE1_TXBUFCNT	0x00C8
75#define R_LDT_TYPE1_EXPCRC	0x00DC
76#define R_LDT_TYPE1_RXCRC	0x00F0
77
78
79/*
80 * LDT Device ID register
81 */
82
83#define S_LDT_DEVICEID_VENDOR		0
84#define M_LDT_DEVICEID_VENDOR		_SB_MAKEMASK_32(16,S_LDT_DEVICEID_VENDOR)
85#define V_LDT_DEVICEID_VENDOR(x)	_SB_MAKEVALUE_32(x,S_LDT_DEVICEID_VENDOR)
86#define G_LDT_DEVICEID_VENDOR(x)	_SB_GETVALUE_32(x,S_LDT_DEVICEID_VENDOR,M_LDT_DEVICEID_VENDOR)
87
88#define S_LDT_DEVICEID_DEVICEID		16
89#define M_LDT_DEVICEID_DEVICEID		_SB_MAKEMASK_32(16,S_LDT_DEVICEID_DEVICEID)
90#define V_LDT_DEVICEID_DEVICEID(x)	_SB_MAKEVALUE_32(x,S_LDT_DEVICEID_DEVICEID)
91#define G_LDT_DEVICEID_DEVICEID(x)	_SB_GETVALUE_32(x,S_LDT_DEVICEID_DEVICEID,M_LDT_DEVICEID_DEVICEID)
92
93
94/*
95 * LDT Command Register (Table 8-13)
96 */
97
98#define M_LDT_CMD_IOSPACE_EN		_SB_MAKEMASK1_32(0)
99#define M_LDT_CMD_MEMSPACE_EN		_SB_MAKEMASK1_32(1)
100#define M_LDT_CMD_MASTER_EN		_SB_MAKEMASK1_32(2)
101#define M_LDT_CMD_SPECCYC_EN		_SB_MAKEMASK1_32(3)
102#define M_LDT_CMD_MEMWRINV_EN		_SB_MAKEMASK1_32(4)
103#define M_LDT_CMD_VGAPALSNP_EN		_SB_MAKEMASK1_32(5)
104#define M_LDT_CMD_PARERRRESP		_SB_MAKEMASK1_32(6)
105#define M_LDT_CMD_WAITCYCCTRL		_SB_MAKEMASK1_32(7)
106#define M_LDT_CMD_SERR_EN		_SB_MAKEMASK1_32(8)
107#define M_LDT_CMD_FASTB2B_EN		_SB_MAKEMASK1_32(9)
108
109/*
110 * LDT class and revision registers
111 */
112
113#define S_LDT_CLASSREV_REV		0
114#define M_LDT_CLASSREV_REV		_SB_MAKEMASK_32(8,S_LDT_CLASSREV_REV)
115#define V_LDT_CLASSREV_REV(x)		_SB_MAKEVALUE_32(x,S_LDT_CLASSREV_REV)
116#define G_LDT_CLASSREV_REV(x)		_SB_GETVALUE_32(x,S_LDT_CLASSREV_REV,M_LDT_CLASSREV_REV)
117
118#define S_LDT_CLASSREV_CLASS		8
119#define M_LDT_CLASSREV_CLASS		_SB_MAKEMASK_32(24,S_LDT_CLASSREV_CLASS)
120#define V_LDT_CLASSREV_CLASS(x)		_SB_MAKEVALUE_32(x,S_LDT_CLASSREV_CLASS)
121#define G_LDT_CLASSREV_CLASS(x)		_SB_GETVALUE_32(x,S_LDT_CLASSREV_CLASS,M_LDT_CLASSREV_CLASS)
122
123#define K_LDT_REV			0x01
124#define K_LDT_CLASS			0x060000
125
126/*
127 * Device Header (offset 0x0C)
128 */
129
130#define S_LDT_DEVHDR_CLINESZ		0
131#define M_LDT_DEVHDR_CLINESZ		_SB_MAKEMASK_32(8,S_LDT_DEVHDR_CLINESZ)
132#define V_LDT_DEVHDR_CLINESZ(x)		_SB_MAKEVALUE_32(x,S_LDT_DEVHDR_CLINESZ)
133#define G_LDT_DEVHDR_CLINESZ(x)		_SB_GETVALUE_32(x,S_LDT_DEVHDR_CLINESZ,M_LDT_DEVHDR_CLINESZ)
134
135#define S_LDT_DEVHDR_LATTMR		8
136#define M_LDT_DEVHDR_LATTMR		_SB_MAKEMASK_32(8,S_LDT_DEVHDR_LATTMR)
137#define V_LDT_DEVHDR_LATTMR(x)		_SB_MAKEVALUE_32(x,S_LDT_DEVHDR_LATTMR)
138#define G_LDT_DEVHDR_LATTMR(x)		_SB_GETVALUE_32(x,S_LDT_DEVHDR_LATTMR,M_LDT_DEVHDR_LATTMR)
139
140#define S_LDT_DEVHDR_HDRTYPE		16
141#define M_LDT_DEVHDR_HDRTYPE		_SB_MAKEMASK_32(8,S_LDT_DEVHDR_HDRTYPE)
142#define V_LDT_DEVHDR_HDRTYPE(x)		_SB_MAKEVALUE_32(x,S_LDT_DEVHDR_HDRTYPE)
143#define G_LDT_DEVHDR_HDRTYPE(x)		_SB_GETVALUE_32(x,S_LDT_DEVHDR_HDRTYPE,M_LDT_DEVHDR_HDRTYPE)
144
145#define K_LDT_DEVHDR_HDRTYPE_TYPE1	1
146
147#define S_LDT_DEVHDR_BIST		24
148#define M_LDT_DEVHDR_BIST		_SB_MAKEMASK_32(8,S_LDT_DEVHDR_BIST)
149#define V_LDT_DEVHDR_BIST(x)		_SB_MAKEVALUE_32(x,S_LDT_DEVHDR_BIST)
150#define G_LDT_DEVHDR_BIST(x)		_SB_GETVALUE_32(x,S_LDT_DEVHDR_BIST,M_LDT_DEVHDR_BIST)
151
152
153
154/*
155 * LDT Status Register (Table 8-14).  Note that these constants
156 * assume you've read the command and status register
157 * together (32-bit read at offset 0x04)
158 *
159 * These bits also apply to the secondary status
160 * register (Table 8-15), offset 0x1C
161 */
162
163#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
164#define M_LDT_STATUS_VGAEN		_SB_MAKEMASK1_32(3)
165#endif /* 1250 PASS2 || 112x PASS1 */
166#define M_LDT_STATUS_CAPLIST		_SB_MAKEMASK1_32(20)
167#define M_LDT_STATUS_66MHZCAP		_SB_MAKEMASK1_32(21)
168#define M_LDT_STATUS_RESERVED2		_SB_MAKEMASK1_32(22)
169#define M_LDT_STATUS_FASTB2BCAP		_SB_MAKEMASK1_32(23)
170#define M_LDT_STATUS_MSTRDPARERR	_SB_MAKEMASK1_32(24)
171
172#define S_LDT_STATUS_DEVSELTIMING	25
173#define M_LDT_STATUS_DEVSELTIMING	_SB_MAKEMASK_32(2,S_LDT_STATUS_DEVSELTIMING)
174#define V_LDT_STATUS_DEVSELTIMING(x)	_SB_MAKEVALUE_32(x,S_LDT_STATUS_DEVSELTIMING)
175#define G_LDT_STATUS_DEVSELTIMING(x)	_SB_GETVALUE_32(x,S_LDT_STATUS_DEVSELTIMING,M_LDT_STATUS_DEVSELTIMING)
176
177#define M_LDT_STATUS_SIGDTGTABORT	_SB_MAKEMASK1_32(27)
178#define M_LDT_STATUS_RCVDTGTABORT	_SB_MAKEMASK1_32(28)
179#define M_LDT_STATUS_RCVDMSTRABORT	_SB_MAKEMASK1_32(29)
180#define M_LDT_STATUS_SIGDSERR		_SB_MAKEMASK1_32(30)
181#define M_LDT_STATUS_DETPARERR		_SB_MAKEMASK1_32(31)
182
183/*
184 * Bridge Control Register (Table 8-16).  Note that these
185 * constants assume you've read the register as a 32-bit
186 * read (offset 0x3C)
187 */
188
189#define M_LDT_BRCTL_PARERRRESP_EN	_SB_MAKEMASK1_32(16)
190#define M_LDT_BRCTL_SERR_EN		_SB_MAKEMASK1_32(17)
191#define M_LDT_BRCTL_ISA_EN		_SB_MAKEMASK1_32(18)
192#define M_LDT_BRCTL_VGA_EN		_SB_MAKEMASK1_32(19)
193#define M_LDT_BRCTL_MSTRABORTMODE	_SB_MAKEMASK1_32(21)
194#define M_LDT_BRCTL_SECBUSRESET		_SB_MAKEMASK1_32(22)
195#define M_LDT_BRCTL_FASTB2B_EN		_SB_MAKEMASK1_32(23)
196#define M_LDT_BRCTL_PRIDISCARD		_SB_MAKEMASK1_32(24)
197#define M_LDT_BRCTL_SECDISCARD		_SB_MAKEMASK1_32(25)
198#define M_LDT_BRCTL_DISCARDSTAT		_SB_MAKEMASK1_32(26)
199#define M_LDT_BRCTL_DISCARDSERR_EN	_SB_MAKEMASK1_32(27)
200
201/*
202 * LDT Command Register (Table 8-17).  Note that these constants
203 * assume you've read the command and status register together
204 * 32-bit read at offset 0x40
205 */
206
207#define M_LDT_CMD_WARMRESET		_SB_MAKEMASK1_32(16)
208#define M_LDT_CMD_DOUBLEENDED		_SB_MAKEMASK1_32(17)
209
210#define S_LDT_CMD_CAPTYPE		29
211#define M_LDT_CMD_CAPTYPE		_SB_MAKEMASK_32(3,S_LDT_CMD_CAPTYPE)
212#define V_LDT_CMD_CAPTYPE(x)		_SB_MAKEVALUE_32(x,S_LDT_CMD_CAPTYPE)
213#define G_LDT_CMD_CAPTYPE(x)		_SB_GETVALUE_32(x,S_LDT_CMD_CAPTYPE,M_LDT_CMD_CAPTYPE)
214
215/*
216 * LDT link control register (Table 8-18), and (Table 8-19)
217 */
218
219#define M_LDT_LINKCTRL_CAPSYNCFLOOD_EN	_SB_MAKEMASK1_32(1)
220#define M_LDT_LINKCTRL_CRCSTARTTEST	_SB_MAKEMASK1_32(2)
221#define M_LDT_LINKCTRL_CRCFORCEERR	_SB_MAKEMASK1_32(3)
222#define M_LDT_LINKCTRL_LINKFAIL		_SB_MAKEMASK1_32(4)
223#define M_LDT_LINKCTRL_INITDONE		_SB_MAKEMASK1_32(5)
224#define M_LDT_LINKCTRL_EOC		_SB_MAKEMASK1_32(6)
225#define M_LDT_LINKCTRL_XMITOFF		_SB_MAKEMASK1_32(7)
226
227#define S_LDT_LINKCTRL_CRCERR		8
228#define M_LDT_LINKCTRL_CRCERR		_SB_MAKEMASK_32(4,S_LDT_LINKCTRL_CRCERR)
229#define V_LDT_LINKCTRL_CRCERR(x)	_SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_CRCERR)
230#define G_LDT_LINKCTRL_CRCERR(x)	_SB_GETVALUE_32(x,S_LDT_LINKCTRL_CRCERR,M_LDT_LINKCTRL_CRCERR)
231
232#define S_LDT_LINKCTRL_MAXIN		16
233#define M_LDT_LINKCTRL_MAXIN		_SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXIN)
234#define V_LDT_LINKCTRL_MAXIN(x)		_SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXIN)
235#define G_LDT_LINKCTRL_MAXIN(x)		_SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXIN,M_LDT_LINKCTRL_MAXIN)
236
237#define M_LDT_LINKCTRL_DWFCLN		_SB_MAKEMASK1_32(19)
238
239#define S_LDT_LINKCTRL_MAXOUT		20
240#define M_LDT_LINKCTRL_MAXOUT		_SB_MAKEMASK_32(3,S_LDT_LINKCTRL_MAXOUT)
241#define V_LDT_LINKCTRL_MAXOUT(x)	_SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_MAXOUT)
242#define G_LDT_LINKCTRL_MAXOUT(x)	_SB_GETVALUE_32(x,S_LDT_LINKCTRL_MAXOUT,M_LDT_LINKCTRL_MAXOUT)
243
244#define M_LDT_LINKCTRL_DWFCOUT		_SB_MAKEMASK1_32(23)
245
246#define S_LDT_LINKCTRL_WIDTHIN		24
247#define M_LDT_LINKCTRL_WIDTHIN		_SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHIN)
248#define V_LDT_LINKCTRL_WIDTHIN(x)	_SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN)
249#define G_LDT_LINKCTRL_WIDTHIN(x)	_SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHIN,M_LDT_LINKCTRL_WIDTHIN)
250
251#define M_LDT_LINKCTRL_DWFCLIN_EN	_SB_MAKEMASK1_32(27)
252
253#define S_LDT_LINKCTRL_WIDTHOUT		28
254#define M_LDT_LINKCTRL_WIDTHOUT		_SB_MAKEMASK_32(3,S_LDT_LINKCTRL_WIDTHOUT)
255#define V_LDT_LINKCTRL_WIDTHOUT(x)	_SB_MAKEVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT)
256#define G_LDT_LINKCTRL_WIDTHOUT(x)	_SB_GETVALUE_32(x,S_LDT_LINKCTRL_WIDTHOUT,M_LDT_LINKCTRL_WIDTHOUT)
257
258#define M_LDT_LINKCTRL_DWFCOUT_EN	_SB_MAKEMASK1_32(31)
259
260/*
261 * LDT Link frequency register  (Table 8-20) offset 0x48
262 */
263
264#define S_LDT_LINKFREQ_FREQ		8
265#define M_LDT_LINKFREQ_FREQ		_SB_MAKEMASK_32(4,S_LDT_LINKFREQ_FREQ)
266#define V_LDT_LINKFREQ_FREQ(x)		_SB_MAKEVALUE_32(x,S_LDT_LINKFREQ_FREQ)
267#define G_LDT_LINKFREQ_FREQ(x)		_SB_GETVALUE_32(x,S_LDT_LINKFREQ_FREQ,M_LDT_LINKFREQ_FREQ)
268
269#define K_LDT_LINKFREQ_200MHZ		0
270#define K_LDT_LINKFREQ_300MHZ		1
271#define K_LDT_LINKFREQ_400MHZ		2
272#define K_LDT_LINKFREQ_500MHZ		3
273#define K_LDT_LINKFREQ_600MHZ		4
274#define K_LDT_LINKFREQ_800MHZ		5
275#define K_LDT_LINKFREQ_1000MHZ		6
276
277/*
278 * LDT SRI Command Register (Table 8-21).  Note that these constants
279 * assume you've read the command and status register together
280 * 32-bit read at offset 0x50
281 */
282
283#define M_LDT_SRICMD_SIPREADY		_SB_MAKEMASK1_32(16)
284#define M_LDT_SRICMD_SYNCPTRCTL		_SB_MAKEMASK1_32(17)
285#define M_LDT_SRICMD_REDUCESYNCZERO	_SB_MAKEMASK1_32(18)
286#if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
287#define M_LDT_SRICMD_DISSTARVATIONCNT	_SB_MAKEMASK1_32(19)	/* PASS1 */
288#endif /* up to 1250 PASS1 */
289#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
290#define M_LDT_SRICMD_DISMULTTXVLD	_SB_MAKEMASK1_32(19)
291#define M_LDT_SRICMD_EXPENDIAN		_SB_MAKEMASK1_32(26)
292#endif /* 1250 PASS2 || 112x PASS1 */
293
294
295#define S_LDT_SRICMD_RXMARGIN		20
296#define M_LDT_SRICMD_RXMARGIN		_SB_MAKEMASK_32(5,S_LDT_SRICMD_RXMARGIN)
297#define V_LDT_SRICMD_RXMARGIN(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICMD_RXMARGIN)
298#define G_LDT_SRICMD_RXMARGIN(x)	_SB_GETVALUE_32(x,S_LDT_SRICMD_RXMARGIN,M_LDT_SRICMD_RXMARGIN)
299
300#define M_LDT_SRICMD_LDTPLLCOMPAT	_SB_MAKEMASK1_32(25)
301
302#define S_LDT_SRICMD_TXINITIALOFFSET	28
303#define M_LDT_SRICMD_TXINITIALOFFSET	_SB_MAKEMASK_32(3,S_LDT_SRICMD_TXINITIALOFFSET)
304#define V_LDT_SRICMD_TXINITIALOFFSET(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET)
305#define G_LDT_SRICMD_TXINITIALOFFSET(x)	_SB_GETVALUE_32(x,S_LDT_SRICMD_TXINITIALOFFSET,M_LDT_SRICMD_TXINITIALOFFSET)
306
307#define M_LDT_SRICMD_LINKFREQDIRECT	_SB_MAKEMASK1_32(31)
308
309/*
310 * LDT Error control and status register (Table 8-22) (Table 8-23)
311 */
312
313#define M_LDT_ERRCTL_PROTFATAL_EN	_SB_MAKEMASK1_32(0)
314#define M_LDT_ERRCTL_PROTNONFATAL_EN	_SB_MAKEMASK1_32(1)
315#define M_LDT_ERRCTL_PROTSYNCFLOOD_EN	_SB_MAKEMASK1_32(2)
316#define M_LDT_ERRCTL_OVFFATAL_EN	_SB_MAKEMASK1_32(3)
317#define M_LDT_ERRCTL_OVFNONFATAL_EN	_SB_MAKEMASK1_32(4)
318#define M_LDT_ERRCTL_OVFSYNCFLOOD_EN	_SB_MAKEMASK1_32(5)
319#define M_LDT_ERRCTL_EOCNXAFATAL_EN	_SB_MAKEMASK1_32(6)
320#define M_LDT_ERRCTL_EOCNXANONFATAL_EN	_SB_MAKEMASK1_32(7)
321#define M_LDT_ERRCTL_EOCNXASYNCFLOOD_EN	_SB_MAKEMASK1_32(8)
322#define M_LDT_ERRCTL_CRCFATAL_EN	_SB_MAKEMASK1_32(9)
323#define M_LDT_ERRCTL_CRCNONFATAL_EN	_SB_MAKEMASK1_32(10)
324#define M_LDT_ERRCTL_SERRFATAL_EN	_SB_MAKEMASK1_32(11)
325#define M_LDT_ERRCTL_SRCTAGFATAL_EN	_SB_MAKEMASK1_32(12)
326#define M_LDT_ERRCTL_SRCTAGNONFATAL_EN	_SB_MAKEMASK1_32(13)
327#define M_LDT_ERRCTL_SRCTAGSYNCFLOOD_EN	_SB_MAKEMASK1_32(14)
328#define M_LDT_ERRCTL_MAPNXAFATAL_EN	_SB_MAKEMASK1_32(15)
329#define M_LDT_ERRCTL_MAPNXANONFATAL_EN	_SB_MAKEMASK1_32(16)
330#define M_LDT_ERRCTL_MAPNXASYNCFLOOD_EN	_SB_MAKEMASK1_32(17)
331
332#define M_LDT_ERRCTL_PROTOERR		_SB_MAKEMASK1_32(24)
333#define M_LDT_ERRCTL_OVFERR		_SB_MAKEMASK1_32(25)
334#define M_LDT_ERRCTL_EOCNXAERR		_SB_MAKEMASK1_32(26)
335#define M_LDT_ERRCTL_SRCTAGERR		_SB_MAKEMASK1_32(27)
336#define M_LDT_ERRCTL_MAPNXAERR		_SB_MAKEMASK1_32(28)
337
338/*
339 * SRI Control register (Table 8-24, 8-25)  Offset 0x6C
340 */
341
342#define S_LDT_SRICTRL_NEEDRESP		0
343#define M_LDT_SRICTRL_NEEDRESP		_SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDRESP)
344#define V_LDT_SRICTRL_NEEDRESP(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDRESP)
345#define G_LDT_SRICTRL_NEEDRESP(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDRESP,M_LDT_SRICTRL_NEEDRESP)
346
347#define S_LDT_SRICTRL_NEEDNPREQ		2
348#define M_LDT_SRICTRL_NEEDNPREQ		_SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDNPREQ)
349#define V_LDT_SRICTRL_NEEDNPREQ(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ)
350#define G_LDT_SRICTRL_NEEDNPREQ(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDNPREQ,M_LDT_SRICTRL_NEEDNPREQ)
351
352#define S_LDT_SRICTRL_NEEDPREQ		4
353#define M_LDT_SRICTRL_NEEDPREQ		_SB_MAKEMASK_32(2,S_LDT_SRICTRL_NEEDPREQ)
354#define V_LDT_SRICTRL_NEEDPREQ(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ)
355#define G_LDT_SRICTRL_NEEDPREQ(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_NEEDPREQ,M_LDT_SRICTRL_NEEDPREQ)
356
357#define S_LDT_SRICTRL_WANTRESP		8
358#define M_LDT_SRICTRL_WANTRESP		_SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTRESP)
359#define V_LDT_SRICTRL_WANTRESP(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTRESP)
360#define G_LDT_SRICTRL_WANTRESP(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTRESP,M_LDT_SRICTRL_WANTRESP)
361
362#define S_LDT_SRICTRL_WANTNPREQ		10
363#define M_LDT_SRICTRL_WANTNPREQ		_SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTNPREQ)
364#define V_LDT_SRICTRL_WANTNPREQ(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ)
365#define G_LDT_SRICTRL_WANTNPREQ(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTNPREQ,M_LDT_SRICTRL_WANTNPREQ)
366
367#define S_LDT_SRICTRL_WANTPREQ		12
368#define M_LDT_SRICTRL_WANTPREQ		_SB_MAKEMASK_32(2,S_LDT_SRICTRL_WANTPREQ)
369#define V_LDT_SRICTRL_WANTPREQ(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_WANTPREQ)
370#define G_LDT_SRICTRL_WANTPREQ(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_WANTPREQ,M_LDT_SRICTRL_WANTPREQ)
371
372#define S_LDT_SRICTRL_BUFRELSPACE	16
373#define M_LDT_SRICTRL_BUFRELSPACE	_SB_MAKEMASK_32(4,S_LDT_SRICTRL_BUFRELSPACE)
374#define V_LDT_SRICTRL_BUFRELSPACE(x)	_SB_MAKEVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE)
375#define G_LDT_SRICTRL_BUFRELSPACE(x)	_SB_GETVALUE_32(x,S_LDT_SRICTRL_BUFRELSPACE,M_LDT_SRICTRL_BUFRELSPACE)
376
377/*
378 * LDT SRI Transmit Buffer Count register (Table 8-26)
379 */
380
381#define S_LDT_TXBUFCNT_PCMD		0
382#define M_LDT_TXBUFCNT_PCMD		_SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PCMD)
383#define V_LDT_TXBUFCNT_PCMD(x)		_SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PCMD)
384#define G_LDT_TXBUFCNT_PCMD(x)		_SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PCMD,M_LDT_TXBUFCNT_PCMD)
385
386#define S_LDT_TXBUFCNT_PDATA		4
387#define M_LDT_TXBUFCNT_PDATA		_SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_PDATA)
388#define V_LDT_TXBUFCNT_PDATA(x)		_SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_PDATA)
389#define G_LDT_TXBUFCNT_PDATA(x)		_SB_GETVALUE_32(x,S_LDT_TXBUFCNT_PDATA,M_LDT_TXBUFCNT_PDATA)
390
391#define S_LDT_TXBUFCNT_NPCMD		8
392#define M_LDT_TXBUFCNT_NPCMD		_SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPCMD)
393#define V_LDT_TXBUFCNT_NPCMD(x)		_SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPCMD)
394#define G_LDT_TXBUFCNT_NPCMD(x)		_SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPCMD,M_LDT_TXBUFCNT_NPCMD)
395
396#define S_LDT_TXBUFCNT_NPDATA		12
397#define M_LDT_TXBUFCNT_NPDATA		_SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_NPDATA)
398#define V_LDT_TXBUFCNT_NPDATA(x)	_SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_NPDATA)
399#define G_LDT_TXBUFCNT_NPDATA(x)	_SB_GETVALUE_32(x,S_LDT_TXBUFCNT_NPDATA,M_LDT_TXBUFCNT_NPDATA)
400
401#define S_LDT_TXBUFCNT_RCMD		16
402#define M_LDT_TXBUFCNT_RCMD		_SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RCMD)
403#define V_LDT_TXBUFCNT_RCMD(x)		_SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RCMD)
404#define G_LDT_TXBUFCNT_RCMD(x)		_SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RCMD,M_LDT_TXBUFCNT_RCMD)
405
406#define S_LDT_TXBUFCNT_RDATA		20
407#define M_LDT_TXBUFCNT_RDATA		_SB_MAKEMASK_32(4,S_LDT_TXBUFCNT_RDATA)
408#define V_LDT_TXBUFCNT_RDATA(x)		_SB_MAKEVALUE_32(x,S_LDT_TXBUFCNT_RDATA)
409#define G_LDT_TXBUFCNT_RDATA(x)		_SB_GETVALUE_32(x,S_LDT_TXBUFCNT_RDATA,M_LDT_TXBUFCNT_RDATA)
410
411#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
412/*
413 * Additional Status Register
414 */
415
416#define S_LDT_ADDSTATUS_TGTDONE		0
417#define M_LDT_ADDSTATUS_TGTDONE		_SB_MAKEMASK_32(8,S_LDT_ADDSTATUS_TGTDONE)
418#define V_LDT_ADDSTATUS_TGTDONE(x)	_SB_MAKEVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE)
419#define G_LDT_ADDSTATUS_TGTDONE(x)	_SB_GETVALUE_32(x,S_LDT_ADDSTATUS_TGTDONE,M_LDT_ADDSTATUS_TGTDONE)
420#endif /* 1250 PASS2 || 112x PASS1 */
421
422#endif
423