1/*
2 * linux/include/asm-xtensa/pgalloc.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (C) 2001-2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PGALLOC_H
12#define _XTENSA_PGALLOC_H
13
14#ifdef __KERNEL__
15
16#include <linux/threads.h>
17#include <linux/highmem.h>
18#include <asm/processor.h>
19#include <asm/cacheflush.h>
20
21
22/* Cache aliasing:
23 *
24 * If the cache size for one way is greater than the page size, we have to
25 * deal with cache aliasing. The cache index is wider than the page size:
26 *
27 *      |cache |
28 * |pgnum |page|	virtual address
29 * |xxxxxX|zzzz|
30 * |      |    |
31 *   \  / |    |
32 *  trans.|    |
33 *   /  \ |    |
34 * |yyyyyY|zzzz|	physical address
35 *
36 * When the page number is translated to the physical page address, the lowest
37 * bit(s) (X) that are also part of the cache index are also translated (Y).
38 * If this translation changes this bit (X), the cache index is also afected,
39 * thus resulting in a different cache line than before.
40 * The kernel does not provide a mechanism to ensure that the page color
41 * (represented by this bit) remains the same when allocated or when pages
42 * are remapped. When user pages are mapped into kernel space, the color of
43 * the page might also change.
44 *
45 * We use the address space VMALLOC_END ... VMALLOC_END + DCACHE_WAY_SIZE * 2
46 * to temporarily map a patch so we can match the color.
47 */
48
49#if (DCACHE_WAY_SIZE > PAGE_SIZE)
50# define PAGE_COLOR_MASK	(PAGE_MASK & (DCACHE_WAY_SIZE-1))
51# define PAGE_COLOR(a)		\
52	(((unsigned long)(a)&PAGE_COLOR_MASK) >> PAGE_SHIFT)
53# define PAGE_COLOR_EQ(a,b)	\
54	((((unsigned long)(a) ^ (unsigned long)(b)) & PAGE_COLOR_MASK) == 0)
55# define PAGE_COLOR_MAP0(v)	\
56	(VMALLOC_END + ((unsigned long)(v) & PAGE_COLOR_MASK))
57# define PAGE_COLOR_MAP1(v)	\
58	(VMALLOC_END + ((unsigned long)(v) & PAGE_COLOR_MASK) + DCACHE_WAY_SIZE)
59#endif
60
61/*
62 * Allocating and freeing a pmd is trivial: the 1-entry pmd is
63 * inside the pgd, so has no extra memory associated with it.
64 */
65
66#define pgd_free(pgd)	free_page((unsigned long)(pgd))
67
68#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
69
70static inline void
71pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *pte)
72{
73	pmd_val(*(pmdp)) = (unsigned long)(pte);
74	__asm__ __volatile__ ("memw; dhwb %0, 0; dsync" :: "a" (pmdp));
75}
76
77static inline void
78pmd_populate(struct mm_struct *mm, pmd_t *pmdp, struct page *page)
79{
80	pmd_val(*(pmdp)) = (unsigned long)page_to_virt(page);
81	__asm__ __volatile__ ("memw; dhwb %0, 0; dsync" :: "a" (pmdp));
82}
83
84
85
86#else
87
88# define pmd_populate_kernel(mm, pmdp, pte)				     \
89	(pmd_val(*(pmdp)) = (unsigned long)(pte))
90# define pmd_populate(mm, pmdp, page)					     \
91	(pmd_val(*(pmdp)) = (unsigned long)page_to_virt(page))
92
93#endif
94
95static inline pgd_t*
96pgd_alloc(struct mm_struct *mm)
97{
98	pgd_t *pgd;
99
100	pgd = (pgd_t *)__get_free_pages(GFP_KERNEL|__GFP_ZERO, PGD_ORDER);
101
102	if (likely(pgd != NULL))
103		__flush_dcache_page((unsigned long)pgd);
104
105	return pgd;
106}
107
108extern pte_t* pte_alloc_one_kernel(struct mm_struct* mm, unsigned long addr);
109extern struct page* pte_alloc_one(struct mm_struct* mm, unsigned long addr);
110
111#define pte_free_kernel(pte) free_page((unsigned long)pte)
112#define pte_free(pte) __free_page(pte)
113
114#endif /* __KERNEL__ */
115#endif /* _XTENSA_PGALLOC_H */
116