1/* This is the single file included by all MPC8xx build options. 2 * Since there are many different boards and no standard configuration, 3 * we have a unique include file for each. Rather than change every 4 * file that has to include MPC8xx configuration, they all include 5 * this one and the configuration switching is done here. 6 */ 7#ifdef __KERNEL__ 8#ifndef __CONFIG_8xx_DEFS 9#define __CONFIG_8xx_DEFS 10 11 12#ifdef CONFIG_8xx 13 14#ifdef CONFIG_MBX 15#include <platforms/mbx.h> 16#endif 17 18#ifdef CONFIG_FADS 19#include <platforms/fads.h> 20#endif 21 22#ifdef CONFIG_RPXLITE 23#include <platforms/rpxlite.h> 24#endif 25 26#ifdef CONFIG_BSEIP 27#include <platforms/bseip.h> 28#endif 29 30#ifdef CONFIG_RPXCLASSIC 31#include <platforms/rpxclassic.h> 32#endif 33 34#if defined(CONFIG_TQM8xxL) 35#include <platforms/tqm8xx.h> 36#endif 37 38#if defined(CONFIG_IVMS8) || defined(CONFIG_IVML24) 39#include <platforms/ivms8.h> 40#endif 41 42#if defined(CONFIG_HERMES_PRO) 43#include <platforms/hermes.h> 44#endif 45 46#if defined(CONFIG_IP860) 47#include <platforms/ip860.h> 48#endif 49 50#if defined(CONFIG_LWMON) 51#include <platforms/lwmon.h> 52#endif 53 54#if defined(CONFIG_PCU_E) 55#include <platforms/pcu_e.h> 56#endif 57 58#if defined(CONFIG_CCM) 59#include <platforms/ccm.h> 60#endif 61 62#if defined(CONFIG_LANTEC) 63#include <platforms/lantec.h> 64#endif 65 66#if defined(CONFIG_MPC885ADS) 67#include <platforms/mpc885ads.h> 68#endif 69 70/* Currently, all 8xx boards that support a processor to PCI/ISA bridge 71 * use the same memory map. 72 */ 73#if !defined(_IO_BASE) /* defined in board specific header */ 74#define _IO_BASE 0 75#endif 76#define _ISA_MEM_BASE 0 77#define PCI_DRAM_OFFSET 0 78 79#ifndef __ASSEMBLY__ 80/* The "residual" data board information structure the boot loader 81 * hands to us. 82 */ 83extern unsigned char __res[]; 84 85struct pt_regs; 86 87enum ppc_sys_devices { 88 MPC8xx_CPM_FEC1, 89 MPC8xx_CPM_FEC2, 90 MPC8xx_CPM_I2C, 91 MPC8xx_CPM_SCC1, 92 MPC8xx_CPM_SCC2, 93 MPC8xx_CPM_SCC3, 94 MPC8xx_CPM_SCC4, 95 MPC8xx_CPM_SPI, 96 MPC8xx_CPM_MCC1, 97 MPC8xx_CPM_MCC2, 98 MPC8xx_CPM_SMC1, 99 MPC8xx_CPM_SMC2, 100 MPC8xx_CPM_USB, 101 MPC8xx_MDIO_FEC, 102 NUM_PPC_SYS_DEVS, 103}; 104 105#define PPC_PIN_SIZE (24 * 1024 * 1024) /* 24Mbytes of data pinned */ 106 107#ifndef BOARD_CHIP_NAME 108#define BOARD_CHIP_NAME "" 109#endif 110 111#endif /* !__ASSEMBLY__ */ 112#endif /* CONFIG_8xx */ 113#endif /* __CONFIG_8xx_DEFS */ 114#endif /* __KERNEL__ */ 115