1/* 2** asm-ppc/amigappc.h -- This header defines some values and pointers for 3** the Phase 5 PowerUp card. 4** 5** Copyright 1997, 1998 by Phase5, Germany. 6** 7** This file is subject to the terms and conditions of the GNU General Public 8** License. See the file COPYING in the main directory of this archive 9** for more details. 10** 11** Created: 7/22/97 by Jesper Skov 12*/ 13 14#ifdef __KERNEL__ 15#ifndef _M68K_AMIGAPPC_H 16#define _M68K_AMIGAPPC_H 17 18#ifndef __ASSEMBLY__ 19 20/* #include <asm/system.h> */ 21#define mb() __asm__ __volatile__ ("sync" : : : "memory") 22 23#define APUS_WRITE(_a_, _v_) \ 24do { \ 25 (*((volatile unsigned char *)(_a_)) = (_v_)); \ 26 mb(); \ 27} while (0) 28 29#define APUS_READ(_a_, _v_) \ 30do { \ 31 (_v_) = (*((volatile unsigned char *)(_a_))); \ 32 mb(); \ 33} while (0) 34#endif /* ndef __ASSEMBLY__ */ 35 36/* Maybe add a [#ifdef WANT_ZTWOBASE] condition to amigahw.h? */ 37#define zTwoBase (0x80000000) 38 39#define APUS_IPL_BASE (zTwoBase + 0x00f60000) 40#define APUS_REG_RESET (APUS_IPL_BASE + 0x00) 41#define APUS_REG_WAITSTATE (APUS_IPL_BASE + 0x10) 42#define APUS_REG_SHADOW (APUS_IPL_BASE + 0x18) 43#define APUS_REG_LOCK (APUS_IPL_BASE + 0x20) 44#define APUS_REG_INT (APUS_IPL_BASE + 0x28) 45#define APUS_IPL_EMU (APUS_IPL_BASE + 0x30) 46#define APUS_INT_LVL (APUS_IPL_BASE + 0x38) 47 48#define REGSHADOW_SETRESET (0x80) 49#define REGSHADOW_SELFRESET (0x40) 50 51#define REGLOCK_SETRESET (0x80) 52#define REGLOCK_BLACKMAGICK1 (0x40) 53#define REGLOCK_BLACKMAGICK2 (0x20) 54#define REGLOCK_BLACKMAGICK3 (0x10) 55 56#define REGWAITSTATE_SETRESET (0x80) 57#define REGWAITSTATE_PPCW (0x08) 58#define REGWAITSTATE_PPCR (0x04) 59 60#define REGRESET_SETRESET (0x80) 61#define REGRESET_PPCRESET (0x10) 62#define REGRESET_M68KRESET (0x08) 63#define REGRESET_AMIGARESET (0x04) 64#define REGRESET_AUXRESET (0x02) 65#define REGRESET_SCSIRESET (0x01) 66 67#define REGINT_SETRESET (0x80) 68#define REGINT_ENABLEIPL (0x02) 69#define REGINT_INTMASTER (0x01) 70 71#define IPLEMU_SETRESET (0x80) 72#define IPLEMU_DISABLEINT (0x40) 73#define IPLEMU_IPL2 (0x20) 74#define IPLEMU_IPL1 (0x10) 75#define IPLEMU_IPL0 (0x08) 76#define IPLEMU_PPCIPL2 (0x04) 77#define IPLEMU_PPCIPL1 (0x02) 78#define IPLEMU_PPCIPL0 (0x01) 79#define IPLEMU_IPLMASK (IPLEMU_PPCIPL2|IPLEMU_PPCIPL1|IPLEMU_PPCIPL0) 80 81#define INTLVL_SETRESET (0x80) 82#define INTLVL_MASK (0x7f) 83 84#endif /* _M68k_AMIGAPPC_H */ 85#endif /* __KERNEL__ */ 86