1/* 2 * TLB shootdown specifics for powerpc 3 * 4 * Copyright (C) 2002 Anton Blanchard, IBM Corp. 5 * Copyright (C) 2002 Paul Mackerras, IBM Corp. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12#ifndef _ASM_POWERPC_TLB_H 13#define _ASM_POWERPC_TLB_H 14#ifdef __KERNEL__ 15 16#ifndef __powerpc64__ 17#include <asm/pgtable.h> 18#endif 19#include <asm/pgalloc.h> 20#include <asm/tlbflush.h> 21#ifndef __powerpc64__ 22#include <asm/page.h> 23#include <asm/mmu.h> 24#endif 25 26struct mmu_gather; 27 28#define tlb_start_vma(tlb, vma) do { } while (0) 29#define tlb_end_vma(tlb, vma) do { } while (0) 30 31#if !defined(CONFIG_PPC_STD_MMU) 32 33#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) 34 35#elif defined(__powerpc64__) 36 37extern void pte_free_finish(void); 38 39static inline void tlb_flush(struct mmu_gather *tlb) 40{ 41 struct ppc64_tlb_batch *tlbbatch = &__get_cpu_var(ppc64_tlb_batch); 42 43 /* If there's a TLB batch pending, then we must flush it because the 44 * pages are going to be freed and we really don't want to have a CPU 45 * access a freed page because it has a stale TLB 46 */ 47 if (tlbbatch->index) 48 __flush_tlb_pending(tlbbatch); 49 50 pte_free_finish(); 51} 52 53#else 54 55extern void tlb_flush(struct mmu_gather *tlb); 56 57#endif 58 59/* Get the generic bits... */ 60#include <asm-generic/tlb.h> 61 62#if !defined(CONFIG_PPC_STD_MMU) || defined(__powerpc64__) 63 64#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0) 65 66#else 67extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, 68 unsigned long address); 69 70static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, 71 unsigned long address) 72{ 73 if (pte_val(*ptep) & _PAGE_HASHPTE) 74 flush_hash_entry(tlb->mm, ptep, address); 75} 76 77#endif 78#endif /* __KERNEL__ */ 79#endif /* __ASM_POWERPC_TLB_H */ 80