1/* 2 * include/asm-powerpc/qe_ic.h 3 * 4 * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. 5 * 6 * Authors: Shlomi Gridish <gridish@freescale.com> 7 * Li Yang <leoli@freescale.com> 8 * 9 * Description: 10 * QE IC external definitions and structure. 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License as published by the 14 * Free Software Foundation; either version 2 of the License, or (at your 15 * option) any later version. 16 */ 17#ifndef _ASM_POWERPC_QE_IC_H 18#define _ASM_POWERPC_QE_IC_H 19 20#include <linux/irq.h> 21 22#define NUM_OF_QE_IC_GROUPS 6 23 24/* Flags when we init the QE IC */ 25#define QE_IC_SPREADMODE_GRP_W 0x00000001 26#define QE_IC_SPREADMODE_GRP_X 0x00000002 27#define QE_IC_SPREADMODE_GRP_Y 0x00000004 28#define QE_IC_SPREADMODE_GRP_Z 0x00000008 29#define QE_IC_SPREADMODE_GRP_RISCA 0x00000010 30#define QE_IC_SPREADMODE_GRP_RISCB 0x00000020 31 32#define QE_IC_LOW_SIGNAL 0x00000100 33#define QE_IC_HIGH_SIGNAL 0x00000200 34 35#define QE_IC_GRP_W_PRI0_DEST_SIGNAL_HIGH 0x00001000 36#define QE_IC_GRP_W_PRI1_DEST_SIGNAL_HIGH 0x00002000 37#define QE_IC_GRP_X_PRI0_DEST_SIGNAL_HIGH 0x00004000 38#define QE_IC_GRP_X_PRI1_DEST_SIGNAL_HIGH 0x00008000 39#define QE_IC_GRP_Y_PRI0_DEST_SIGNAL_HIGH 0x00010000 40#define QE_IC_GRP_Y_PRI1_DEST_SIGNAL_HIGH 0x00020000 41#define QE_IC_GRP_Z_PRI0_DEST_SIGNAL_HIGH 0x00040000 42#define QE_IC_GRP_Z_PRI1_DEST_SIGNAL_HIGH 0x00080000 43#define QE_IC_GRP_RISCA_PRI0_DEST_SIGNAL_HIGH 0x00100000 44#define QE_IC_GRP_RISCA_PRI1_DEST_SIGNAL_HIGH 0x00200000 45#define QE_IC_GRP_RISCB_PRI0_DEST_SIGNAL_HIGH 0x00400000 46#define QE_IC_GRP_RISCB_PRI1_DEST_SIGNAL_HIGH 0x00800000 47#define QE_IC_GRP_W_DEST_SIGNAL_SHIFT (12) 48 49/* QE interrupt sources groups */ 50enum qe_ic_grp_id { 51 QE_IC_GRP_W = 0, /* QE interrupt controller group W */ 52 QE_IC_GRP_X, /* QE interrupt controller group X */ 53 QE_IC_GRP_Y, /* QE interrupt controller group Y */ 54 QE_IC_GRP_Z, /* QE interrupt controller group Z */ 55 QE_IC_GRP_RISCA, /* QE interrupt controller RISC group A */ 56 QE_IC_GRP_RISCB /* QE interrupt controller RISC group B */ 57}; 58 59void qe_ic_init(struct device_node *node, unsigned int flags); 60void qe_ic_set_highest_priority(unsigned int virq, int high); 61int qe_ic_set_priority(unsigned int virq, unsigned int priority); 62int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high); 63 64#endif /* _ASM_POWERPC_QE_IC_H */ 65