• Home
  • History
  • Annotate
  • Line#
  • Navigate
  • Raw
  • Download
  • only in /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-i386/mach-default/
1/*
2 *  include/asm-i386/mach-default/mach_timer.h
3 *
4 *  Machine specific calibrate_tsc() for generic.
5 *  Split out from timer_tsc.c by Osamu Tomita <tomita@cinet.co.jp>
6 */
7/* ------ Calibrate the TSC -------
8 * Return 2^32 * (1 / (TSC clocks per usec)) for do_fast_gettimeoffset().
9 * Too much 64-bit arithmetic here to do this cleanly in C, and for
10 * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2)
11 * output busy loop as low as possible. We avoid reading the CTC registers
12 * directly because of the awkward 8-bit access mechanism of the 82C54
13 * device.
14 */
15#ifndef _MACH_TIMER_H
16#define _MACH_TIMER_H
17
18#define CALIBRATE_TIME_MSEC 30 /* 30 msecs */
19#define CALIBRATE_LATCH	\
20	((CLOCK_TICK_RATE * CALIBRATE_TIME_MSEC + 1000/2)/1000)
21
22static inline void mach_prepare_counter(void)
23{
24       /* Set the Gate high, disable speaker */
25	outb((inb(0x61) & ~0x02) | 0x01, 0x61);
26
27	/*
28	 * Now let's take care of CTC channel 2
29	 *
30	 * Set the Gate high, program CTC channel 2 for mode 0,
31	 * (interrupt on terminal count mode), binary count,
32	 * load 5 * LATCH count, (LSB and MSB) to begin countdown.
33	 *
34	 * Some devices need a delay here.
35	 */
36	outb(0xb0, 0x43);			/* binary, mode 0, LSB/MSB, Ch 2 */
37	outb_p(CALIBRATE_LATCH & 0xff, 0x42);	/* LSB of count */
38	outb_p(CALIBRATE_LATCH >> 8, 0x42);       /* MSB of count */
39}
40
41static inline void mach_countup(unsigned long *count_p)
42{
43	unsigned long count = 0;
44	do {
45		count++;
46	} while ((inb_p(0x61) & 0x20) == 0);
47	*count_p = count;
48}
49
50#endif /* !_MACH_TIMER_H */
51