1/* $Id: etraxgpio.h,v 1.1.1.1 2007/08/03 18:53:22 Exp $ */ 2/* 3 * The following devices are accessable using this driver using 4 * GPIO_MAJOR (120) and a couple of minor numbers: 5 * For ETRAX 100LX (ARCH_V10): 6 * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction 7 * /dev/gpiob minor 1, 8 bit GPIO, each bit can change direction 8 * /dev/leds minor 2, Access to leds depending on kernelconfig 9 * /dev/gpiog minor 3 10 g0dir, g8_15dir, g16_23dir, g24 dir configurable in R_GEN_CONFIG 11 g1-g7 and g25-g31 is both input and outputs but on different pins 12 Also note that some bits change pins depending on what interfaces 13 are enabled. 14 * 15 * 16 * For ETRAX FS (ARCH_V32): 17 * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction 18 * /dev/gpiob minor 1, 18 bit GPIO, each bit can change direction 19 * /dev/gpioc minor 2, 18 bit GPIO, each bit can change direction 20 * /dev/gpiod minor 3, 18 bit GPIO, each bit can change direction 21 * /dev/gpioe minor 4, 18 bit GPIO, each bit can change direction 22 * /dev/leds minor 5, Access to leds depending on kernelconfig 23 * 24 */ 25#ifndef _ASM_ETRAXGPIO_H 26#define _ASM_ETRAXGPIO_H 27 28/* etraxgpio _IOC_TYPE, bits 8 to 15 in ioctl cmd */ 29#ifdef CONFIG_ETRAX_ARCH_V10 30#define ETRAXGPIO_IOCTYPE 43 31#define GPIO_MINOR_A 0 32#define GPIO_MINOR_B 1 33#define GPIO_MINOR_LEDS 2 34#define GPIO_MINOR_G 3 35#define GPIO_MINOR_LAST 3 36#endif 37#ifdef CONFIG_ETRAX_ARCH_V32 38#define ETRAXGPIO_IOCTYPE 43 39#define GPIO_MINOR_A 0 40#define GPIO_MINOR_B 1 41#define GPIO_MINOR_LEDS 2 42#define GPIO_MINOR_C 3 43#define GPIO_MINOR_D 4 44#define GPIO_MINOR_E 5 45#define GPIO_MINOR_LAST 5 46#endif 47 48/* supported ioctl _IOC_NR's */ 49 50#define IO_READBITS 0x1 /* read and return current port bits (obsolete) */ 51#define IO_SETBITS 0x2 /* set the bits marked by 1 in the argument */ 52#define IO_CLRBITS 0x3 /* clear the bits marked by 1 in the argument */ 53 54/* the alarm is waited for by select() */ 55 56#define IO_HIGHALARM 0x4 /* set alarm on high for bits marked by 1 */ 57#define IO_LOWALARM 0x5 /* set alarm on low for bits marked by 1 */ 58#define IO_CLRALARM 0x6 /* clear alarm for bits marked by 1 */ 59 60/* LED ioctl */ 61#define IO_LEDACTIVE_SET 0x7 /* set active led 62 * 0=off, 1=green, 2=red, 3=yellow */ 63 64/* GPIO direction ioctl's */ 65#define IO_READDIR 0x8 /* Read direction 0=input 1=output (obsolete) */ 66#define IO_SETINPUT 0x9 /* Set direction for bits set, 0=unchanged 1=input, 67 returns mask with current inputs (obsolete) */ 68#define IO_SETOUTPUT 0xA /* Set direction for bits set, 0=unchanged 1=output, 69 returns mask with current outputs (obsolete)*/ 70 71/* LED ioctl extended */ 72#define IO_LED_SETBIT 0xB 73#define IO_LED_CLRBIT 0xC 74 75/* SHUTDOWN ioctl */ 76#define IO_SHUTDOWN 0xD 77#define IO_GET_PWR_BT 0xE 78 79/* Bit toggling in driver settings */ 80/* bit set in low byte0 is CLK mask (0x00FF), 81 bit set in byte1 is DATA mask (0xFF00) 82 msb, data_mask[7:0] , clk_mask[7:0] 83 */ 84#define IO_CFG_WRITE_MODE 0xF 85#define IO_CFG_WRITE_MODE_VALUE(msb, data_mask, clk_mask) \ 86 ( (((msb)&1) << 16) | (((data_mask) &0xFF) << 8) | ((clk_mask) & 0xFF) ) 87 88/* The following 4 ioctl's take a pointer as argument and handles 89 * 32 bit ports (port G) properly. 90 * These replaces IO_READBITS,IO_SETINPUT AND IO_SETOUTPUT 91 */ 92#define IO_READ_INBITS 0x10 /* *arg is result of reading the input pins */ 93#define IO_READ_OUTBITS 0x11 /* *arg is result of reading the output shadow */ 94#define IO_SETGET_INPUT 0x12 /* bits set in *arg is set to input, 95 * *arg updated with current input pins. 96 */ 97#define IO_SETGET_OUTPUT 0x13 /* bits set in *arg is set to output, 98 * *arg updated with current output pins. 99 */ 100 101 102 103#endif 104