1/*
2 * Driver for Intel I82092AA PCI-PCMCIA bridge.
3 *
4 * (C) 2001 Red Hat, Inc.
5 *
6 * Author: Arjan Van De Ven <arjanv@redhat.com>
7 * Loosly based on i82365.c from the pcmcia-cs package
8 *
9 * $Id: i82092.c,v 1.1.1.1 2007/08/03 18:52:51 Exp $
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/pci.h>
15#include <linux/init.h>
16#include <linux/workqueue.h>
17#include <linux/interrupt.h>
18#include <linux/device.h>
19
20#include <pcmcia/cs_types.h>
21#include <pcmcia/ss.h>
22#include <pcmcia/cs.h>
23
24#include <asm/system.h>
25#include <asm/io.h>
26
27#include "i82092aa.h"
28#include "i82365.h"
29
30MODULE_LICENSE("GPL");
31
32/* PCI core routines */
33static struct pci_device_id i82092aa_pci_ids[] = {
34	{
35	      .vendor = PCI_VENDOR_ID_INTEL,
36	      .device = PCI_DEVICE_ID_INTEL_82092AA_0,
37	      .subvendor = PCI_ANY_ID,
38	      .subdevice = PCI_ANY_ID,
39	 },
40	 {}
41};
42MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids);
43
44#ifdef CONFIG_PM
45static int i82092aa_socket_suspend (struct pci_dev *dev, pm_message_t state)
46{
47	return pcmcia_socket_dev_suspend(&dev->dev, state);
48}
49
50static int i82092aa_socket_resume (struct pci_dev *dev)
51{
52	return pcmcia_socket_dev_resume(&dev->dev);
53}
54#endif
55
56static struct pci_driver i82092aa_pci_drv = {
57	.name           = "i82092aa",
58	.id_table       = i82092aa_pci_ids,
59	.probe          = i82092aa_pci_probe,
60	.remove         = __devexit_p(i82092aa_pci_remove),
61#ifdef CONFIG_PM
62	.suspend        = i82092aa_socket_suspend,
63	.resume         = i82092aa_socket_resume,
64#endif
65};
66
67
68/* the pccard structure and its functions */
69static struct pccard_operations i82092aa_operations = {
70	.init 		 	= i82092aa_init,
71	.get_status		= i82092aa_get_status,
72	.set_socket		= i82092aa_set_socket,
73	.set_io_map		= i82092aa_set_io_map,
74	.set_mem_map		= i82092aa_set_mem_map,
75};
76
77/* The card can do upto 4 sockets, allocate a structure for each of them */
78
79struct socket_info {
80	int	number;
81	int	card_state; 	/*  0 = no socket,
82				    1 = empty socket,
83				    2 = card but not initialized,
84				    3 = operational card */
85	kio_addr_t io_base; 	/* base io address of the socket */
86
87	struct pcmcia_socket socket;
88	struct pci_dev *dev;	/* The PCI device for the socket */
89};
90
91#define MAX_SOCKETS 4
92static struct socket_info sockets[MAX_SOCKETS];
93static int socket_count;  /* shortcut */
94
95
96static int __devinit i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
97{
98	unsigned char configbyte;
99	int i, ret;
100
101	enter("i82092aa_pci_probe");
102
103	if ((ret = pci_enable_device(dev)))
104		return ret;
105
106	pci_read_config_byte(dev, 0x40, &configbyte);  /* PCI Configuration Control */
107	switch(configbyte&6) {
108		case 0:
109			socket_count = 2;
110			break;
111		case 2:
112			socket_count = 1;
113			break;
114		case 4:
115		case 6:
116			socket_count = 4;
117			break;
118
119		default:
120			printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n");
121			ret = -EIO;
122			goto err_out_disable;
123	}
124	printk(KERN_INFO "i82092aa: configured as a %d socket device.\n", socket_count);
125
126	if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) {
127		ret = -EBUSY;
128		goto err_out_disable;
129	}
130
131	for (i = 0;i<socket_count;i++) {
132		sockets[i].card_state = 1; /* 1 = present but empty */
133		sockets[i].io_base = pci_resource_start(dev, 0);
134		sockets[i].socket.features |= SS_CAP_PCCARD;
135		sockets[i].socket.map_size = 0x1000;
136		sockets[i].socket.irq_mask = 0;
137		sockets[i].socket.pci_irq  = dev->irq;
138		sockets[i].socket.owner = THIS_MODULE;
139
140		sockets[i].number = i;
141
142		if (card_present(i)) {
143			sockets[i].card_state = 3;
144			dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i);
145		} else {
146			dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i);
147		}
148	}
149
150	/* Now, specifiy that all interrupts are to be done as PCI interrupts */
151	configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */
152	pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */
153
154	/* Register the interrupt handler */
155	dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq);
156	if ((ret = request_irq(dev->irq, i82092aa_interrupt, IRQF_SHARED, "i82092aa", i82092aa_interrupt))) {
157		printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq);
158		goto err_out_free_res;
159	}
160
161	pci_set_drvdata(dev, &sockets[i].socket);
162
163	for (i = 0; i<socket_count; i++) {
164		sockets[i].socket.dev.parent = &dev->dev;
165		sockets[i].socket.ops = &i82092aa_operations;
166		sockets[i].socket.resource_ops = &pccard_nonstatic_ops;
167		ret = pcmcia_register_socket(&sockets[i].socket);
168		if (ret) {
169			goto err_out_free_sockets;
170		}
171	}
172
173	leave("i82092aa_pci_probe");
174	return 0;
175
176err_out_free_sockets:
177	if (i) {
178		for (i--;i>=0;i--) {
179			pcmcia_unregister_socket(&sockets[i].socket);
180		}
181	}
182	free_irq(dev->irq, i82092aa_interrupt);
183err_out_free_res:
184	release_region(pci_resource_start(dev, 0), 2);
185err_out_disable:
186	pci_disable_device(dev);
187	return ret;
188}
189
190static void __devexit i82092aa_pci_remove(struct pci_dev *dev)
191{
192	struct pcmcia_socket *socket = pci_get_drvdata(dev);
193
194	enter("i82092aa_pci_remove");
195
196	free_irq(dev->irq, i82092aa_interrupt);
197
198	if (socket)
199		pcmcia_unregister_socket(socket);
200
201	leave("i82092aa_pci_remove");
202}
203
204static DEFINE_SPINLOCK(port_lock);
205
206/* basic value read/write functions */
207
208static unsigned char indirect_read(int socket, unsigned short reg)
209{
210	unsigned short int port;
211	unsigned char val;
212	unsigned long flags;
213	spin_lock_irqsave(&port_lock,flags);
214	reg += socket * 0x40;
215	port = sockets[socket].io_base;
216	outb(reg,port);
217	val = inb(port+1);
218	spin_unlock_irqrestore(&port_lock,flags);
219	return val;
220}
221
222
223static void indirect_write(int socket, unsigned short reg, unsigned char value)
224{
225	unsigned short int port;
226	unsigned long flags;
227	spin_lock_irqsave(&port_lock,flags);
228	reg = reg + socket * 0x40;
229	port = sockets[socket].io_base;
230	outb(reg,port);
231	outb(value,port+1);
232	spin_unlock_irqrestore(&port_lock,flags);
233}
234
235static void indirect_setbit(int socket, unsigned short reg, unsigned char mask)
236{
237	unsigned short int port;
238	unsigned char val;
239	unsigned long flags;
240	spin_lock_irqsave(&port_lock,flags);
241	reg = reg + socket * 0x40;
242	port = sockets[socket].io_base;
243	outb(reg,port);
244	val = inb(port+1);
245	val |= mask;
246	outb(reg,port);
247	outb(val,port+1);
248	spin_unlock_irqrestore(&port_lock,flags);
249}
250
251
252static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask)
253{
254	unsigned short int port;
255	unsigned char val;
256	unsigned long flags;
257	spin_lock_irqsave(&port_lock,flags);
258	reg = reg + socket * 0x40;
259	port = sockets[socket].io_base;
260	outb(reg,port);
261	val = inb(port+1);
262	val &= ~mask;
263	outb(reg,port);
264	outb(val,port+1);
265	spin_unlock_irqrestore(&port_lock,flags);
266}
267
268static void indirect_write16(int socket, unsigned short reg, unsigned short value)
269{
270	unsigned short int port;
271	unsigned char val;
272	unsigned long flags;
273	spin_lock_irqsave(&port_lock,flags);
274	reg = reg + socket * 0x40;
275	port = sockets[socket].io_base;
276
277	outb(reg,port);
278	val = value & 255;
279	outb(val,port+1);
280
281	reg++;
282
283	outb(reg,port);
284	val = value>>8;
285	outb(val,port+1);
286	spin_unlock_irqrestore(&port_lock,flags);
287}
288
289/* simple helper functions */
290/* External clock time, in nanoseconds.  120 ns = 8.33 MHz */
291static int cycle_time = 120;
292
293static int to_cycles(int ns)
294{
295	if (cycle_time!=0)
296		return ns/cycle_time;
297	else
298		return 0;
299}
300
301
302/* Interrupt handler functionality */
303
304static irqreturn_t i82092aa_interrupt(int irq, void *dev)
305{
306	int i;
307	int loopcount = 0;
308	int handled = 0;
309
310	unsigned int events, active=0;
311
312/*	enter("i82092aa_interrupt");*/
313
314	while (1) {
315		loopcount++;
316		if (loopcount>20) {
317			printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n");
318			break;
319		}
320
321		active = 0;
322
323		for (i=0;i<socket_count;i++) {
324			int csc;
325			if (sockets[i].card_state==0) /* Inactive socket, should not happen */
326				continue;
327
328			csc = indirect_read(i,I365_CSC); /* card status change register */
329
330			if (csc==0)  /* no events on this socket */
331			   	continue;
332			handled = 1;
333			events = 0;
334
335			if (csc & I365_CSC_DETECT) {
336				events |= SS_DETECT;
337				printk("Card detected in socket %i!\n",i);
338			 }
339
340			if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) {
341				/* For IO/CARDS, bit 0 means "read the card" */
342				events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
343			} else {
344				/* Check for battery/ready events */
345				events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
346				events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
347				events |= (csc & I365_CSC_READY) ? SS_READY : 0;
348			}
349
350			if (events) {
351				pcmcia_parse_events(&sockets[i].socket, events);
352			}
353			active |= events;
354		}
355
356		if (active==0) /* no more events to handle */
357			break;
358
359	}
360	return IRQ_RETVAL(handled);
361/*	leave("i82092aa_interrupt");*/
362}
363
364
365
366/* socket functions */
367
368static int card_present(int socketno)
369{
370	unsigned int val;
371	enter("card_present");
372
373	if ((socketno<0) || (socketno >= MAX_SOCKETS))
374		return 0;
375	if (sockets[socketno].io_base == 0)
376		return 0;
377
378
379	val = indirect_read(socketno, 1); /* Interface status register */
380	if ((val&12)==12) {
381		leave("card_present 1");
382		return 1;
383	}
384
385	leave("card_present 0");
386	return 0;
387}
388
389static void set_bridge_state(int sock)
390{
391	enter("set_bridge_state");
392	indirect_write(sock, I365_GBLCTL,0x00);
393	indirect_write(sock, I365_GENCTL,0x00);
394
395	indirect_setbit(sock, I365_INTCTL,0x08);
396	leave("set_bridge_state");
397}
398
399
400
401
402
403
404static int i82092aa_init(struct pcmcia_socket *sock)
405{
406	int i;
407	struct resource res = { .start = 0, .end = 0x0fff };
408        pccard_io_map io = { 0, 0, 0, 0, 1 };
409	pccard_mem_map mem = { .res = &res, };
410
411        enter("i82092aa_init");
412
413        for (i = 0; i < 2; i++) {
414        	io.map = i;
415                i82092aa_set_io_map(sock, &io);
416	}
417        for (i = 0; i < 5; i++) {
418        	mem.map = i;
419                i82092aa_set_mem_map(sock, &mem);
420	}
421
422	leave("i82092aa_init");
423	return 0;
424}
425
426static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value)
427{
428	unsigned int sock = container_of(socket, struct socket_info, socket)->number;
429	unsigned int status;
430
431	enter("i82092aa_get_status");
432
433	status = indirect_read(sock,I365_STATUS); /* Interface Status Register */
434	*value = 0;
435
436	if ((status & I365_CS_DETECT) == I365_CS_DETECT) {
437		*value |= SS_DETECT;
438	}
439
440	/* IO cards have a different meaning of bits 0,1 */
441	/* Also notice the inverse-logic on the bits */
442	 if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD)	{
443	 	/* IO card */
444	 	if (!(status & I365_CS_STSCHG))
445	 		*value |= SS_STSCHG;
446	 } else { /* non I/O card */
447	 	if (!(status & I365_CS_BVD1))
448	 		*value |= SS_BATDEAD;
449	 	if (!(status & I365_CS_BVD2))
450	 		*value |= SS_BATWARN;
451
452	 }
453
454	 if (status & I365_CS_WRPROT)
455	 	(*value) |= SS_WRPROT;	/* card is write protected */
456
457	 if (status & I365_CS_READY)
458	 	(*value) |= SS_READY;    /* card is not busy */
459
460	 if (status & I365_CS_POWERON)
461	 	(*value) |= SS_POWERON;  /* power is applied to the card */
462
463
464	leave("i82092aa_get_status");
465	return 0;
466}
467
468
469static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state)
470{
471	unsigned int sock = container_of(socket, struct socket_info, socket)->number;
472	unsigned char reg;
473
474	enter("i82092aa_set_socket");
475
476	/* First, set the global controller options */
477
478	set_bridge_state(sock);
479
480	/* Values for the IGENC register */
481
482	reg = 0;
483	if (!(state->flags & SS_RESET)) 	/* The reset bit has "inverse" logic */
484		reg = reg | I365_PC_RESET;
485	if (state->flags & SS_IOCARD)
486		reg = reg | I365_PC_IOCARD;
487
488	indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */
489
490	/* Power registers */
491
492	reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
493
494	if (state->flags & SS_PWR_AUTO) {
495		printk("Auto power\n");
496		reg |= I365_PWR_AUTO;	/* automatic power mngmnt */
497	}
498	if (state->flags & SS_OUTPUT_ENA) {
499		printk("Power Enabled \n");
500		reg |= I365_PWR_OUT;	/* enable power */
501	}
502
503	switch (state->Vcc) {
504		case 0:
505			break;
506		case 50:
507			printk("setting voltage to Vcc to 5V on socket %i\n",sock);
508			reg |= I365_VCC_5V;
509			break;
510		default:
511			printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc);
512			leave("i82092aa_set_socket");
513			return -EINVAL;
514	}
515
516
517	switch (state->Vpp) {
518		case 0:
519			printk("not setting Vpp on socket %i\n",sock);
520			break;
521		case 50:
522			printk("setting Vpp to 5.0 for socket %i\n",sock);
523			reg |= I365_VPP1_5V | I365_VPP2_5V;
524			break;
525		case 120:
526			printk("setting Vpp to 12.0\n");
527			reg |= I365_VPP1_12V | I365_VPP2_12V;
528			break;
529		default:
530			printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc);
531			leave("i82092aa_set_socket");
532			return -EINVAL;
533	}
534
535	if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */
536		indirect_write(sock,I365_POWER,reg);
537
538	/* Enable specific interrupt events */
539
540	reg = 0x00;
541	if (state->csc_mask & SS_DETECT) {
542		reg |= I365_CSC_DETECT;
543	}
544	if (state->flags & SS_IOCARD) {
545		if (state->csc_mask & SS_STSCHG)
546			reg |= I365_CSC_STSCHG;
547	} else {
548		if (state->csc_mask & SS_BATDEAD)
549			reg |= I365_CSC_BVD1;
550		if (state->csc_mask & SS_BATWARN)
551			reg |= I365_CSC_BVD2;
552		if (state->csc_mask & SS_READY)
553			reg |= I365_CSC_READY;
554
555	}
556
557	/* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/
558
559	indirect_write(sock,I365_CSCINT,reg);
560	(void)indirect_read(sock,I365_CSC);
561
562	leave("i82092aa_set_socket");
563	return 0;
564}
565
566static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io)
567{
568	unsigned int sock = container_of(socket, struct socket_info, socket)->number;
569	unsigned char map, ioctl;
570
571	enter("i82092aa_set_io_map");
572
573	map = io->map;
574
575	/* Check error conditions */
576	if (map > 1) {
577		leave("i82092aa_set_io_map with invalid map");
578		return -EINVAL;
579	}
580	if ((io->start > 0xffff) || (io->stop > 0xffff) || (io->stop < io->start)){
581		leave("i82092aa_set_io_map with invalid io");
582		return -EINVAL;
583	}
584
585	/* Turn off the window before changing anything */
586	if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map))
587		indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map));
588
589/*	printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop);  */
590
591	/* write the new values */
592	indirect_write16(sock,I365_IO(map)+I365_W_START,io->start);
593	indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop);
594
595	ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map);
596
597	if (io->flags & (MAP_16BIT|MAP_AUTOSZ))
598		ioctl |= I365_IOCTL_16BIT(map);
599
600	indirect_write(sock,I365_IOCTL,ioctl);
601
602	/* Turn the window back on if needed */
603	if (io->flags & MAP_ACTIVE)
604		indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map));
605
606	leave("i82092aa_set_io_map");
607	return 0;
608}
609
610static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem)
611{
612	struct socket_info *sock_info = container_of(socket, struct socket_info, socket);
613	unsigned int sock = sock_info->number;
614	struct pci_bus_region region;
615	unsigned short base, i;
616	unsigned char map;
617
618	enter("i82092aa_set_mem_map");
619
620	pcibios_resource_to_bus(sock_info->dev, &region, mem->res);
621
622	map = mem->map;
623	if (map > 4) {
624		leave("i82092aa_set_mem_map: invalid map");
625		return -EINVAL;
626	}
627
628
629	if ( (mem->card_start > 0x3ffffff) || (region.start > region.end) ||
630	     (mem->speed > 1000) ) {
631		leave("i82092aa_set_mem_map: invalid address / speed");
632		printk("invalid mem map for socket %i : %lx to %lx with a start of %x \n",sock,region.start, region.end, mem->card_start);
633		return -EINVAL;
634	}
635
636	/* Turn off the window before changing anything */
637	if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map))
638	              indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
639
640
641/* 	printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, region.start,region.end,sock,mem->speed,mem->flags & MAP_ACTIVE);  */
642
643	/* write the start address */
644	base = I365_MEM(map);
645	i = (region.start >> 12) & 0x0fff;
646	if (mem->flags & MAP_16BIT)
647		i |= I365_MEM_16BIT;
648	if (mem->flags & MAP_0WS)
649		i |= I365_MEM_0WS;
650	indirect_write16(sock,base+I365_W_START,i);
651
652	/* write the stop address */
653
654	i= (region.end >> 12) & 0x0fff;
655	switch (to_cycles(mem->speed)) {
656		case 0:
657			break;
658		case 1:
659			i |= I365_MEM_WS0;
660			break;
661		case 2:
662			i |= I365_MEM_WS1;
663			break;
664		default:
665			i |= I365_MEM_WS1 | I365_MEM_WS0;
666			break;
667	}
668
669	indirect_write16(sock,base+I365_W_STOP,i);
670
671	/* card start */
672
673	i = ((mem->card_start - region.start) >> 12) & 0x3fff;
674	if (mem->flags & MAP_WRPROT)
675		i |= I365_MEM_WRPROT;
676	if (mem->flags & MAP_ATTRIB) {
677/*		printk("requesting attribute memory for socket %i\n",sock);*/
678		i |= I365_MEM_REG;
679	} else {
680/*		printk("requesting normal memory for socket %i\n",sock);*/
681	}
682	indirect_write16(sock,base+I365_W_OFF,i);
683
684	/* Enable the window if necessary */
685	if (mem->flags & MAP_ACTIVE)
686		indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
687
688	leave("i82092aa_set_mem_map");
689	return 0;
690}
691
692static int i82092aa_module_init(void)
693{
694	return pci_register_driver(&i82092aa_pci_drv);
695}
696
697static void i82092aa_module_exit(void)
698{
699	enter("i82092aa_module_exit");
700	pci_unregister_driver(&i82092aa_pci_drv);
701	if (sockets[0].io_base>0)
702			 release_region(sockets[0].io_base, 2);
703	leave("i82092aa_module_exit");
704}
705
706module_init(i82092aa_module_init);
707module_exit(i82092aa_module_exit);
708