1/* $Id: sunlance.c,v 1.1.1.1 2007/08/03 18:52:45 Exp $ 2 * lance.c: Linux/Sparc/Lance driver 3 * 4 * Written 1995, 1996 by Miguel de Icaza 5 * Sources: 6 * The Linux depca driver 7 * The Linux lance driver. 8 * The Linux skeleton driver. 9 * The NetBSD Sparc/Lance driver. 10 * Theo de Raadt (deraadt@openbsd.org) 11 * NCR92C990 Lan Controller manual 12 * 13 * 1.4: 14 * Added support to run with a ledma on the Sun4m 15 * 16 * 1.5: 17 * Added multiple card detection. 18 * 19 * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost 20 * (ecd@skynet.be) 21 * 22 * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost 23 * (ecd@skynet.be) 24 * 25 * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller 26 * (davem@caip.rutgers.edu) 27 * 28 * 5/29/96: override option 'tpe-link-test?', if it is 'false', as 29 * this disables auto carrier detection on sun4m. Eddie C. Dost 30 * (ecd@skynet.be) 31 * 32 * 1.7: 33 * 6/26/96: Bug fix for multiple ledmas, miguel. 34 * 35 * 1.8: 36 * Stole multicast code from depca.c, fixed lance_tx. 37 * 38 * 1.9: 39 * 8/21/96: Fixed the multicast code (Pedro Roque) 40 * 41 * 8/28/96: Send fake packet in lance_open() if auto_select is true, 42 * so we can detect the carrier loss condition in time. 43 * Eddie C. Dost (ecd@skynet.be) 44 * 45 * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an 46 * MNA trap during chksum_partial_copy(). (ecd@skynet.be) 47 * 48 * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be) 49 * 50 * 12/22/96: Don't loop forever in lance_rx() on incomplete packets. 51 * This was the sun4c killer. Shit, stupid bug. 52 * (ecd@skynet.be) 53 * 54 * 1.10: 55 * 1/26/97: Modularize driver. (ecd@skynet.be) 56 * 57 * 1.11: 58 * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz) 59 * 60 * 1.12: 61 * 11/3/99: Fixed SMP race in lance_start_xmit found by davem. 62 * Anton Blanchard (anton@progsoc.uts.edu.au) 63 * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces. 64 * David S. Miller (davem@redhat.com) 65 * 2.01: 66 * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com) 67 * 68 */ 69 70#undef DEBUG_DRIVER 71 72static char lancestr[] = "LANCE"; 73 74#include <linux/module.h> 75#include <linux/kernel.h> 76#include <linux/types.h> 77#include <linux/fcntl.h> 78#include <linux/interrupt.h> 79#include <linux/ioport.h> 80#include <linux/in.h> 81#include <linux/slab.h> 82#include <linux/string.h> 83#include <linux/delay.h> 84#include <linux/init.h> 85#include <linux/crc32.h> 86#include <linux/errno.h> 87#include <linux/socket.h> /* Used for the temporal inet entries and routing */ 88#include <linux/route.h> 89#include <linux/netdevice.h> 90#include <linux/etherdevice.h> 91#include <linux/skbuff.h> 92#include <linux/ethtool.h> 93#include <linux/bitops.h> 94 95#include <asm/system.h> 96#include <asm/io.h> 97#include <asm/dma.h> 98#include <asm/pgtable.h> 99#include <asm/byteorder.h> /* Used by the checksum routines */ 100#include <asm/idprom.h> 101#include <asm/sbus.h> 102#include <asm/openprom.h> 103#include <asm/oplib.h> 104#include <asm/auxio.h> /* For tpe-link-test? setting */ 105#include <asm/irq.h> 106 107#define DRV_NAME "sunlance" 108#define DRV_VERSION "2.02" 109#define DRV_RELDATE "8/24/03" 110#define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)" 111 112static char version[] = 113 DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n"; 114 115MODULE_VERSION(DRV_VERSION); 116MODULE_AUTHOR(DRV_AUTHOR); 117MODULE_DESCRIPTION("Sun Lance ethernet driver"); 118MODULE_LICENSE("GPL"); 119 120/* Define: 2^4 Tx buffers and 2^4 Rx buffers */ 121#ifndef LANCE_LOG_TX_BUFFERS 122#define LANCE_LOG_TX_BUFFERS 4 123#define LANCE_LOG_RX_BUFFERS 4 124#endif 125 126#define LE_CSR0 0 127#define LE_CSR1 1 128#define LE_CSR2 2 129#define LE_CSR3 3 130 131#define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ 132 133#define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ 134#define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ 135#define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ 136#define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ 137#define LE_C0_MERR 0x0800 /* ME: Memory error */ 138#define LE_C0_RINT 0x0400 /* Received interrupt */ 139#define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ 140#define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ 141#define LE_C0_INTR 0x0080 /* Interrupt or error */ 142#define LE_C0_INEA 0x0040 /* Interrupt enable */ 143#define LE_C0_RXON 0x0020 /* Receiver on */ 144#define LE_C0_TXON 0x0010 /* Transmitter on */ 145#define LE_C0_TDMD 0x0008 /* Transmitter demand */ 146#define LE_C0_STOP 0x0004 /* Stop the card */ 147#define LE_C0_STRT 0x0002 /* Start the card */ 148#define LE_C0_INIT 0x0001 /* Init the card */ 149 150#define LE_C3_BSWP 0x4 /* SWAP */ 151#define LE_C3_ACON 0x2 /* ALE Control */ 152#define LE_C3_BCON 0x1 /* Byte control */ 153 154/* Receive message descriptor 1 */ 155#define LE_R1_OWN 0x80 /* Who owns the entry */ 156#define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */ 157#define LE_R1_FRA 0x20 /* FRA: Frame error */ 158#define LE_R1_OFL 0x10 /* OFL: Frame overflow */ 159#define LE_R1_CRC 0x08 /* CRC error */ 160#define LE_R1_BUF 0x04 /* BUF: Buffer error */ 161#define LE_R1_SOP 0x02 /* Start of packet */ 162#define LE_R1_EOP 0x01 /* End of packet */ 163#define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */ 164 165#define LE_T1_OWN 0x80 /* Lance owns the packet */ 166#define LE_T1_ERR 0x40 /* Error summary */ 167#define LE_T1_EMORE 0x10 /* Error: more than one retry needed */ 168#define LE_T1_EONE 0x08 /* Error: one retry needed */ 169#define LE_T1_EDEF 0x04 /* Error: deferred */ 170#define LE_T1_SOP 0x02 /* Start of packet */ 171#define LE_T1_EOP 0x01 /* End of packet */ 172#define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */ 173 174#define LE_T3_BUF 0x8000 /* Buffer error */ 175#define LE_T3_UFL 0x4000 /* Error underflow */ 176#define LE_T3_LCOL 0x1000 /* Error late collision */ 177#define LE_T3_CLOS 0x0800 /* Error carrier loss */ 178#define LE_T3_RTY 0x0400 /* Error retry */ 179#define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ 180 181#define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) 182#define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 183#define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29) 184#define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK) 185 186#define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) 187#define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 188#define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29) 189#define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK) 190 191#define PKT_BUF_SZ 1544 192#define RX_BUFF_SIZE PKT_BUF_SZ 193#define TX_BUFF_SIZE PKT_BUF_SZ 194 195struct lance_rx_desc { 196 u16 rmd0; /* low address of packet */ 197 u8 rmd1_bits; /* descriptor bits */ 198 u8 rmd1_hadr; /* high address of packet */ 199 s16 length; /* This length is 2s complement (negative)! 200 * Buffer length 201 */ 202 u16 mblength; /* This is the actual number of bytes received */ 203}; 204 205struct lance_tx_desc { 206 u16 tmd0; /* low address of packet */ 207 u8 tmd1_bits; /* descriptor bits */ 208 u8 tmd1_hadr; /* high address of packet */ 209 s16 length; /* Length is 2s complement (negative)! */ 210 u16 misc; 211}; 212 213/* The LANCE initialization block, described in databook. */ 214/* On the Sparc, this block should be on a DMA region */ 215struct lance_init_block { 216 u16 mode; /* Pre-set mode (reg. 15) */ 217 u8 phys_addr[6]; /* Physical ethernet address */ 218 u32 filter[2]; /* Multicast filter. */ 219 220 /* Receive and transmit ring base, along with extra bits. */ 221 u16 rx_ptr; /* receive descriptor addr */ 222 u16 rx_len; /* receive len and high addr */ 223 u16 tx_ptr; /* transmit descriptor addr */ 224 u16 tx_len; /* transmit len and high addr */ 225 226 /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */ 227 struct lance_rx_desc brx_ring[RX_RING_SIZE]; 228 struct lance_tx_desc btx_ring[TX_RING_SIZE]; 229 230 u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE]; 231 u8 pad[2]; /* align rx_buf for copy_and_sum(). */ 232 u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE]; 233}; 234 235#define libdesc_offset(rt, elem) \ 236((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem]))))) 237 238#define libbuff_offset(rt, elem) \ 239((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0]))))) 240 241struct lance_private { 242 void __iomem *lregs; /* Lance RAP/RDP regs. */ 243 void __iomem *dregs; /* DMA controller regs. */ 244 struct lance_init_block __iomem *init_block_iomem; 245 struct lance_init_block *init_block_mem; 246 247 spinlock_t lock; 248 249 int rx_new, tx_new; 250 int rx_old, tx_old; 251 252 struct net_device_stats stats; 253 struct sbus_dma *ledma; /* If set this points to ledma */ 254 char tpe; /* cable-selection is TPE */ 255 char auto_select; /* cable-selection by carrier */ 256 char burst_sizes; /* ledma SBus burst sizes */ 257 char pio_buffer; /* init block in PIO space? */ 258 259 unsigned short busmaster_regval; 260 261 void (*init_ring)(struct net_device *); 262 void (*rx)(struct net_device *); 263 void (*tx)(struct net_device *); 264 265 char *name; 266 dma_addr_t init_block_dvma; 267 struct net_device *dev; /* Backpointer */ 268 struct sbus_dev *sdev; 269 struct timer_list multicast_timer; 270}; 271 272#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ 273 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ 274 lp->tx_old - lp->tx_new-1) 275 276/* Lance registers. */ 277#define RDP 0x00UL /* register data port */ 278#define RAP 0x02UL /* register address port */ 279#define LANCE_REG_SIZE 0x04UL 280 281#define STOP_LANCE(__lp) \ 282do { void __iomem *__base = (__lp)->lregs; \ 283 sbus_writew(LE_CSR0, __base + RAP); \ 284 sbus_writew(LE_C0_STOP, __base + RDP); \ 285} while (0) 286 287int sparc_lance_debug = 2; 288 289/* The Lance uses 24 bit addresses */ 290/* On the Sun4c the DVMA will provide the remaining bytes for us */ 291/* On the Sun4m we have to instruct the ledma to provide them */ 292/* Even worse, on scsi/ether SBUS cards, the init block and the 293 * transmit/receive buffers are addresses as offsets from absolute 294 * zero on the lebuffer PIO area. -DaveM 295 */ 296 297#define LANCE_ADDR(x) ((long)(x) & ~0xff000000) 298 299/* Load the CSR registers */ 300static void load_csrs(struct lance_private *lp) 301{ 302 u32 leptr; 303 304 if (lp->pio_buffer) 305 leptr = 0; 306 else 307 leptr = LANCE_ADDR(lp->init_block_dvma); 308 309 sbus_writew(LE_CSR1, lp->lregs + RAP); 310 sbus_writew(leptr & 0xffff, lp->lregs + RDP); 311 sbus_writew(LE_CSR2, lp->lregs + RAP); 312 sbus_writew(leptr >> 16, lp->lregs + RDP); 313 sbus_writew(LE_CSR3, lp->lregs + RAP); 314 sbus_writew(lp->busmaster_regval, lp->lregs + RDP); 315 316 /* Point back to csr0 */ 317 sbus_writew(LE_CSR0, lp->lregs + RAP); 318} 319 320/* Setup the Lance Rx and Tx rings */ 321static void lance_init_ring_dvma(struct net_device *dev) 322{ 323 struct lance_private *lp = netdev_priv(dev); 324 struct lance_init_block *ib = lp->init_block_mem; 325 dma_addr_t aib = lp->init_block_dvma; 326 __u32 leptr; 327 int i; 328 329 /* Lock out other processes while setting up hardware */ 330 netif_stop_queue(dev); 331 lp->rx_new = lp->tx_new = 0; 332 lp->rx_old = lp->tx_old = 0; 333 334 /* Copy the ethernet address to the lance init block 335 * Note that on the sparc you need to swap the ethernet address. 336 */ 337 ib->phys_addr [0] = dev->dev_addr [1]; 338 ib->phys_addr [1] = dev->dev_addr [0]; 339 ib->phys_addr [2] = dev->dev_addr [3]; 340 ib->phys_addr [3] = dev->dev_addr [2]; 341 ib->phys_addr [4] = dev->dev_addr [5]; 342 ib->phys_addr [5] = dev->dev_addr [4]; 343 344 /* Setup the Tx ring entries */ 345 for (i = 0; i <= TX_RING_SIZE; i++) { 346 leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i)); 347 ib->btx_ring [i].tmd0 = leptr; 348 ib->btx_ring [i].tmd1_hadr = leptr >> 16; 349 ib->btx_ring [i].tmd1_bits = 0; 350 ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */ 351 ib->btx_ring [i].misc = 0; 352 } 353 354 /* Setup the Rx ring entries */ 355 for (i = 0; i < RX_RING_SIZE; i++) { 356 leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i)); 357 358 ib->brx_ring [i].rmd0 = leptr; 359 ib->brx_ring [i].rmd1_hadr = leptr >> 16; 360 ib->brx_ring [i].rmd1_bits = LE_R1_OWN; 361 ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000; 362 ib->brx_ring [i].mblength = 0; 363 } 364 365 /* Setup the initialization block */ 366 367 /* Setup rx descriptor pointer */ 368 leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0)); 369 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16); 370 ib->rx_ptr = leptr; 371 372 /* Setup tx descriptor pointer */ 373 leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0)); 374 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16); 375 ib->tx_ptr = leptr; 376} 377 378static void lance_init_ring_pio(struct net_device *dev) 379{ 380 struct lance_private *lp = netdev_priv(dev); 381 struct lance_init_block __iomem *ib = lp->init_block_iomem; 382 u32 leptr; 383 int i; 384 385 /* Lock out other processes while setting up hardware */ 386 netif_stop_queue(dev); 387 lp->rx_new = lp->tx_new = 0; 388 lp->rx_old = lp->tx_old = 0; 389 390 /* Copy the ethernet address to the lance init block 391 * Note that on the sparc you need to swap the ethernet address. 392 */ 393 sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]); 394 sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]); 395 sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]); 396 sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]); 397 sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]); 398 sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]); 399 400 /* Setup the Tx ring entries */ 401 for (i = 0; i <= TX_RING_SIZE; i++) { 402 leptr = libbuff_offset(tx_buf, i); 403 sbus_writew(leptr, &ib->btx_ring [i].tmd0); 404 sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr); 405 sbus_writeb(0, &ib->btx_ring [i].tmd1_bits); 406 407 /* The ones required by tmd2 */ 408 sbus_writew(0xf000, &ib->btx_ring [i].length); 409 sbus_writew(0, &ib->btx_ring [i].misc); 410 } 411 412 /* Setup the Rx ring entries */ 413 for (i = 0; i < RX_RING_SIZE; i++) { 414 leptr = libbuff_offset(rx_buf, i); 415 416 sbus_writew(leptr, &ib->brx_ring [i].rmd0); 417 sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr); 418 sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits); 419 sbus_writew(-RX_BUFF_SIZE|0xf000, 420 &ib->brx_ring [i].length); 421 sbus_writew(0, &ib->brx_ring [i].mblength); 422 } 423 424 /* Setup the initialization block */ 425 426 /* Setup rx descriptor pointer */ 427 leptr = libdesc_offset(brx_ring, 0); 428 sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16), 429 &ib->rx_len); 430 sbus_writew(leptr, &ib->rx_ptr); 431 432 /* Setup tx descriptor pointer */ 433 leptr = libdesc_offset(btx_ring, 0); 434 sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16), 435 &ib->tx_len); 436 sbus_writew(leptr, &ib->tx_ptr); 437} 438 439static void init_restart_ledma(struct lance_private *lp) 440{ 441 u32 csr = sbus_readl(lp->dregs + DMA_CSR); 442 443 if (!(csr & DMA_HNDL_ERROR)) { 444 /* E-Cache draining */ 445 while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN) 446 barrier(); 447 } 448 449 csr = sbus_readl(lp->dregs + DMA_CSR); 450 csr &= ~DMA_E_BURSTS; 451 if (lp->burst_sizes & DMA_BURST32) 452 csr |= DMA_E_BURST32; 453 else 454 csr |= DMA_E_BURST16; 455 456 csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV); 457 458 if (lp->tpe) 459 csr |= DMA_EN_ENETAUI; 460 else 461 csr &= ~DMA_EN_ENETAUI; 462 udelay(20); 463 sbus_writel(csr, lp->dregs + DMA_CSR); 464 udelay(200); 465} 466 467static int init_restart_lance(struct lance_private *lp) 468{ 469 u16 regval = 0; 470 int i; 471 472 if (lp->dregs) 473 init_restart_ledma(lp); 474 475 sbus_writew(LE_CSR0, lp->lregs + RAP); 476 sbus_writew(LE_C0_INIT, lp->lregs + RDP); 477 478 /* Wait for the lance to complete initialization */ 479 for (i = 0; i < 100; i++) { 480 regval = sbus_readw(lp->lregs + RDP); 481 482 if (regval & (LE_C0_ERR | LE_C0_IDON)) 483 break; 484 barrier(); 485 } 486 if (i == 100 || (regval & LE_C0_ERR)) { 487 printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n", 488 i, regval); 489 if (lp->dregs) 490 printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR)); 491 return -1; 492 } 493 494 /* Clear IDON by writing a "1", enable interrupts and start lance */ 495 sbus_writew(LE_C0_IDON, lp->lregs + RDP); 496 sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP); 497 498 if (lp->dregs) { 499 u32 csr = sbus_readl(lp->dregs + DMA_CSR); 500 501 csr |= DMA_INT_ENAB; 502 sbus_writel(csr, lp->dregs + DMA_CSR); 503 } 504 505 return 0; 506} 507 508static void lance_rx_dvma(struct net_device *dev) 509{ 510 struct lance_private *lp = netdev_priv(dev); 511 struct lance_init_block *ib = lp->init_block_mem; 512 struct lance_rx_desc *rd; 513 u8 bits; 514 int len, entry = lp->rx_new; 515 struct sk_buff *skb; 516 517 for (rd = &ib->brx_ring [entry]; 518 !((bits = rd->rmd1_bits) & LE_R1_OWN); 519 rd = &ib->brx_ring [entry]) { 520 521 /* We got an incomplete frame? */ 522 if ((bits & LE_R1_POK) != LE_R1_POK) { 523 lp->stats.rx_over_errors++; 524 lp->stats.rx_errors++; 525 } else if (bits & LE_R1_ERR) { 526 /* Count only the end frame as a rx error, 527 * not the beginning 528 */ 529 if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++; 530 if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++; 531 if (bits & LE_R1_OFL) lp->stats.rx_over_errors++; 532 if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++; 533 if (bits & LE_R1_EOP) lp->stats.rx_errors++; 534 } else { 535 len = (rd->mblength & 0xfff) - 4; 536 skb = dev_alloc_skb(len + 2); 537 538 if (skb == NULL) { 539 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", 540 dev->name); 541 lp->stats.rx_dropped++; 542 rd->mblength = 0; 543 rd->rmd1_bits = LE_R1_OWN; 544 lp->rx_new = RX_NEXT(entry); 545 return; 546 } 547 548 lp->stats.rx_bytes += len; 549 550 skb_reserve(skb, 2); /* 16 byte align */ 551 skb_put(skb, len); /* make room */ 552 eth_copy_and_sum(skb, 553 (unsigned char *)&(ib->rx_buf [entry][0]), 554 len, 0); 555 skb->protocol = eth_type_trans(skb, dev); 556 netif_rx(skb); 557 dev->last_rx = jiffies; 558 lp->stats.rx_packets++; 559 } 560 561 /* Return the packet to the pool */ 562 rd->mblength = 0; 563 rd->rmd1_bits = LE_R1_OWN; 564 entry = RX_NEXT(entry); 565 } 566 567 lp->rx_new = entry; 568} 569 570static void lance_tx_dvma(struct net_device *dev) 571{ 572 struct lance_private *lp = netdev_priv(dev); 573 struct lance_init_block *ib = lp->init_block_mem; 574 int i, j; 575 576 spin_lock(&lp->lock); 577 578 j = lp->tx_old; 579 for (i = j; i != lp->tx_new; i = j) { 580 struct lance_tx_desc *td = &ib->btx_ring [i]; 581 u8 bits = td->tmd1_bits; 582 583 /* If we hit a packet not owned by us, stop */ 584 if (bits & LE_T1_OWN) 585 break; 586 587 if (bits & LE_T1_ERR) { 588 u16 status = td->misc; 589 590 lp->stats.tx_errors++; 591 if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++; 592 if (status & LE_T3_LCOL) lp->stats.tx_window_errors++; 593 594 if (status & LE_T3_CLOS) { 595 lp->stats.tx_carrier_errors++; 596 if (lp->auto_select) { 597 lp->tpe = 1 - lp->tpe; 598 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n", 599 dev->name, lp->tpe?"TPE":"AUI"); 600 STOP_LANCE(lp); 601 lp->init_ring(dev); 602 load_csrs(lp); 603 init_restart_lance(lp); 604 goto out; 605 } 606 } 607 608 /* Buffer errors and underflows turn off the 609 * transmitter, restart the adapter. 610 */ 611 if (status & (LE_T3_BUF|LE_T3_UFL)) { 612 lp->stats.tx_fifo_errors++; 613 614 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 615 dev->name); 616 STOP_LANCE(lp); 617 lp->init_ring(dev); 618 load_csrs(lp); 619 init_restart_lance(lp); 620 goto out; 621 } 622 } else if ((bits & LE_T1_POK) == LE_T1_POK) { 623 /* 624 * So we don't count the packet more than once. 625 */ 626 td->tmd1_bits = bits & ~(LE_T1_POK); 627 628 /* One collision before packet was sent. */ 629 if (bits & LE_T1_EONE) 630 lp->stats.collisions++; 631 632 /* More than one collision, be optimistic. */ 633 if (bits & LE_T1_EMORE) 634 lp->stats.collisions += 2; 635 636 lp->stats.tx_packets++; 637 } 638 639 j = TX_NEXT(j); 640 } 641 lp->tx_old = j; 642out: 643 if (netif_queue_stopped(dev) && 644 TX_BUFFS_AVAIL > 0) 645 netif_wake_queue(dev); 646 647 spin_unlock(&lp->lock); 648} 649 650static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len) 651{ 652 u16 *p16 = (u16 *) skb->data; 653 u32 *p32; 654 u8 *p8; 655 void __iomem *pbuf = piobuf; 656 657 /* We know here that both src and dest are on a 16bit boundary. */ 658 *p16++ = sbus_readw(pbuf); 659 p32 = (u32 *) p16; 660 pbuf += 2; 661 len -= 2; 662 663 while (len >= 4) { 664 *p32++ = sbus_readl(pbuf); 665 pbuf += 4; 666 len -= 4; 667 } 668 p8 = (u8 *) p32; 669 if (len >= 2) { 670 p16 = (u16 *) p32; 671 *p16++ = sbus_readw(pbuf); 672 pbuf += 2; 673 len -= 2; 674 p8 = (u8 *) p16; 675 } 676 if (len >= 1) 677 *p8 = sbus_readb(pbuf); 678} 679 680static void lance_rx_pio(struct net_device *dev) 681{ 682 struct lance_private *lp = netdev_priv(dev); 683 struct lance_init_block __iomem *ib = lp->init_block_iomem; 684 struct lance_rx_desc __iomem *rd; 685 unsigned char bits; 686 int len, entry; 687 struct sk_buff *skb; 688 689 entry = lp->rx_new; 690 for (rd = &ib->brx_ring [entry]; 691 !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN); 692 rd = &ib->brx_ring [entry]) { 693 694 /* We got an incomplete frame? */ 695 if ((bits & LE_R1_POK) != LE_R1_POK) { 696 lp->stats.rx_over_errors++; 697 lp->stats.rx_errors++; 698 } else if (bits & LE_R1_ERR) { 699 /* Count only the end frame as a rx error, 700 * not the beginning 701 */ 702 if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++; 703 if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++; 704 if (bits & LE_R1_OFL) lp->stats.rx_over_errors++; 705 if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++; 706 if (bits & LE_R1_EOP) lp->stats.rx_errors++; 707 } else { 708 len = (sbus_readw(&rd->mblength) & 0xfff) - 4; 709 skb = dev_alloc_skb(len + 2); 710 711 if (skb == NULL) { 712 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", 713 dev->name); 714 lp->stats.rx_dropped++; 715 sbus_writew(0, &rd->mblength); 716 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); 717 lp->rx_new = RX_NEXT(entry); 718 return; 719 } 720 721 lp->stats.rx_bytes += len; 722 723 skb_reserve (skb, 2); /* 16 byte align */ 724 skb_put(skb, len); /* make room */ 725 lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len); 726 skb->protocol = eth_type_trans(skb, dev); 727 netif_rx(skb); 728 dev->last_rx = jiffies; 729 lp->stats.rx_packets++; 730 } 731 732 /* Return the packet to the pool */ 733 sbus_writew(0, &rd->mblength); 734 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); 735 entry = RX_NEXT(entry); 736 } 737 738 lp->rx_new = entry; 739} 740 741static void lance_tx_pio(struct net_device *dev) 742{ 743 struct lance_private *lp = netdev_priv(dev); 744 struct lance_init_block __iomem *ib = lp->init_block_iomem; 745 int i, j; 746 747 spin_lock(&lp->lock); 748 749 j = lp->tx_old; 750 for (i = j; i != lp->tx_new; i = j) { 751 struct lance_tx_desc __iomem *td = &ib->btx_ring [i]; 752 u8 bits = sbus_readb(&td->tmd1_bits); 753 754 /* If we hit a packet not owned by us, stop */ 755 if (bits & LE_T1_OWN) 756 break; 757 758 if (bits & LE_T1_ERR) { 759 u16 status = sbus_readw(&td->misc); 760 761 lp->stats.tx_errors++; 762 if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++; 763 if (status & LE_T3_LCOL) lp->stats.tx_window_errors++; 764 765 if (status & LE_T3_CLOS) { 766 lp->stats.tx_carrier_errors++; 767 if (lp->auto_select) { 768 lp->tpe = 1 - lp->tpe; 769 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n", 770 dev->name, lp->tpe?"TPE":"AUI"); 771 STOP_LANCE(lp); 772 lp->init_ring(dev); 773 load_csrs(lp); 774 init_restart_lance(lp); 775 goto out; 776 } 777 } 778 779 /* Buffer errors and underflows turn off the 780 * transmitter, restart the adapter. 781 */ 782 if (status & (LE_T3_BUF|LE_T3_UFL)) { 783 lp->stats.tx_fifo_errors++; 784 785 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 786 dev->name); 787 STOP_LANCE(lp); 788 lp->init_ring(dev); 789 load_csrs(lp); 790 init_restart_lance(lp); 791 goto out; 792 } 793 } else if ((bits & LE_T1_POK) == LE_T1_POK) { 794 /* 795 * So we don't count the packet more than once. 796 */ 797 sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits); 798 799 /* One collision before packet was sent. */ 800 if (bits & LE_T1_EONE) 801 lp->stats.collisions++; 802 803 /* More than one collision, be optimistic. */ 804 if (bits & LE_T1_EMORE) 805 lp->stats.collisions += 2; 806 807 lp->stats.tx_packets++; 808 } 809 810 j = TX_NEXT(j); 811 } 812 lp->tx_old = j; 813 814 if (netif_queue_stopped(dev) && 815 TX_BUFFS_AVAIL > 0) 816 netif_wake_queue(dev); 817out: 818 spin_unlock(&lp->lock); 819} 820 821static irqreturn_t lance_interrupt(int irq, void *dev_id) 822{ 823 struct net_device *dev = dev_id; 824 struct lance_private *lp = netdev_priv(dev); 825 int csr0; 826 827 sbus_writew(LE_CSR0, lp->lregs + RAP); 828 csr0 = sbus_readw(lp->lregs + RDP); 829 830 /* Acknowledge all the interrupt sources ASAP */ 831 sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT), 832 lp->lregs + RDP); 833 834 if ((csr0 & LE_C0_ERR) != 0) { 835 /* Clear the error condition */ 836 sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | 837 LE_C0_CERR | LE_C0_MERR), 838 lp->lregs + RDP); 839 } 840 841 if (csr0 & LE_C0_RINT) 842 lp->rx(dev); 843 844 if (csr0 & LE_C0_TINT) 845 lp->tx(dev); 846 847 if (csr0 & LE_C0_BABL) 848 lp->stats.tx_errors++; 849 850 if (csr0 & LE_C0_MISS) 851 lp->stats.rx_errors++; 852 853 if (csr0 & LE_C0_MERR) { 854 if (lp->dregs) { 855 u32 addr = sbus_readl(lp->dregs + DMA_ADDR); 856 857 printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n", 858 dev->name, csr0, addr & 0xffffff); 859 } else { 860 printk(KERN_ERR "%s: Memory error, status %04x\n", 861 dev->name, csr0); 862 } 863 864 sbus_writew(LE_C0_STOP, lp->lregs + RDP); 865 866 if (lp->dregs) { 867 u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR); 868 869 dma_csr |= DMA_FIFO_INV; 870 sbus_writel(dma_csr, lp->dregs + DMA_CSR); 871 } 872 873 lp->init_ring(dev); 874 load_csrs(lp); 875 init_restart_lance(lp); 876 netif_wake_queue(dev); 877 } 878 879 sbus_writew(LE_C0_INEA, lp->lregs + RDP); 880 881 return IRQ_HANDLED; 882} 883 884/* Build a fake network packet and send it to ourselves. */ 885static void build_fake_packet(struct lance_private *lp) 886{ 887 struct net_device *dev = lp->dev; 888 int i, entry; 889 890 entry = lp->tx_new & TX_RING_MOD_MASK; 891 if (lp->pio_buffer) { 892 struct lance_init_block __iomem *ib = lp->init_block_iomem; 893 u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]); 894 struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet; 895 for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++) 896 sbus_writew(0, &packet[i]); 897 for (i = 0; i < 6; i++) { 898 sbus_writeb(dev->dev_addr[i], ð->h_dest[i]); 899 sbus_writeb(dev->dev_addr[i], ð->h_source[i]); 900 } 901 sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length); 902 sbus_writew(0, &ib->btx_ring[entry].misc); 903 sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); 904 } else { 905 struct lance_init_block *ib = lp->init_block_mem; 906 u16 *packet = (u16 *) &(ib->tx_buf[entry][0]); 907 struct ethhdr *eth = (struct ethhdr *) packet; 908 memset(packet, 0, ETH_ZLEN); 909 for (i = 0; i < 6; i++) { 910 eth->h_dest[i] = dev->dev_addr[i]; 911 eth->h_source[i] = dev->dev_addr[i]; 912 } 913 ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000; 914 ib->btx_ring[entry].misc = 0; 915 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN); 916 } 917 lp->tx_new = TX_NEXT(entry); 918} 919 920struct net_device *last_dev; 921 922static int lance_open(struct net_device *dev) 923{ 924 struct lance_private *lp = netdev_priv(dev); 925 int status = 0; 926 927 last_dev = dev; 928 929 STOP_LANCE(lp); 930 931 if (request_irq(dev->irq, &lance_interrupt, IRQF_SHARED, 932 lancestr, (void *) dev)) { 933 printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq); 934 return -EAGAIN; 935 } 936 937 /* On the 4m, setup the ledma to provide the upper bits for buffers */ 938 if (lp->dregs) { 939 u32 regval = lp->init_block_dvma & 0xff000000; 940 941 sbus_writel(regval, lp->dregs + DMA_TEST); 942 } 943 944 /* Set mode and clear multicast filter only at device open, 945 * so that lance_init_ring() called at any error will not 946 * forget multicast filters. 947 * 948 * BTW it is common bug in all lance drivers! --ANK 949 */ 950 if (lp->pio_buffer) { 951 struct lance_init_block __iomem *ib = lp->init_block_iomem; 952 sbus_writew(0, &ib->mode); 953 sbus_writel(0, &ib->filter[0]); 954 sbus_writel(0, &ib->filter[1]); 955 } else { 956 struct lance_init_block *ib = lp->init_block_mem; 957 ib->mode = 0; 958 ib->filter [0] = 0; 959 ib->filter [1] = 0; 960 } 961 962 lp->init_ring(dev); 963 load_csrs(lp); 964 965 netif_start_queue(dev); 966 967 status = init_restart_lance(lp); 968 if (!status && lp->auto_select) { 969 build_fake_packet(lp); 970 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP); 971 } 972 973 return status; 974} 975 976static int lance_close(struct net_device *dev) 977{ 978 struct lance_private *lp = netdev_priv(dev); 979 980 netif_stop_queue(dev); 981 del_timer_sync(&lp->multicast_timer); 982 983 STOP_LANCE(lp); 984 985 free_irq(dev->irq, (void *) dev); 986 return 0; 987} 988 989static int lance_reset(struct net_device *dev) 990{ 991 struct lance_private *lp = netdev_priv(dev); 992 int status; 993 994 STOP_LANCE(lp); 995 996 /* On the 4m, reset the dma too */ 997 if (lp->dregs) { 998 u32 csr, addr; 999 1000 printk(KERN_ERR "resetting ledma\n"); 1001 csr = sbus_readl(lp->dregs + DMA_CSR); 1002 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); 1003 udelay(200); 1004 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); 1005 1006 addr = lp->init_block_dvma & 0xff000000; 1007 sbus_writel(addr, lp->dregs + DMA_TEST); 1008 } 1009 lp->init_ring(dev); 1010 load_csrs(lp); 1011 dev->trans_start = jiffies; 1012 status = init_restart_lance(lp); 1013 return status; 1014} 1015 1016static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len) 1017{ 1018 void __iomem *piobuf = dest; 1019 u32 *p32; 1020 u16 *p16; 1021 u8 *p8; 1022 1023 switch ((unsigned long)src & 0x3) { 1024 case 0: 1025 p32 = (u32 *) src; 1026 while (len >= 4) { 1027 sbus_writel(*p32, piobuf); 1028 p32++; 1029 piobuf += 4; 1030 len -= 4; 1031 } 1032 src = (char *) p32; 1033 break; 1034 case 1: 1035 case 3: 1036 p8 = (u8 *) src; 1037 while (len >= 4) { 1038 u32 val; 1039 1040 val = p8[0] << 24; 1041 val |= p8[1] << 16; 1042 val |= p8[2] << 8; 1043 val |= p8[3]; 1044 sbus_writel(val, piobuf); 1045 p8 += 4; 1046 piobuf += 4; 1047 len -= 4; 1048 } 1049 src = (char *) p8; 1050 break; 1051 case 2: 1052 p16 = (u16 *) src; 1053 while (len >= 4) { 1054 u32 val = p16[0]<<16 | p16[1]; 1055 sbus_writel(val, piobuf); 1056 p16 += 2; 1057 piobuf += 4; 1058 len -= 4; 1059 } 1060 src = (char *) p16; 1061 break; 1062 }; 1063 if (len >= 2) { 1064 u16 val = src[0] << 8 | src[1]; 1065 sbus_writew(val, piobuf); 1066 src += 2; 1067 piobuf += 2; 1068 len -= 2; 1069 } 1070 if (len >= 1) 1071 sbus_writeb(src[0], piobuf); 1072} 1073 1074static void lance_piozero(void __iomem *dest, int len) 1075{ 1076 void __iomem *piobuf = dest; 1077 1078 if ((unsigned long)piobuf & 1) { 1079 sbus_writeb(0, piobuf); 1080 piobuf += 1; 1081 len -= 1; 1082 if (len == 0) 1083 return; 1084 } 1085 if (len == 1) { 1086 sbus_writeb(0, piobuf); 1087 return; 1088 } 1089 if ((unsigned long)piobuf & 2) { 1090 sbus_writew(0, piobuf); 1091 piobuf += 2; 1092 len -= 2; 1093 if (len == 0) 1094 return; 1095 } 1096 while (len >= 4) { 1097 sbus_writel(0, piobuf); 1098 piobuf += 4; 1099 len -= 4; 1100 } 1101 if (len >= 2) { 1102 sbus_writew(0, piobuf); 1103 piobuf += 2; 1104 len -= 2; 1105 } 1106 if (len >= 1) 1107 sbus_writeb(0, piobuf); 1108} 1109 1110static void lance_tx_timeout(struct net_device *dev) 1111{ 1112 struct lance_private *lp = netdev_priv(dev); 1113 1114 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", 1115 dev->name, sbus_readw(lp->lregs + RDP)); 1116 lance_reset(dev); 1117 netif_wake_queue(dev); 1118} 1119 1120static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) 1121{ 1122 struct lance_private *lp = netdev_priv(dev); 1123 int entry, skblen, len; 1124 1125 skblen = skb->len; 1126 1127 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen; 1128 1129 spin_lock_irq(&lp->lock); 1130 1131 lp->stats.tx_bytes += len; 1132 1133 entry = lp->tx_new & TX_RING_MOD_MASK; 1134 if (lp->pio_buffer) { 1135 struct lance_init_block __iomem *ib = lp->init_block_iomem; 1136 sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length); 1137 sbus_writew(0, &ib->btx_ring[entry].misc); 1138 lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen); 1139 if (len != skblen) 1140 lance_piozero(&ib->tx_buf[entry][skblen], len - skblen); 1141 sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); 1142 } else { 1143 struct lance_init_block *ib = lp->init_block_mem; 1144 ib->btx_ring [entry].length = (-len) | 0xf000; 1145 ib->btx_ring [entry].misc = 0; 1146 skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen); 1147 if (len != skblen) 1148 memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen); 1149 ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN); 1150 } 1151 1152 lp->tx_new = TX_NEXT(entry); 1153 1154 if (TX_BUFFS_AVAIL <= 0) 1155 netif_stop_queue(dev); 1156 1157 /* Kick the lance: transmit now */ 1158 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP); 1159 1160 /* Read back CSR to invalidate the E-Cache. 1161 * This is needed, because DMA_DSBL_WR_INV is set. 1162 */ 1163 if (lp->dregs) 1164 sbus_readw(lp->lregs + RDP); 1165 1166 spin_unlock_irq(&lp->lock); 1167 1168 dev->trans_start = jiffies; 1169 dev_kfree_skb(skb); 1170 1171 return 0; 1172} 1173 1174static struct net_device_stats *lance_get_stats(struct net_device *dev) 1175{ 1176 struct lance_private *lp = netdev_priv(dev); 1177 1178 return &lp->stats; 1179} 1180 1181/* taken from the depca driver */ 1182static void lance_load_multicast(struct net_device *dev) 1183{ 1184 struct lance_private *lp = netdev_priv(dev); 1185 struct dev_mc_list *dmi = dev->mc_list; 1186 char *addrs; 1187 int i; 1188 u32 crc; 1189 u32 val; 1190 1191 /* set all multicast bits */ 1192 if (dev->flags & IFF_ALLMULTI) 1193 val = ~0; 1194 else 1195 val = 0; 1196 1197 if (lp->pio_buffer) { 1198 struct lance_init_block __iomem *ib = lp->init_block_iomem; 1199 sbus_writel(val, &ib->filter[0]); 1200 sbus_writel(val, &ib->filter[1]); 1201 } else { 1202 struct lance_init_block *ib = lp->init_block_mem; 1203 ib->filter [0] = val; 1204 ib->filter [1] = val; 1205 } 1206 1207 if (dev->flags & IFF_ALLMULTI) 1208 return; 1209 1210 /* Add addresses */ 1211 for (i = 0; i < dev->mc_count; i++) { 1212 addrs = dmi->dmi_addr; 1213 dmi = dmi->next; 1214 1215 /* multicast address? */ 1216 if (!(*addrs & 1)) 1217 continue; 1218 crc = ether_crc_le(6, addrs); 1219 crc = crc >> 26; 1220 if (lp->pio_buffer) { 1221 struct lance_init_block __iomem *ib = lp->init_block_iomem; 1222 u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter; 1223 u16 tmp = sbus_readw(&mcast_table[crc>>4]); 1224 tmp |= 1 << (crc & 0xf); 1225 sbus_writew(tmp, &mcast_table[crc>>4]); 1226 } else { 1227 struct lance_init_block *ib = lp->init_block_mem; 1228 u16 *mcast_table = (u16 *) &ib->filter; 1229 mcast_table [crc >> 4] |= 1 << (crc & 0xf); 1230 } 1231 } 1232} 1233 1234static void lance_set_multicast(struct net_device *dev) 1235{ 1236 struct lance_private *lp = netdev_priv(dev); 1237 struct lance_init_block *ib_mem = lp->init_block_mem; 1238 struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem; 1239 u16 mode; 1240 1241 if (!netif_running(dev)) 1242 return; 1243 1244 if (lp->tx_old != lp->tx_new) { 1245 mod_timer(&lp->multicast_timer, jiffies + 4); 1246 netif_wake_queue(dev); 1247 return; 1248 } 1249 1250 netif_stop_queue(dev); 1251 1252 STOP_LANCE(lp); 1253 lp->init_ring(dev); 1254 1255 if (lp->pio_buffer) 1256 mode = sbus_readw(&ib_iomem->mode); 1257 else 1258 mode = ib_mem->mode; 1259 if (dev->flags & IFF_PROMISC) { 1260 mode |= LE_MO_PROM; 1261 if (lp->pio_buffer) 1262 sbus_writew(mode, &ib_iomem->mode); 1263 else 1264 ib_mem->mode = mode; 1265 } else { 1266 mode &= ~LE_MO_PROM; 1267 if (lp->pio_buffer) 1268 sbus_writew(mode, &ib_iomem->mode); 1269 else 1270 ib_mem->mode = mode; 1271 lance_load_multicast(dev); 1272 } 1273 load_csrs(lp); 1274 init_restart_lance(lp); 1275 netif_wake_queue(dev); 1276} 1277 1278static void lance_set_multicast_retry(unsigned long _opaque) 1279{ 1280 struct net_device *dev = (struct net_device *) _opaque; 1281 1282 lance_set_multicast(dev); 1283} 1284 1285static void lance_free_hwresources(struct lance_private *lp) 1286{ 1287 if (lp->lregs) 1288 sbus_iounmap(lp->lregs, LANCE_REG_SIZE); 1289 if (lp->init_block_iomem) { 1290 sbus_iounmap(lp->init_block_iomem, 1291 sizeof(struct lance_init_block)); 1292 } else if (lp->init_block_mem) { 1293 sbus_free_consistent(lp->sdev, 1294 sizeof(struct lance_init_block), 1295 lp->init_block_mem, 1296 lp->init_block_dvma); 1297 } 1298} 1299 1300/* Ethtool support... */ 1301static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1302{ 1303 struct lance_private *lp = netdev_priv(dev); 1304 1305 strcpy(info->driver, "sunlance"); 1306 strcpy(info->version, "2.02"); 1307 sprintf(info->bus_info, "SBUS:%d", 1308 lp->sdev->slot); 1309} 1310 1311static u32 sparc_lance_get_link(struct net_device *dev) 1312{ 1313 /* We really do not keep track of this, but this 1314 * is better than not reporting anything at all. 1315 */ 1316 return 1; 1317} 1318 1319static const struct ethtool_ops sparc_lance_ethtool_ops = { 1320 .get_drvinfo = sparc_lance_get_drvinfo, 1321 .get_link = sparc_lance_get_link, 1322}; 1323 1324static int __devinit sparc_lance_probe_one(struct sbus_dev *sdev, 1325 struct sbus_dma *ledma, 1326 struct sbus_dev *lebuffer) 1327{ 1328 static unsigned version_printed; 1329 struct net_device *dev; 1330 struct lance_private *lp; 1331 int i; 1332 1333 dev = alloc_etherdev(sizeof(struct lance_private) + 8); 1334 if (!dev) 1335 return -ENOMEM; 1336 1337 lp = netdev_priv(dev); 1338 memset(lp, 0, sizeof(*lp)); 1339 1340 if (sparc_lance_debug && version_printed++ == 0) 1341 printk (KERN_INFO "%s", version); 1342 1343 spin_lock_init(&lp->lock); 1344 1345 /* Copy the IDPROM ethernet address to the device structure, later we 1346 * will copy the address in the device structure to the lance 1347 * initialization block. 1348 */ 1349 for (i = 0; i < 6; i++) 1350 dev->dev_addr[i] = idprom->id_ethaddr[i]; 1351 1352 /* Get the IO region */ 1353 lp->lregs = sbus_ioremap(&sdev->resource[0], 0, 1354 LANCE_REG_SIZE, lancestr); 1355 if (!lp->lregs) { 1356 printk(KERN_ERR "SunLance: Cannot map registers.\n"); 1357 goto fail; 1358 } 1359 1360 lp->sdev = sdev; 1361 if (lebuffer) { 1362 /* sanity check */ 1363 if (lebuffer->resource[0].start & 7) { 1364 printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n"); 1365 goto fail; 1366 } 1367 lp->init_block_iomem = 1368 sbus_ioremap(&lebuffer->resource[0], 0, 1369 sizeof(struct lance_init_block), "lebuffer"); 1370 if (!lp->init_block_iomem) { 1371 printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n"); 1372 goto fail; 1373 } 1374 lp->init_block_dvma = 0; 1375 lp->pio_buffer = 1; 1376 lp->init_ring = lance_init_ring_pio; 1377 lp->rx = lance_rx_pio; 1378 lp->tx = lance_tx_pio; 1379 } else { 1380 lp->init_block_mem = 1381 sbus_alloc_consistent(sdev, sizeof(struct lance_init_block), 1382 &lp->init_block_dvma); 1383 if (!lp->init_block_mem || lp->init_block_dvma == 0) { 1384 printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n"); 1385 goto fail; 1386 } 1387 lp->pio_buffer = 0; 1388 lp->init_ring = lance_init_ring_dvma; 1389 lp->rx = lance_rx_dvma; 1390 lp->tx = lance_tx_dvma; 1391 } 1392 lp->busmaster_regval = prom_getintdefault(sdev->prom_node, 1393 "busmaster-regval", 1394 (LE_C3_BSWP | LE_C3_ACON | 1395 LE_C3_BCON)); 1396 1397 lp->name = lancestr; 1398 lp->ledma = ledma; 1399 1400 lp->burst_sizes = 0; 1401 if (lp->ledma) { 1402 char prop[6]; 1403 unsigned int sbmask; 1404 u32 csr; 1405 1406 /* Find burst-size property for ledma */ 1407 lp->burst_sizes = prom_getintdefault(ledma->sdev->prom_node, 1408 "burst-sizes", 0); 1409 1410 /* ledma may be capable of fast bursts, but sbus may not. */ 1411 sbmask = prom_getintdefault(ledma->sdev->bus->prom_node, 1412 "burst-sizes", DMA_BURSTBITS); 1413 lp->burst_sizes &= sbmask; 1414 1415 /* Get the cable-selection property */ 1416 memset(prop, 0, sizeof(prop)); 1417 prom_getstring(ledma->sdev->prom_node, "cable-selection", 1418 prop, sizeof(prop)); 1419 if (prop[0] == 0) { 1420 int topnd, nd; 1421 1422 printk(KERN_INFO "SunLance: using auto-carrier-detection.\n"); 1423 1424 topnd = prom_getchild(prom_root_node); 1425 1426 nd = prom_searchsiblings(topnd, "options"); 1427 if (!nd) 1428 goto no_link_test; 1429 1430 if (!prom_node_has_property(nd, "tpe-link-test?")) 1431 goto no_link_test; 1432 1433 memset(prop, 0, sizeof(prop)); 1434 prom_getstring(nd, "tpe-link-test?", prop, 1435 sizeof(prop)); 1436 1437 if (strcmp(prop, "true")) { 1438 printk(KERN_NOTICE "SunLance: warning: overriding option " 1439 "'tpe-link-test?'\n"); 1440 printk(KERN_NOTICE "SunLance: warning: mail any problems " 1441 "to ecd@skynet.be\n"); 1442 auxio_set_lte(AUXIO_LTE_ON); 1443 } 1444no_link_test: 1445 lp->auto_select = 1; 1446 lp->tpe = 0; 1447 } else if (!strcmp(prop, "aui")) { 1448 lp->auto_select = 0; 1449 lp->tpe = 0; 1450 } else { 1451 lp->auto_select = 0; 1452 lp->tpe = 1; 1453 } 1454 1455 lp->dregs = ledma->regs; 1456 1457 /* Reset ledma */ 1458 csr = sbus_readl(lp->dregs + DMA_CSR); 1459 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); 1460 udelay(200); 1461 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); 1462 } else 1463 lp->dregs = NULL; 1464 1465 lp->dev = dev; 1466 SET_MODULE_OWNER(dev); 1467 SET_NETDEV_DEV(dev, &sdev->ofdev.dev); 1468 dev->open = &lance_open; 1469 dev->stop = &lance_close; 1470 dev->hard_start_xmit = &lance_start_xmit; 1471 dev->tx_timeout = &lance_tx_timeout; 1472 dev->watchdog_timeo = 5*HZ; 1473 dev->get_stats = &lance_get_stats; 1474 dev->set_multicast_list = &lance_set_multicast; 1475 dev->ethtool_ops = &sparc_lance_ethtool_ops; 1476 1477 dev->irq = sdev->irqs[0]; 1478 1479 dev->dma = 0; 1480 1481 /* We cannot sleep if the chip is busy during a 1482 * multicast list update event, because such events 1483 * can occur from interrupts (ex. IPv6). So we 1484 * use a timer to try again later when necessary. -DaveM 1485 */ 1486 init_timer(&lp->multicast_timer); 1487 lp->multicast_timer.data = (unsigned long) dev; 1488 lp->multicast_timer.function = &lance_set_multicast_retry; 1489 1490 if (register_netdev(dev)) { 1491 printk(KERN_ERR "SunLance: Cannot register device.\n"); 1492 goto fail; 1493 } 1494 1495 dev_set_drvdata(&sdev->ofdev.dev, lp); 1496 1497 printk(KERN_INFO "%s: LANCE ", dev->name); 1498 1499 for (i = 0; i < 6; i++) 1500 printk("%2.2x%c", dev->dev_addr[i], 1501 i == 5 ? ' ': ':'); 1502 printk("\n"); 1503 1504 return 0; 1505 1506fail: 1507 lance_free_hwresources(lp); 1508 free_netdev(dev); 1509 return -ENODEV; 1510} 1511 1512/* On 4m, find the associated dma for the lance chip */ 1513static struct sbus_dma * __devinit find_ledma(struct sbus_dev *sdev) 1514{ 1515 struct sbus_dma *p; 1516 1517 for_each_dvma(p) { 1518 if (p->sdev == sdev) 1519 return p; 1520 } 1521 return NULL; 1522} 1523 1524#ifdef CONFIG_SUN4 1525 1526#include <asm/sun4paddr.h> 1527#include <asm/machines.h> 1528 1529/* Find all the lance cards on the system and initialize them */ 1530static struct sbus_dev sun4_sdev; 1531static int __devinit sparc_lance_init(void) 1532{ 1533 if ((idprom->id_machtype == (SM_SUN4|SM_4_330)) || 1534 (idprom->id_machtype == (SM_SUN4|SM_4_470))) { 1535 memset(&sun4_sdev, 0, sizeof(struct sbus_dev)); 1536 sun4_sdev.reg_addrs[0].phys_addr = sun4_eth_physaddr; 1537 sun4_sdev.irqs[0] = 6; 1538 return sparc_lance_probe_one(&sun4_sdev, NULL, NULL); 1539 } 1540 return -ENODEV; 1541} 1542 1543static int __exit sunlance_sun4_remove(void) 1544{ 1545 struct lance_private *lp = dev_get_drvdata(&sun4_sdev.ofdev.dev); 1546 struct net_device *net_dev = lp->dev; 1547 1548 unregister_netdev(net_dev); 1549 1550 lance_free_hwresources(lp); 1551 1552 free_netdev(net_dev); 1553 1554 dev_set_drvdata(&sun4_sdev.ofdev.dev, NULL); 1555 1556 return 0; 1557} 1558 1559#else /* !CONFIG_SUN4 */ 1560 1561static int __devinit sunlance_sbus_probe(struct of_device *dev, const struct of_device_id *match) 1562{ 1563 struct sbus_dev *sdev = to_sbus_device(&dev->dev); 1564 int err; 1565 1566 if (sdev->parent) { 1567 struct of_device *parent = &sdev->parent->ofdev; 1568 1569 if (!strcmp(parent->node->name, "ledma")) { 1570 struct sbus_dma *ledma = find_ledma(to_sbus_device(&parent->dev)); 1571 1572 err = sparc_lance_probe_one(sdev, ledma, NULL); 1573 } else if (!strcmp(parent->node->name, "lebuffer")) { 1574 err = sparc_lance_probe_one(sdev, NULL, to_sbus_device(&parent->dev)); 1575 } else 1576 err = sparc_lance_probe_one(sdev, NULL, NULL); 1577 } else 1578 err = sparc_lance_probe_one(sdev, NULL, NULL); 1579 1580 return err; 1581} 1582 1583static int __devexit sunlance_sbus_remove(struct of_device *dev) 1584{ 1585 struct lance_private *lp = dev_get_drvdata(&dev->dev); 1586 struct net_device *net_dev = lp->dev; 1587 1588 unregister_netdev(net_dev); 1589 1590 lance_free_hwresources(lp); 1591 1592 free_netdev(net_dev); 1593 1594 dev_set_drvdata(&dev->dev, NULL); 1595 1596 return 0; 1597} 1598 1599static struct of_device_id sunlance_sbus_match[] = { 1600 { 1601 .name = "le", 1602 }, 1603 {}, 1604}; 1605 1606MODULE_DEVICE_TABLE(of, sunlance_sbus_match); 1607 1608static struct of_platform_driver sunlance_sbus_driver = { 1609 .name = "sunlance", 1610 .match_table = sunlance_sbus_match, 1611 .probe = sunlance_sbus_probe, 1612 .remove = __devexit_p(sunlance_sbus_remove), 1613}; 1614 1615 1616/* Find all the lance cards on the system and initialize them */ 1617static int __init sparc_lance_init(void) 1618{ 1619 return of_register_driver(&sunlance_sbus_driver, &sbus_bus_type); 1620} 1621#endif /* !CONFIG_SUN4 */ 1622 1623static void __exit sparc_lance_exit(void) 1624{ 1625#ifdef CONFIG_SUN4 1626 sunlance_sun4_remove(); 1627#else 1628 of_unregister_driver(&sunlance_sbus_driver); 1629#endif 1630} 1631 1632module_init(sparc_lance_init); 1633module_exit(sparc_lance_exit); 1634