1/******************************************************************************* 2 3 Intel PRO/10GbE Linux driver 4 Copyright(c) 1999 - 2006 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27*******************************************************************************/ 28 29/* glue for the OS independent part of ixgb 30 * includes register access macros 31 */ 32 33#ifndef _IXGB_OSDEP_H_ 34#define _IXGB_OSDEP_H_ 35 36#include <linux/types.h> 37#include <linux/delay.h> 38#include <asm/io.h> 39#include <linux/interrupt.h> 40#include <linux/sched.h> 41 42typedef enum { 43#undef FALSE 44 FALSE = 0, 45#undef TRUE 46 TRUE = 1 47} boolean_t; 48 49#undef ASSERT 50#define ASSERT(x) if(!(x)) BUG() 51#define MSGOUT(S, A, B) printk(KERN_DEBUG S "\n", A, B) 52 53#ifdef DBG 54#define DEBUGOUT(S) printk(KERN_DEBUG S "\n") 55#define DEBUGOUT1(S, A...) printk(KERN_DEBUG S "\n", A) 56#else 57#define DEBUGOUT(S) 58#define DEBUGOUT1(S, A...) 59#endif 60 61#define DEBUGFUNC(F) DEBUGOUT(F) 62#define DEBUGOUT2 DEBUGOUT1 63#define DEBUGOUT3 DEBUGOUT2 64#define DEBUGOUT7 DEBUGOUT3 65 66#define IXGB_WRITE_REG(a, reg, value) ( \ 67 writel((value), ((a)->hw_addr + IXGB_##reg))) 68 69#define IXGB_READ_REG(a, reg) ( \ 70 readl((a)->hw_addr + IXGB_##reg)) 71 72#define IXGB_WRITE_REG_ARRAY(a, reg, offset, value) ( \ 73 writel((value), ((a)->hw_addr + IXGB_##reg + ((offset) << 2)))) 74 75#define IXGB_READ_REG_ARRAY(a, reg, offset) ( \ 76 readl((a)->hw_addr + IXGB_##reg + ((offset) << 2))) 77 78#define IXGB_WRITE_FLUSH(a) IXGB_READ_REG(a, STATUS) 79 80#define IXGB_MEMCPY memcpy 81 82#endif /* _IXGB_OSDEP_H_ */ 83