1/* 2 * drivers/net/ibm_emac/ibm_emac_core.h 3 * 4 * Driver for PowerPC 4xx on-chip ethernet controller. 5 * 6 * Copyright (c) 2004, 2005 Zultys Technologies. 7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> 8 * 9 * Based on original work by 10 * Armin Kuster <akuster@mvista.com> 11 * Johnnie Peters <jpeters@mvista.com> 12 * Copyright 2000, 2001 MontaVista Softare Inc. 13 * 14 * This program is free software; you can redistribute it and/or modify it 15 * under the terms of the GNU General Public License as published by the 16 * Free Software Foundation; either version 2 of the License, or (at your 17 * option) any later version. 18 * 19 */ 20#ifndef __IBM_EMAC_CORE_H_ 21#define __IBM_EMAC_CORE_H_ 22 23#include <linux/netdevice.h> 24#include <linux/dma-mapping.h> 25#include <asm/ocp.h> 26 27#include "ibm_emac.h" 28#include "ibm_emac_phy.h" 29#include "ibm_emac_zmii.h" 30#include "ibm_emac_rgmii.h" 31#include "ibm_emac_mal.h" 32#include "ibm_emac_tah.h" 33 34#define NUM_TX_BUFF CONFIG_IBM_EMAC_TXB 35#define NUM_RX_BUFF CONFIG_IBM_EMAC_RXB 36 37/* Simple sanity check */ 38#if NUM_TX_BUFF > 256 || NUM_RX_BUFF > 256 39#error Invalid number of buffer descriptors (greater than 256) 40#endif 41 42#define EMAC_MIN_MTU 46 43#define EMAC_MAX_MTU 9000 44 45/* Maximum L2 header length (VLAN tagged, no FCS) */ 46#define EMAC_MTU_OVERHEAD (6 * 2 + 2 + 4) 47 48/* RX BD size for the given MTU */ 49static inline int emac_rx_size(int mtu) 50{ 51 if (mtu > ETH_DATA_LEN) 52 return MAL_MAX_RX_SIZE; 53 else 54 return mal_rx_size(ETH_DATA_LEN + EMAC_MTU_OVERHEAD); 55} 56 57#define EMAC_DMA_ALIGN(x) ALIGN((x), dma_get_cache_alignment()) 58 59#define EMAC_RX_SKB_HEADROOM \ 60 EMAC_DMA_ALIGN(CONFIG_IBM_EMAC_RX_SKB_HEADROOM) 61 62/* Size of RX skb for the given MTU */ 63static inline int emac_rx_skb_size(int mtu) 64{ 65 int size = max(mtu + EMAC_MTU_OVERHEAD, emac_rx_size(mtu)); 66 return EMAC_DMA_ALIGN(size + 2) + EMAC_RX_SKB_HEADROOM; 67} 68 69/* RX DMA sync size */ 70static inline int emac_rx_sync_size(int mtu) 71{ 72 return EMAC_DMA_ALIGN(emac_rx_size(mtu) + 2); 73} 74 75/* Driver statistcs is split into two parts to make it more cache friendly: 76 * - normal statistics (packet count, etc) 77 * - error statistics 78 * 79 * When statistics is requested by ethtool, these parts are concatenated, 80 * normal one goes first. 81 * 82 * Please, keep these structures in sync with emac_stats_keys. 83 */ 84 85/* Normal TX/RX Statistics */ 86struct ibm_emac_stats { 87 u64 rx_packets; 88 u64 rx_bytes; 89 u64 tx_packets; 90 u64 tx_bytes; 91 u64 rx_packets_csum; 92 u64 tx_packets_csum; 93}; 94 95/* Error statistics */ 96struct ibm_emac_error_stats { 97 u64 tx_undo; 98 99 /* Software RX Errors */ 100 u64 rx_dropped_stack; 101 u64 rx_dropped_oom; 102 u64 rx_dropped_error; 103 u64 rx_dropped_resize; 104 u64 rx_dropped_mtu; 105 u64 rx_stopped; 106 /* BD reported RX errors */ 107 u64 rx_bd_errors; 108 u64 rx_bd_overrun; 109 u64 rx_bd_bad_packet; 110 u64 rx_bd_runt_packet; 111 u64 rx_bd_short_event; 112 u64 rx_bd_alignment_error; 113 u64 rx_bd_bad_fcs; 114 u64 rx_bd_packet_too_long; 115 u64 rx_bd_out_of_range; 116 u64 rx_bd_in_range; 117 /* EMAC IRQ reported RX errors */ 118 u64 rx_parity; 119 u64 rx_fifo_overrun; 120 u64 rx_overrun; 121 u64 rx_bad_packet; 122 u64 rx_runt_packet; 123 u64 rx_short_event; 124 u64 rx_alignment_error; 125 u64 rx_bad_fcs; 126 u64 rx_packet_too_long; 127 u64 rx_out_of_range; 128 u64 rx_in_range; 129 130 /* Software TX Errors */ 131 u64 tx_dropped; 132 /* BD reported TX errors */ 133 u64 tx_bd_errors; 134 u64 tx_bd_bad_fcs; 135 u64 tx_bd_carrier_loss; 136 u64 tx_bd_excessive_deferral; 137 u64 tx_bd_excessive_collisions; 138 u64 tx_bd_late_collision; 139 u64 tx_bd_multple_collisions; 140 u64 tx_bd_single_collision; 141 u64 tx_bd_underrun; 142 u64 tx_bd_sqe; 143 /* EMAC IRQ reported TX errors */ 144 u64 tx_parity; 145 u64 tx_underrun; 146 u64 tx_sqe; 147 u64 tx_errors; 148}; 149 150#define EMAC_ETHTOOL_STATS_COUNT ((sizeof(struct ibm_emac_stats) + \ 151 sizeof(struct ibm_emac_error_stats)) \ 152 / sizeof(u64)) 153 154struct ocp_enet_private { 155 struct net_device *ndev; /* 0 */ 156 struct emac_regs __iomem *emacp; 157 158 struct mal_descriptor *tx_desc; 159 int tx_cnt; 160 int tx_slot; 161 int ack_slot; 162 163 struct mal_descriptor *rx_desc; 164 int rx_slot; 165 struct sk_buff *rx_sg_skb; /* 1 */ 166 int rx_skb_size; 167 int rx_sync_size; 168 169 struct ibm_emac_stats stats; 170 struct ocp_device *tah_dev; 171 172 struct ibm_ocp_mal *mal; 173 struct mal_commac commac; 174 175 struct sk_buff *tx_skb[NUM_TX_BUFF]; 176 struct sk_buff *rx_skb[NUM_RX_BUFF]; 177 178 struct ocp_device *zmii_dev; 179 int zmii_input; 180 struct ocp_enet_private *mdio_dev; 181 struct ocp_device *rgmii_dev; 182 int rgmii_input; 183 184 struct ocp_def *def; 185 186 struct mii_phy phy; 187 struct timer_list link_timer; 188 int reset_failed; 189 190 int stop_timeout; /* in us */ 191 192 struct ibm_emac_error_stats estats; 193 struct net_device_stats nstats; 194 195 struct device* ldev; 196}; 197 198/* Ethtool get_regs complex data. 199 * We want to get not just EMAC registers, but also MAL, ZMII, RGMII, TAH 200 * when available. 201 * 202 * Returned BLOB consists of the ibm_emac_ethtool_regs_hdr, 203 * MAL registers, EMAC registers and optional ZMII, RGMII, TAH registers. 204 * Each register component is preceded with emac_ethtool_regs_subhdr. 205 * Order of the optional headers follows their relative bit posititions 206 * in emac_ethtool_regs_hdr.components 207 */ 208#define EMAC_ETHTOOL_REGS_ZMII 0x00000001 209#define EMAC_ETHTOOL_REGS_RGMII 0x00000002 210#define EMAC_ETHTOOL_REGS_TAH 0x00000004 211 212struct emac_ethtool_regs_hdr { 213 u32 components; 214}; 215 216struct emac_ethtool_regs_subhdr { 217 u32 version; 218 u32 index; 219}; 220 221#endif /* __IBM_EMAC_CORE_H_ */ 222