1/* 2 * linux/drivers/mtd/onenand/onenand_base.c 3 * 4 * Copyright (C) 2005-2007 Samsung Electronics 5 * Kyungmin Park <kyungmin.park@samsung.com> 6 * 7 * Credits: 8 * Adrian Hunter <ext-adrian.hunter@nokia.com>: 9 * auto-placement support, read-while load support, various fixes 10 * Copyright (C) Nokia Corporation, 2007 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License version 2 as 14 * published by the Free Software Foundation. 15 */ 16 17#include <linux/kernel.h> 18#include <linux/module.h> 19#include <linux/init.h> 20#include <linux/sched.h> 21#include <linux/interrupt.h> 22#include <linux/jiffies.h> 23#include <linux/mtd/mtd.h> 24#include <linux/mtd/onenand.h> 25#include <linux/mtd/partitions.h> 26 27#include <asm/io.h> 28 29/** 30 * onenand_oob_64 - oob info for large (2KB) page 31 */ 32static struct nand_ecclayout onenand_oob_64 = { 33 .eccbytes = 20, 34 .eccpos = { 35 8, 9, 10, 11, 12, 36 24, 25, 26, 27, 28, 37 40, 41, 42, 43, 44, 38 56, 57, 58, 59, 60, 39 }, 40 .oobfree = { 41 {2, 3}, {14, 2}, {18, 3}, {30, 2}, 42 {34, 3}, {46, 2}, {50, 3}, {62, 2} 43 } 44}; 45 46/** 47 * onenand_oob_32 - oob info for middle (1KB) page 48 */ 49static struct nand_ecclayout onenand_oob_32 = { 50 .eccbytes = 10, 51 .eccpos = { 52 8, 9, 10, 11, 12, 53 24, 25, 26, 27, 28, 54 }, 55 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} } 56}; 57 58static const unsigned char ffchars[] = { 59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ 61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 62 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ 63 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 64 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ 65 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 66 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ 67}; 68 69/** 70 * onenand_readw - [OneNAND Interface] Read OneNAND register 71 * @param addr address to read 72 * 73 * Read OneNAND register 74 */ 75static unsigned short onenand_readw(void __iomem *addr) 76{ 77 return readw(addr); 78} 79 80/** 81 * onenand_writew - [OneNAND Interface] Write OneNAND register with value 82 * @param value value to write 83 * @param addr address to write 84 * 85 * Write OneNAND register with value 86 */ 87static void onenand_writew(unsigned short value, void __iomem *addr) 88{ 89 writew(value, addr); 90} 91 92/** 93 * onenand_block_address - [DEFAULT] Get block address 94 * @param this onenand chip data structure 95 * @param block the block 96 * @return translated block address if DDP, otherwise same 97 * 98 * Setup Start Address 1 Register (F100h) 99 */ 100static int onenand_block_address(struct onenand_chip *this, int block) 101{ 102 /* Device Flash Core select, NAND Flash Block Address */ 103 if (block & this->density_mask) 104 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask); 105 106 return block; 107} 108 109/** 110 * onenand_bufferram_address - [DEFAULT] Get bufferram address 111 * @param this onenand chip data structure 112 * @param block the block 113 * @return set DBS value if DDP, otherwise 0 114 * 115 * Setup Start Address 2 Register (F101h) for DDP 116 */ 117static int onenand_bufferram_address(struct onenand_chip *this, int block) 118{ 119 /* Device BufferRAM Select */ 120 if (block & this->density_mask) 121 return ONENAND_DDP_CHIP1; 122 123 return ONENAND_DDP_CHIP0; 124} 125 126/** 127 * onenand_page_address - [DEFAULT] Get page address 128 * @param page the page address 129 * @param sector the sector address 130 * @return combined page and sector address 131 * 132 * Setup Start Address 8 Register (F107h) 133 */ 134static int onenand_page_address(int page, int sector) 135{ 136 /* Flash Page Address, Flash Sector Address */ 137 int fpa, fsa; 138 139 fpa = page & ONENAND_FPA_MASK; 140 fsa = sector & ONENAND_FSA_MASK; 141 142 return ((fpa << ONENAND_FPA_SHIFT) | fsa); 143} 144 145/** 146 * onenand_buffer_address - [DEFAULT] Get buffer address 147 * @param dataram1 DataRAM index 148 * @param sectors the sector address 149 * @param count the number of sectors 150 * @return the start buffer value 151 * 152 * Setup Start Buffer Register (F200h) 153 */ 154static int onenand_buffer_address(int dataram1, int sectors, int count) 155{ 156 int bsa, bsc; 157 158 /* BufferRAM Sector Address */ 159 bsa = sectors & ONENAND_BSA_MASK; 160 161 if (dataram1) 162 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ 163 else 164 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ 165 166 /* BufferRAM Sector Count */ 167 bsc = count & ONENAND_BSC_MASK; 168 169 return ((bsa << ONENAND_BSA_SHIFT) | bsc); 170} 171 172/** 173 * onenand_command - [DEFAULT] Send command to OneNAND device 174 * @param mtd MTD device structure 175 * @param cmd the command to be sent 176 * @param addr offset to read from or write to 177 * @param len number of bytes to read or write 178 * 179 * Send command to OneNAND device. This function is used for middle/large page 180 * devices (1KB/2KB Bytes per page) 181 */ 182static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len) 183{ 184 struct onenand_chip *this = mtd->priv; 185 int value, readcmd = 0, block_cmd = 0; 186 int block, page; 187 188 /* Address translation */ 189 switch (cmd) { 190 case ONENAND_CMD_UNLOCK: 191 case ONENAND_CMD_LOCK: 192 case ONENAND_CMD_LOCK_TIGHT: 193 case ONENAND_CMD_UNLOCK_ALL: 194 block = -1; 195 page = -1; 196 break; 197 198 case ONENAND_CMD_ERASE: 199 case ONENAND_CMD_BUFFERRAM: 200 case ONENAND_CMD_OTP_ACCESS: 201 block_cmd = 1; 202 block = (int) (addr >> this->erase_shift); 203 page = -1; 204 break; 205 206 default: 207 block = (int) (addr >> this->erase_shift); 208 page = (int) (addr >> this->page_shift); 209 page &= this->page_mask; 210 break; 211 } 212 213 /* NOTE: The setting order of the registers is very important! */ 214 if (cmd == ONENAND_CMD_BUFFERRAM) { 215 /* Select DataRAM for DDP */ 216 value = onenand_bufferram_address(this, block); 217 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 218 219 /* Switch to the next data buffer */ 220 ONENAND_SET_NEXT_BUFFERRAM(this); 221 222 return 0; 223 } 224 225 if (block != -1) { 226 /* Write 'DFS, FBA' of Flash */ 227 value = onenand_block_address(this, block); 228 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 229 230 if (block_cmd) { 231 /* Select DataRAM for DDP */ 232 value = onenand_bufferram_address(this, block); 233 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 234 } 235 } 236 237 if (page != -1) { 238 /* Now we use page size operation */ 239 int sectors = 4, count = 4; 240 int dataram; 241 242 switch (cmd) { 243 case ONENAND_CMD_READ: 244 case ONENAND_CMD_READOOB: 245 dataram = ONENAND_SET_NEXT_BUFFERRAM(this); 246 readcmd = 1; 247 break; 248 249 default: 250 dataram = ONENAND_CURRENT_BUFFERRAM(this); 251 break; 252 } 253 254 /* Write 'FPA, FSA' of Flash */ 255 value = onenand_page_address(page, sectors); 256 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8); 257 258 /* Write 'BSA, BSC' of DataRAM */ 259 value = onenand_buffer_address(dataram, sectors, count); 260 this->write_word(value, this->base + ONENAND_REG_START_BUFFER); 261 262 if (readcmd) { 263 /* Select DataRAM for DDP */ 264 value = onenand_bufferram_address(this, block); 265 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 266 } 267 } 268 269 /* Interrupt clear */ 270 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); 271 272 /* Write command */ 273 this->write_word(cmd, this->base + ONENAND_REG_COMMAND); 274 275 return 0; 276} 277 278/** 279 * onenand_wait - [DEFAULT] wait until the command is done 280 * @param mtd MTD device structure 281 * @param state state to select the max. timeout value 282 * 283 * Wait for command done. This applies to all OneNAND command 284 * Read can take up to 30us, erase up to 2ms and program up to 350us 285 * according to general OneNAND specs 286 */ 287static int onenand_wait(struct mtd_info *mtd, int state) 288{ 289 struct onenand_chip * this = mtd->priv; 290 unsigned long timeout; 291 unsigned int flags = ONENAND_INT_MASTER; 292 unsigned int interrupt = 0; 293 unsigned int ctrl; 294 295 /* The 20 msec is enough */ 296 timeout = jiffies + msecs_to_jiffies(20); 297 while (time_before(jiffies, timeout)) { 298 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 299 300 if (interrupt & flags) 301 break; 302 303 if (state != FL_READING) 304 cond_resched(); 305 } 306 /* To get correct interrupt status in timeout case */ 307 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 308 309 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 310 311 if (ctrl & ONENAND_CTRL_ERROR) { 312 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl); 313 if (ctrl & ONENAND_CTRL_LOCK) 314 printk(KERN_ERR "onenand_wait: it's locked error.\n"); 315 return ctrl; 316 } 317 318 if (interrupt & ONENAND_INT_READ) { 319 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS); 320 if (ecc) { 321 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc); 322 if (ecc & ONENAND_ECC_2BIT_ALL) { 323 mtd->ecc_stats.failed++; 324 return ecc; 325 } else if (ecc & ONENAND_ECC_1BIT_ALL) 326 mtd->ecc_stats.corrected++; 327 } 328 } else if (state == FL_READING) { 329 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt); 330 return -EIO; 331 } 332 333 return 0; 334} 335 336/* 337 * onenand_interrupt - [DEFAULT] onenand interrupt handler 338 * @param irq onenand interrupt number 339 * @param dev_id interrupt data 340 * 341 * complete the work 342 */ 343static irqreturn_t onenand_interrupt(int irq, void *data) 344{ 345 struct onenand_chip *this = (struct onenand_chip *) data; 346 347 /* To handle shared interrupt */ 348 if (!this->complete.done) 349 complete(&this->complete); 350 351 return IRQ_HANDLED; 352} 353 354/* 355 * onenand_interrupt_wait - [DEFAULT] wait until the command is done 356 * @param mtd MTD device structure 357 * @param state state to select the max. timeout value 358 * 359 * Wait for command done. 360 */ 361static int onenand_interrupt_wait(struct mtd_info *mtd, int state) 362{ 363 struct onenand_chip *this = mtd->priv; 364 365 wait_for_completion(&this->complete); 366 367 return onenand_wait(mtd, state); 368} 369 370/* 371 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait 372 * @param mtd MTD device structure 373 * @param state state to select the max. timeout value 374 * 375 * Try interrupt based wait (It is used one-time) 376 */ 377static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state) 378{ 379 struct onenand_chip *this = mtd->priv; 380 unsigned long remain, timeout; 381 382 /* We use interrupt wait first */ 383 this->wait = onenand_interrupt_wait; 384 385 timeout = msecs_to_jiffies(100); 386 remain = wait_for_completion_timeout(&this->complete, timeout); 387 if (!remain) { 388 printk(KERN_INFO "OneNAND: There's no interrupt. " 389 "We use the normal wait\n"); 390 391 /* Release the irq */ 392 free_irq(this->irq, this); 393 394 this->wait = onenand_wait; 395 } 396 397 return onenand_wait(mtd, state); 398} 399 400/* 401 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method 402 * @param mtd MTD device structure 403 * 404 * There's two method to wait onenand work 405 * 1. polling - read interrupt status register 406 * 2. interrupt - use the kernel interrupt method 407 */ 408static void onenand_setup_wait(struct mtd_info *mtd) 409{ 410 struct onenand_chip *this = mtd->priv; 411 int syscfg; 412 413 init_completion(&this->complete); 414 415 if (this->irq <= 0) { 416 this->wait = onenand_wait; 417 return; 418 } 419 420 if (request_irq(this->irq, &onenand_interrupt, 421 IRQF_SHARED, "onenand", this)) { 422 /* If we can't get irq, use the normal wait */ 423 this->wait = onenand_wait; 424 return; 425 } 426 427 /* Enable interrupt */ 428 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 429 syscfg |= ONENAND_SYS_CFG1_IOBE; 430 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 431 432 this->wait = onenand_try_interrupt_wait; 433} 434 435/** 436 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset 437 * @param mtd MTD data structure 438 * @param area BufferRAM area 439 * @return offset given area 440 * 441 * Return BufferRAM offset given area 442 */ 443static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) 444{ 445 struct onenand_chip *this = mtd->priv; 446 447 if (ONENAND_CURRENT_BUFFERRAM(this)) { 448 if (area == ONENAND_DATARAM) 449 return mtd->writesize; 450 if (area == ONENAND_SPARERAM) 451 return mtd->oobsize; 452 } 453 454 return 0; 455} 456 457/** 458 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area 459 * @param mtd MTD data structure 460 * @param area BufferRAM area 461 * @param buffer the databuffer to put/get data 462 * @param offset offset to read from or write to 463 * @param count number of bytes to read/write 464 * 465 * Read the BufferRAM area 466 */ 467static int onenand_read_bufferram(struct mtd_info *mtd, int area, 468 unsigned char *buffer, int offset, size_t count) 469{ 470 struct onenand_chip *this = mtd->priv; 471 void __iomem *bufferram; 472 473 bufferram = this->base + area; 474 475 bufferram += onenand_bufferram_offset(mtd, area); 476 477 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 478 unsigned short word; 479 480 /* Align with word(16-bit) size */ 481 count--; 482 483 /* Read word and save byte */ 484 word = this->read_word(bufferram + offset + count); 485 buffer[count] = (word & 0xff); 486 } 487 488 memcpy(buffer, bufferram + offset, count); 489 490 return 0; 491} 492 493/** 494 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode 495 * @param mtd MTD data structure 496 * @param area BufferRAM area 497 * @param buffer the databuffer to put/get data 498 * @param offset offset to read from or write to 499 * @param count number of bytes to read/write 500 * 501 * Read the BufferRAM area with Sync. Burst Mode 502 */ 503static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, 504 unsigned char *buffer, int offset, size_t count) 505{ 506 struct onenand_chip *this = mtd->priv; 507 void __iomem *bufferram; 508 509 bufferram = this->base + area; 510 511 bufferram += onenand_bufferram_offset(mtd, area); 512 513 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); 514 515 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 516 unsigned short word; 517 518 /* Align with word(16-bit) size */ 519 count--; 520 521 /* Read word and save byte */ 522 word = this->read_word(bufferram + offset + count); 523 buffer[count] = (word & 0xff); 524 } 525 526 memcpy(buffer, bufferram + offset, count); 527 528 this->mmcontrol(mtd, 0); 529 530 return 0; 531} 532 533/** 534 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area 535 * @param mtd MTD data structure 536 * @param area BufferRAM area 537 * @param buffer the databuffer to put/get data 538 * @param offset offset to read from or write to 539 * @param count number of bytes to read/write 540 * 541 * Write the BufferRAM area 542 */ 543static int onenand_write_bufferram(struct mtd_info *mtd, int area, 544 const unsigned char *buffer, int offset, size_t count) 545{ 546 struct onenand_chip *this = mtd->priv; 547 void __iomem *bufferram; 548 549 bufferram = this->base + area; 550 551 bufferram += onenand_bufferram_offset(mtd, area); 552 553 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 554 unsigned short word; 555 int byte_offset; 556 557 /* Align with word(16-bit) size */ 558 count--; 559 560 /* Calculate byte access offset */ 561 byte_offset = offset + count; 562 563 /* Read word and save byte */ 564 word = this->read_word(bufferram + byte_offset); 565 word = (word & ~0xff) | buffer[count]; 566 this->write_word(word, bufferram + byte_offset); 567 } 568 569 memcpy(bufferram + offset, buffer, count); 570 571 return 0; 572} 573 574/** 575 * onenand_check_bufferram - [GENERIC] Check BufferRAM information 576 * @param mtd MTD data structure 577 * @param addr address to check 578 * @return 1 if there are valid data, otherwise 0 579 * 580 * Check bufferram if there is data we required 581 */ 582static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) 583{ 584 struct onenand_chip *this = mtd->priv; 585 int blockpage, found = 0; 586 unsigned int i; 587 588 blockpage = (int) (addr >> this->page_shift); 589 590 /* Is there valid data? */ 591 i = ONENAND_CURRENT_BUFFERRAM(this); 592 if (this->bufferram[i].blockpage == blockpage) 593 found = 1; 594 else { 595 /* Check another BufferRAM */ 596 i = ONENAND_NEXT_BUFFERRAM(this); 597 if (this->bufferram[i].blockpage == blockpage) { 598 ONENAND_SET_NEXT_BUFFERRAM(this); 599 found = 1; 600 } 601 } 602 603 if (found && ONENAND_IS_DDP(this)) { 604 /* Select DataRAM for DDP */ 605 int block = (int) (addr >> this->erase_shift); 606 int value = onenand_bufferram_address(this, block); 607 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 608 } 609 610 return found; 611} 612 613/** 614 * onenand_update_bufferram - [GENERIC] Update BufferRAM information 615 * @param mtd MTD data structure 616 * @param addr address to update 617 * @param valid valid flag 618 * 619 * Update BufferRAM information 620 */ 621static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, 622 int valid) 623{ 624 struct onenand_chip *this = mtd->priv; 625 int blockpage; 626 unsigned int i; 627 628 blockpage = (int) (addr >> this->page_shift); 629 630 /* Invalidate another BufferRAM */ 631 i = ONENAND_NEXT_BUFFERRAM(this); 632 if (this->bufferram[i].blockpage == blockpage) 633 this->bufferram[i].blockpage = -1; 634 635 /* Update BufferRAM */ 636 i = ONENAND_CURRENT_BUFFERRAM(this); 637 if (valid) 638 this->bufferram[i].blockpage = blockpage; 639 else 640 this->bufferram[i].blockpage = -1; 641} 642 643/** 644 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information 645 * @param mtd MTD data structure 646 * @param addr start address to invalidate 647 * @param len length to invalidate 648 * 649 * Invalidate BufferRAM information 650 */ 651static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr, 652 unsigned int len) 653{ 654 struct onenand_chip *this = mtd->priv; 655 int i; 656 loff_t end_addr = addr + len; 657 658 /* Invalidate BufferRAM */ 659 for (i = 0; i < MAX_BUFFERRAM; i++) { 660 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift; 661 if (buf_addr >= addr && buf_addr < end_addr) 662 this->bufferram[i].blockpage = -1; 663 } 664} 665 666/** 667 * onenand_get_device - [GENERIC] Get chip for selected access 668 * @param mtd MTD device structure 669 * @param new_state the state which is requested 670 * 671 * Get the device and lock it for exclusive access 672 */ 673static int onenand_get_device(struct mtd_info *mtd, int new_state) 674{ 675 struct onenand_chip *this = mtd->priv; 676 DECLARE_WAITQUEUE(wait, current); 677 678 /* 679 * Grab the lock and see if the device is available 680 */ 681 while (1) { 682 spin_lock(&this->chip_lock); 683 if (this->state == FL_READY) { 684 this->state = new_state; 685 spin_unlock(&this->chip_lock); 686 break; 687 } 688 if (new_state == FL_PM_SUSPENDED) { 689 spin_unlock(&this->chip_lock); 690 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; 691 } 692 set_current_state(TASK_UNINTERRUPTIBLE); 693 add_wait_queue(&this->wq, &wait); 694 spin_unlock(&this->chip_lock); 695 schedule(); 696 remove_wait_queue(&this->wq, &wait); 697 } 698 699 return 0; 700} 701 702/** 703 * onenand_release_device - [GENERIC] release chip 704 * @param mtd MTD device structure 705 * 706 * Deselect, release chip lock and wake up anyone waiting on the device 707 */ 708static void onenand_release_device(struct mtd_info *mtd) 709{ 710 struct onenand_chip *this = mtd->priv; 711 712 /* Release the chip */ 713 spin_lock(&this->chip_lock); 714 this->state = FL_READY; 715 wake_up(&this->wq); 716 spin_unlock(&this->chip_lock); 717} 718 719/** 720 * onenand_read - [MTD Interface] Read data from flash 721 * @param mtd MTD device structure 722 * @param from offset to read from 723 * @param len number of bytes to read 724 * @param retlen pointer to variable to store the number of read bytes 725 * @param buf the databuffer to put data 726 * 727 * Read with ecc 728*/ 729static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, 730 size_t *retlen, u_char *buf) 731{ 732 struct onenand_chip *this = mtd->priv; 733 struct mtd_ecc_stats stats; 734 int read = 0, column; 735 int thislen; 736 int ret = 0, boundary = 0; 737 738 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); 739 740 /* Do not allow reads past end of device */ 741 if ((from + len) > mtd->size) { 742 printk(KERN_ERR "onenand_read: Attempt read beyond end of device\n"); 743 *retlen = 0; 744 return -EINVAL; 745 } 746 747 /* Grab the lock and see if the device is available */ 748 onenand_get_device(mtd, FL_READING); 749 750 stats = mtd->ecc_stats; 751 752 /* Read-while-load method */ 753 754 /* Do first load to bufferRAM */ 755 if (read < len) { 756 if (!onenand_check_bufferram(mtd, from)) { 757 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize); 758 ret = this->wait(mtd, FL_READING); 759 onenand_update_bufferram(mtd, from, !ret); 760 } 761 } 762 763 thislen = min_t(int, mtd->writesize, len - read); 764 column = from & (mtd->writesize - 1); 765 if (column + thislen > mtd->writesize) 766 thislen = mtd->writesize - column; 767 768 while (!ret) { 769 /* If there is more to load then start next load */ 770 from += thislen; 771 if (read + thislen < len) { 772 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize); 773 /* 774 * Chip boundary handling in DDP 775 * Now we issued chip 1 read and pointed chip 1 776 * bufferam so we have to point chip 0 bufferam. 777 */ 778 if (ONENAND_IS_DDP(this) && 779 unlikely(from == (this->chipsize >> 1))) { 780 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2); 781 boundary = 1; 782 } else 783 boundary = 0; 784 ONENAND_SET_PREV_BUFFERRAM(this); 785 } 786 /* While load is going, read from last bufferRAM */ 787 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); 788 /* See if we are done */ 789 read += thislen; 790 if (read == len) 791 break; 792 /* Set up for next read from bufferRAM */ 793 if (unlikely(boundary)) 794 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2); 795 ONENAND_SET_NEXT_BUFFERRAM(this); 796 buf += thislen; 797 thislen = min_t(int, mtd->writesize, len - read); 798 column = 0; 799 cond_resched(); 800 /* Now wait for load */ 801 ret = this->wait(mtd, FL_READING); 802 onenand_update_bufferram(mtd, from, !ret); 803 } 804 805 /* Deselect and wake up anyone waiting on the device */ 806 onenand_release_device(mtd); 807 808 /* 809 * Return success, if no ECC failures, else -EBADMSG 810 * fs driver will take care of that, because 811 * retlen == desired len and result == -EBADMSG 812 */ 813 *retlen = read; 814 815 if (mtd->ecc_stats.failed - stats.failed) 816 return -EBADMSG; 817 818 if (ret) 819 return ret; 820 821 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; 822} 823 824/** 825 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer 826 * @param mtd MTD device structure 827 * @param buf destination address 828 * @param column oob offset to read from 829 * @param thislen oob length to read 830 */ 831static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column, 832 int thislen) 833{ 834 struct onenand_chip *this = mtd->priv; 835 struct nand_oobfree *free; 836 int readcol = column; 837 int readend = column + thislen; 838 int lastgap = 0; 839 unsigned int i; 840 uint8_t *oob_buf = this->oob_buf; 841 842 free = this->ecclayout->oobfree; 843 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 844 if (readcol >= lastgap) 845 readcol += free->offset - lastgap; 846 if (readend >= lastgap) 847 readend += free->offset - lastgap; 848 lastgap = free->offset + free->length; 849 } 850 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); 851 free = this->ecclayout->oobfree; 852 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 853 int free_end = free->offset + free->length; 854 if (free->offset < readend && free_end > readcol) { 855 int st = max_t(int,free->offset,readcol); 856 int ed = min_t(int,free_end,readend); 857 int n = ed - st; 858 memcpy(buf, oob_buf + st, n); 859 buf += n; 860 } else if (column == 0) 861 break; 862 } 863 return 0; 864} 865 866/** 867 * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band 868 * @param mtd MTD device structure 869 * @param from offset to read from 870 * @param len number of bytes to read 871 * @param retlen pointer to variable to store the number of read bytes 872 * @param buf the databuffer to put data 873 * @param mode operation mode 874 * 875 * OneNAND read out-of-band data from the spare area 876 */ 877static int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len, 878 size_t *retlen, u_char *buf, mtd_oob_mode_t mode) 879{ 880 struct onenand_chip *this = mtd->priv; 881 int read = 0, thislen, column, oobsize; 882 int ret = 0; 883 884 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); 885 886 /* Initialize return length value */ 887 *retlen = 0; 888 889 if (mode == MTD_OOB_AUTO) 890 oobsize = this->ecclayout->oobavail; 891 else 892 oobsize = mtd->oobsize; 893 894 column = from & (mtd->oobsize - 1); 895 896 if (unlikely(column >= oobsize)) { 897 printk(KERN_ERR "onenand_read_oob: Attempted to start read outside oob\n"); 898 return -EINVAL; 899 } 900 901 /* Do not allow reads past end of device */ 902 if (unlikely(from >= mtd->size || 903 column + len > ((mtd->size >> this->page_shift) - 904 (from >> this->page_shift)) * oobsize)) { 905 printk(KERN_ERR "onenand_read_oob: Attempted to read beyond end of device\n"); 906 return -EINVAL; 907 } 908 909 /* Grab the lock and see if the device is available */ 910 onenand_get_device(mtd, FL_READING); 911 912 while (read < len) { 913 cond_resched(); 914 915 thislen = oobsize - column; 916 thislen = min_t(int, thislen, len); 917 918 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize); 919 920 onenand_update_bufferram(mtd, from, 0); 921 922 ret = this->wait(mtd, FL_READING); 923 /* First copy data and check return value for ECC handling */ 924 925 if (mode == MTD_OOB_AUTO) 926 onenand_transfer_auto_oob(mtd, buf, column, thislen); 927 else 928 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); 929 930 if (ret) { 931 printk(KERN_ERR "onenand_read_oob: read failed = 0x%x\n", ret); 932 break; 933 } 934 935 read += thislen; 936 937 if (read == len) 938 break; 939 940 buf += thislen; 941 942 /* Read more? */ 943 if (read < len) { 944 /* Page size */ 945 from += mtd->writesize; 946 column = 0; 947 } 948 } 949 950 /* Deselect and wake up anyone waiting on the device */ 951 onenand_release_device(mtd); 952 953 *retlen = read; 954 return ret; 955} 956 957/** 958 * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band 959 * @param mtd: MTD device structure 960 * @param from: offset to read from 961 * @param ops: oob operation description structure 962 */ 963static int onenand_read_oob(struct mtd_info *mtd, loff_t from, 964 struct mtd_oob_ops *ops) 965{ 966 switch (ops->mode) { 967 case MTD_OOB_PLACE: 968 case MTD_OOB_AUTO: 969 break; 970 case MTD_OOB_RAW: 971 /* Not implemented yet */ 972 default: 973 return -EINVAL; 974 } 975 return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen, 976 &ops->oobretlen, ops->oobbuf, ops->mode); 977} 978 979/** 980 * onenand_bbt_wait - [DEFAULT] wait until the command is done 981 * @param mtd MTD device structure 982 * @param state state to select the max. timeout value 983 * 984 * Wait for command done. 985 */ 986static int onenand_bbt_wait(struct mtd_info *mtd, int state) 987{ 988 struct onenand_chip *this = mtd->priv; 989 unsigned long timeout; 990 unsigned int interrupt; 991 unsigned int ctrl; 992 993 /* The 20 msec is enough */ 994 timeout = jiffies + msecs_to_jiffies(20); 995 while (time_before(jiffies, timeout)) { 996 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 997 if (interrupt & ONENAND_INT_MASTER) 998 break; 999 } 1000 /* To get correct interrupt status in timeout case */ 1001 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1002 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 1003 1004 if (ctrl & ONENAND_CTRL_ERROR) { 1005 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl); 1006 /* Initial bad block case */ 1007 if (ctrl & ONENAND_CTRL_LOAD) 1008 return ONENAND_BBT_READ_ERROR; 1009 return ONENAND_BBT_READ_FATAL_ERROR; 1010 } 1011 1012 if (interrupt & ONENAND_INT_READ) { 1013 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS); 1014 if (ecc & ONENAND_ECC_2BIT_ALL) 1015 return ONENAND_BBT_READ_ERROR; 1016 } else { 1017 printk(KERN_ERR "onenand_bbt_wait: read timeout!" 1018 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt); 1019 return ONENAND_BBT_READ_FATAL_ERROR; 1020 } 1021 1022 return 0; 1023} 1024 1025/** 1026 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan 1027 * @param mtd MTD device structure 1028 * @param from offset to read from 1029 * @param ops oob operation description structure 1030 * 1031 * OneNAND read out-of-band data from the spare area for bbt scan 1032 */ 1033int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, 1034 struct mtd_oob_ops *ops) 1035{ 1036 struct onenand_chip *this = mtd->priv; 1037 int read = 0, thislen, column; 1038 int ret = 0; 1039 size_t len = ops->ooblen; 1040 u_char *buf = ops->oobbuf; 1041 1042 DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len); 1043 1044 /* Initialize return value */ 1045 ops->oobretlen = 0; 1046 1047 /* Do not allow reads past end of device */ 1048 if (unlikely((from + len) > mtd->size)) { 1049 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n"); 1050 return ONENAND_BBT_READ_FATAL_ERROR; 1051 } 1052 1053 /* Grab the lock and see if the device is available */ 1054 onenand_get_device(mtd, FL_READING); 1055 1056 column = from & (mtd->oobsize - 1); 1057 1058 while (read < len) { 1059 cond_resched(); 1060 1061 thislen = mtd->oobsize - column; 1062 thislen = min_t(int, thislen, len); 1063 1064 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize); 1065 1066 onenand_update_bufferram(mtd, from, 0); 1067 1068 ret = onenand_bbt_wait(mtd, FL_READING); 1069 if (ret) 1070 break; 1071 1072 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); 1073 read += thislen; 1074 if (read == len) 1075 break; 1076 1077 buf += thislen; 1078 1079 /* Read more? */ 1080 if (read < len) { 1081 /* Update Page size */ 1082 from += mtd->writesize; 1083 column = 0; 1084 } 1085 } 1086 1087 /* Deselect and wake up anyone waiting on the device */ 1088 onenand_release_device(mtd); 1089 1090 ops->oobretlen = read; 1091 return ret; 1092} 1093 1094#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 1095/** 1096 * onenand_verify_oob - [GENERIC] verify the oob contents after a write 1097 * @param mtd MTD device structure 1098 * @param buf the databuffer to verify 1099 * @param to offset to read from 1100 * 1101 */ 1102static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to) 1103{ 1104 struct onenand_chip *this = mtd->priv; 1105 char oobbuf[64]; 1106 int status, i; 1107 1108 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize); 1109 onenand_update_bufferram(mtd, to, 0); 1110 status = this->wait(mtd, FL_READING); 1111 if (status) 1112 return status; 1113 1114 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 1115 for (i = 0; i < mtd->oobsize; i++) 1116 if (buf[i] != 0xFF && buf[i] != oobbuf[i]) 1117 return -EBADMSG; 1118 1119 return 0; 1120} 1121 1122/** 1123 * onenand_verify - [GENERIC] verify the chip contents after a write 1124 * @param mtd MTD device structure 1125 * @param buf the databuffer to verify 1126 * @param addr offset to read from 1127 * @param len number of bytes to read and compare 1128 * 1129 */ 1130static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len) 1131{ 1132 struct onenand_chip *this = mtd->priv; 1133 void __iomem *dataram; 1134 int ret = 0; 1135 int thislen, column; 1136 1137 while (len != 0) { 1138 thislen = min_t(int, mtd->writesize, len); 1139 column = addr & (mtd->writesize - 1); 1140 if (column + thislen > mtd->writesize) 1141 thislen = mtd->writesize - column; 1142 1143 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize); 1144 1145 onenand_update_bufferram(mtd, addr, 0); 1146 1147 ret = this->wait(mtd, FL_READING); 1148 if (ret) 1149 return ret; 1150 1151 onenand_update_bufferram(mtd, addr, 1); 1152 1153 dataram = this->base + ONENAND_DATARAM; 1154 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM); 1155 1156 if (memcmp(buf, dataram + column, thislen)) 1157 return -EBADMSG; 1158 1159 len -= thislen; 1160 buf += thislen; 1161 addr += thislen; 1162 } 1163 1164 return 0; 1165} 1166#else 1167#define onenand_verify(...) (0) 1168#define onenand_verify_oob(...) (0) 1169#endif 1170 1171#define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0) 1172 1173/** 1174 * onenand_write - [MTD Interface] write buffer to FLASH 1175 * @param mtd MTD device structure 1176 * @param to offset to write to 1177 * @param len number of bytes to write 1178 * @param retlen pointer to variable to store the number of written bytes 1179 * @param buf the data to write 1180 * 1181 * Write with ECC 1182 */ 1183static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len, 1184 size_t *retlen, const u_char *buf) 1185{ 1186 struct onenand_chip *this = mtd->priv; 1187 int written = 0; 1188 int ret = 0; 1189 int column, subpage; 1190 1191 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); 1192 1193 /* Initialize retlen, in case of early exit */ 1194 *retlen = 0; 1195 1196 /* Do not allow writes past end of device */ 1197 if (unlikely((to + len) > mtd->size)) { 1198 printk(KERN_ERR "onenand_write: Attempt write to past end of device\n"); 1199 return -EINVAL; 1200 } 1201 1202 /* Reject writes, which are not page aligned */ 1203 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) { 1204 printk(KERN_ERR "onenand_write: Attempt to write not page aligned data\n"); 1205 return -EINVAL; 1206 } 1207 1208 column = to & (mtd->writesize - 1); 1209 1210 /* Grab the lock and see if the device is available */ 1211 onenand_get_device(mtd, FL_WRITING); 1212 1213 /* Loop until all data write */ 1214 while (written < len) { 1215 int thislen = min_t(int, mtd->writesize - column, len - written); 1216 u_char *wbuf = (u_char *) buf; 1217 1218 cond_resched(); 1219 1220 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); 1221 1222 /* Partial page write */ 1223 subpage = thislen < mtd->writesize; 1224 if (subpage) { 1225 memset(this->page_buf, 0xff, mtd->writesize); 1226 memcpy(this->page_buf + column, buf, thislen); 1227 wbuf = this->page_buf; 1228 } 1229 1230 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); 1231 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize); 1232 1233 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); 1234 1235 ret = this->wait(mtd, FL_WRITING); 1236 1237 /* In partial page write we don't update bufferram */ 1238 onenand_update_bufferram(mtd, to, !ret && !subpage); 1239 1240 if (ret) { 1241 printk(KERN_ERR "onenand_write: write filaed %d\n", ret); 1242 break; 1243 } 1244 1245 /* Only check verify write turn on */ 1246 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen); 1247 if (ret) { 1248 printk(KERN_ERR "onenand_write: verify failed %d\n", ret); 1249 break; 1250 } 1251 1252 written += thislen; 1253 1254 if (written == len) 1255 break; 1256 1257 column = 0; 1258 to += thislen; 1259 buf += thislen; 1260 } 1261 1262 /* Deselect and wake up anyone waiting on the device */ 1263 onenand_release_device(mtd); 1264 1265 *retlen = written; 1266 1267 return ret; 1268} 1269 1270/** 1271 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer 1272 * @param mtd MTD device structure 1273 * @param oob_buf oob buffer 1274 * @param buf source address 1275 * @param column oob offset to write to 1276 * @param thislen oob length to write 1277 */ 1278static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf, 1279 const u_char *buf, int column, int thislen) 1280{ 1281 struct onenand_chip *this = mtd->priv; 1282 struct nand_oobfree *free; 1283 int writecol = column; 1284 int writeend = column + thislen; 1285 int lastgap = 0; 1286 unsigned int i; 1287 1288 free = this->ecclayout->oobfree; 1289 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1290 if (writecol >= lastgap) 1291 writecol += free->offset - lastgap; 1292 if (writeend >= lastgap) 1293 writeend += free->offset - lastgap; 1294 lastgap = free->offset + free->length; 1295 } 1296 free = this->ecclayout->oobfree; 1297 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1298 int free_end = free->offset + free->length; 1299 if (free->offset < writeend && free_end > writecol) { 1300 int st = max_t(int,free->offset,writecol); 1301 int ed = min_t(int,free_end,writeend); 1302 int n = ed - st; 1303 memcpy(oob_buf + st, buf, n); 1304 buf += n; 1305 } else if (column == 0) 1306 break; 1307 } 1308 return 0; 1309} 1310 1311/** 1312 * onenand_do_write_oob - [Internal] OneNAND write out-of-band 1313 * @param mtd MTD device structure 1314 * @param to offset to write to 1315 * @param len number of bytes to write 1316 * @param retlen pointer to variable to store the number of written bytes 1317 * @param buf the data to write 1318 * @param mode operation mode 1319 * 1320 * OneNAND write out-of-band 1321 */ 1322static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len, 1323 size_t *retlen, const u_char *buf, mtd_oob_mode_t mode) 1324{ 1325 struct onenand_chip *this = mtd->priv; 1326 int column, ret = 0, oobsize; 1327 int written = 0; 1328 u_char *oobbuf; 1329 1330 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); 1331 1332 /* Initialize retlen, in case of early exit */ 1333 *retlen = 0; 1334 1335 if (mode == MTD_OOB_AUTO) 1336 oobsize = this->ecclayout->oobavail; 1337 else 1338 oobsize = mtd->oobsize; 1339 1340 column = to & (mtd->oobsize - 1); 1341 1342 if (unlikely(column >= oobsize)) { 1343 printk(KERN_ERR "onenand_write_oob: Attempted to start write outside oob\n"); 1344 return -EINVAL; 1345 } 1346 1347 /* For compatibility with NAND: Do not allow write past end of page */ 1348 if (unlikely(column + len > oobsize)) { 1349 printk(KERN_ERR "onenand_write_oob: " 1350 "Attempt to write past end of page\n"); 1351 return -EINVAL; 1352 } 1353 1354 /* Do not allow reads past end of device */ 1355 if (unlikely(to >= mtd->size || 1356 column + len > ((mtd->size >> this->page_shift) - 1357 (to >> this->page_shift)) * oobsize)) { 1358 printk(KERN_ERR "onenand_write_oob: Attempted to write past end of device\n"); 1359 return -EINVAL; 1360 } 1361 1362 /* Grab the lock and see if the device is available */ 1363 onenand_get_device(mtd, FL_WRITING); 1364 1365 oobbuf = this->oob_buf; 1366 1367 /* Loop until all data write */ 1368 while (written < len) { 1369 int thislen = min_t(int, oobsize, len - written); 1370 1371 cond_resched(); 1372 1373 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); 1374 1375 /* We send data to spare ram with oobsize 1376 * to prevent byte access */ 1377 memset(oobbuf, 0xff, mtd->oobsize); 1378 if (mode == MTD_OOB_AUTO) 1379 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen); 1380 else 1381 memcpy(oobbuf + column, buf, thislen); 1382 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 1383 1384 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize); 1385 1386 onenand_update_bufferram(mtd, to, 0); 1387 1388 ret = this->wait(mtd, FL_WRITING); 1389 if (ret) { 1390 printk(KERN_ERR "onenand_write_oob: write failed %d\n", ret); 1391 break; 1392 } 1393 1394 ret = onenand_verify_oob(mtd, oobbuf, to); 1395 if (ret) { 1396 printk(KERN_ERR "onenand_write_oob: verify failed %d\n", ret); 1397 break; 1398 } 1399 1400 written += thislen; 1401 if (written == len) 1402 break; 1403 1404 to += mtd->writesize; 1405 buf += thislen; 1406 column = 0; 1407 } 1408 1409 /* Deselect and wake up anyone waiting on the device */ 1410 onenand_release_device(mtd); 1411 1412 *retlen = written; 1413 1414 return ret; 1415} 1416 1417/** 1418 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band 1419 * @param mtd: MTD device structure 1420 * @param to: offset to write 1421 * @param ops: oob operation description structure 1422 */ 1423static int onenand_write_oob(struct mtd_info *mtd, loff_t to, 1424 struct mtd_oob_ops *ops) 1425{ 1426 switch (ops->mode) { 1427 case MTD_OOB_PLACE: 1428 case MTD_OOB_AUTO: 1429 break; 1430 case MTD_OOB_RAW: 1431 /* Not implemented yet */ 1432 default: 1433 return -EINVAL; 1434 } 1435 return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen, 1436 &ops->oobretlen, ops->oobbuf, ops->mode); 1437} 1438 1439/** 1440 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad 1441 * @param mtd MTD device structure 1442 * @param ofs offset from device start 1443 * @param getchip 0, if the chip is already selected 1444 * @param allowbbt 1, if its allowed to access the bbt area 1445 * 1446 * Check, if the block is bad. Either by reading the bad block table or 1447 * calling of the scan function. 1448 */ 1449static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt) 1450{ 1451 struct onenand_chip *this = mtd->priv; 1452 struct bbm_info *bbm = this->bbm; 1453 1454 /* Return info from the table */ 1455 return bbm->isbad_bbt(mtd, ofs, allowbbt); 1456} 1457 1458/** 1459 * onenand_erase - [MTD Interface] erase block(s) 1460 * @param mtd MTD device structure 1461 * @param instr erase instruction 1462 * 1463 * Erase one ore more blocks 1464 */ 1465static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) 1466{ 1467 struct onenand_chip *this = mtd->priv; 1468 unsigned int block_size; 1469 loff_t addr; 1470 int len; 1471 int ret = 0; 1472 1473 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len); 1474 1475 block_size = (1 << this->erase_shift); 1476 1477 /* Start address must align on block boundary */ 1478 if (unlikely(instr->addr & (block_size - 1))) { 1479 printk(KERN_ERR "onenand_erase: Unaligned address\n"); 1480 return -EINVAL; 1481 } 1482 1483 /* Length must align on block boundary */ 1484 if (unlikely(instr->len & (block_size - 1))) { 1485 printk(KERN_ERR "onenand_erase: Length not block aligned\n"); 1486 return -EINVAL; 1487 } 1488 1489 /* Do not allow erase past end of device */ 1490 if (unlikely((instr->len + instr->addr) > mtd->size)) { 1491 printk(KERN_ERR "onenand_erase: Erase past end of device\n"); 1492 return -EINVAL; 1493 } 1494 1495 instr->fail_addr = 0xffffffff; 1496 1497 /* Grab the lock and see if the device is available */ 1498 onenand_get_device(mtd, FL_ERASING); 1499 1500 /* Loop throught the pages */ 1501 len = instr->len; 1502 addr = instr->addr; 1503 1504 instr->state = MTD_ERASING; 1505 1506 while (len) { 1507 cond_resched(); 1508 1509 /* Check if we have a bad block, we do not erase bad blocks */ 1510 if (onenand_block_checkbad(mtd, addr, 0, 0)) { 1511 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr); 1512 instr->state = MTD_ERASE_FAILED; 1513 goto erase_exit; 1514 } 1515 1516 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 1517 1518 onenand_invalidate_bufferram(mtd, addr, block_size); 1519 1520 ret = this->wait(mtd, FL_ERASING); 1521 /* Check, if it is write protected */ 1522 if (ret) { 1523 printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift)); 1524 instr->state = MTD_ERASE_FAILED; 1525 instr->fail_addr = addr; 1526 goto erase_exit; 1527 } 1528 1529 len -= block_size; 1530 addr += block_size; 1531 } 1532 1533 instr->state = MTD_ERASE_DONE; 1534 1535erase_exit: 1536 1537 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; 1538 /* Do call back function */ 1539 if (!ret) 1540 mtd_erase_callback(instr); 1541 1542 /* Deselect and wake up anyone waiting on the device */ 1543 onenand_release_device(mtd); 1544 1545 return ret; 1546} 1547 1548/** 1549 * onenand_sync - [MTD Interface] sync 1550 * @param mtd MTD device structure 1551 * 1552 * Sync is actually a wait for chip ready function 1553 */ 1554static void onenand_sync(struct mtd_info *mtd) 1555{ 1556 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n"); 1557 1558 /* Grab the lock and see if the device is available */ 1559 onenand_get_device(mtd, FL_SYNCING); 1560 1561 /* Release it and go back */ 1562 onenand_release_device(mtd); 1563} 1564 1565/** 1566 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad 1567 * @param mtd MTD device structure 1568 * @param ofs offset relative to mtd start 1569 * 1570 * Check whether the block is bad 1571 */ 1572static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) 1573{ 1574 /* Check for invalid offset */ 1575 if (ofs > mtd->size) 1576 return -EINVAL; 1577 1578 return onenand_block_checkbad(mtd, ofs, 1, 0); 1579} 1580 1581/** 1582 * onenand_default_block_markbad - [DEFAULT] mark a block bad 1583 * @param mtd MTD device structure 1584 * @param ofs offset from device start 1585 * 1586 * This is the default implementation, which can be overridden by 1587 * a hardware specific driver. 1588 */ 1589static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) 1590{ 1591 struct onenand_chip *this = mtd->priv; 1592 struct bbm_info *bbm = this->bbm; 1593 u_char buf[2] = {0, 0}; 1594 size_t retlen; 1595 int block; 1596 1597 /* Get block number */ 1598 block = ((int) ofs) >> bbm->bbt_erase_shift; 1599 if (bbm->bbt) 1600 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); 1601 1602 /* We write two bytes, so we dont have to mess with 16 bit access */ 1603 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01); 1604 return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf, MTD_OOB_PLACE); 1605} 1606 1607/** 1608 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad 1609 * @param mtd MTD device structure 1610 * @param ofs offset relative to mtd start 1611 * 1612 * Mark the block as bad 1613 */ 1614static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) 1615{ 1616 struct onenand_chip *this = mtd->priv; 1617 int ret; 1618 1619 ret = onenand_block_isbad(mtd, ofs); 1620 if (ret) { 1621 /* If it was bad already, return success and do nothing */ 1622 if (ret > 0) 1623 return 0; 1624 return ret; 1625 } 1626 1627 return this->block_markbad(mtd, ofs); 1628} 1629 1630/** 1631 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s) 1632 * @param mtd MTD device structure 1633 * @param ofs offset relative to mtd start 1634 * @param len number of bytes to lock or unlock 1635 * @param cmd lock or unlock command 1636 * 1637 * Lock or unlock one or more blocks 1638 */ 1639static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd) 1640{ 1641 struct onenand_chip *this = mtd->priv; 1642 int start, end, block, value, status; 1643 int wp_status_mask; 1644 1645 start = ofs >> this->erase_shift; 1646 end = len >> this->erase_shift; 1647 1648 if (cmd == ONENAND_CMD_LOCK) 1649 wp_status_mask = ONENAND_WP_LS; 1650 else 1651 wp_status_mask = ONENAND_WP_US; 1652 1653 /* Continuous lock scheme */ 1654 if (this->options & ONENAND_HAS_CONT_LOCK) { 1655 /* Set start block address */ 1656 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 1657 /* Set end block address */ 1658 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS); 1659 /* Write lock command */ 1660 this->command(mtd, cmd, 0, 0); 1661 1662 /* There's no return value */ 1663 this->wait(mtd, FL_LOCKING); 1664 1665 /* Sanity check */ 1666 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 1667 & ONENAND_CTRL_ONGO) 1668 continue; 1669 1670 /* Check lock status */ 1671 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 1672 if (!(status & wp_status_mask)) 1673 printk(KERN_ERR "wp status = 0x%x\n", status); 1674 1675 return 0; 1676 } 1677 1678 /* Block lock scheme */ 1679 for (block = start; block < start + end; block++) { 1680 /* Set block address */ 1681 value = onenand_block_address(this, block); 1682 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 1683 /* Select DataRAM for DDP */ 1684 value = onenand_bufferram_address(this, block); 1685 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 1686 /* Set start block address */ 1687 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 1688 /* Write lock command */ 1689 this->command(mtd, cmd, 0, 0); 1690 1691 /* There's no return value */ 1692 this->wait(mtd, FL_LOCKING); 1693 1694 /* Sanity check */ 1695 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 1696 & ONENAND_CTRL_ONGO) 1697 continue; 1698 1699 /* Check lock status */ 1700 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 1701 if (!(status & wp_status_mask)) 1702 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status); 1703 } 1704 1705 return 0; 1706} 1707 1708/** 1709 * onenand_lock - [MTD Interface] Lock block(s) 1710 * @param mtd MTD device structure 1711 * @param ofs offset relative to mtd start 1712 * @param len number of bytes to unlock 1713 * 1714 * Lock one or more blocks 1715 */ 1716static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len) 1717{ 1718 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK); 1719} 1720 1721/** 1722 * onenand_unlock - [MTD Interface] Unlock block(s) 1723 * @param mtd MTD device structure 1724 * @param ofs offset relative to mtd start 1725 * @param len number of bytes to unlock 1726 * 1727 * Unlock one or more blocks 1728 */ 1729static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) 1730{ 1731 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 1732} 1733 1734/** 1735 * onenand_check_lock_status - [OneNAND Interface] Check lock status 1736 * @param this onenand chip data structure 1737 * 1738 * Check lock status 1739 */ 1740static void onenand_check_lock_status(struct onenand_chip *this) 1741{ 1742 unsigned int value, block, status; 1743 unsigned int end; 1744 1745 end = this->chipsize >> this->erase_shift; 1746 for (block = 0; block < end; block++) { 1747 /* Set block address */ 1748 value = onenand_block_address(this, block); 1749 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 1750 /* Select DataRAM for DDP */ 1751 value = onenand_bufferram_address(this, block); 1752 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 1753 /* Set start block address */ 1754 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 1755 1756 /* Check lock status */ 1757 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 1758 if (!(status & ONENAND_WP_US)) 1759 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status); 1760 } 1761} 1762 1763/** 1764 * onenand_unlock_all - [OneNAND Interface] unlock all blocks 1765 * @param mtd MTD device structure 1766 * 1767 * Unlock all blocks 1768 */ 1769static int onenand_unlock_all(struct mtd_info *mtd) 1770{ 1771 struct onenand_chip *this = mtd->priv; 1772 1773 if (this->options & ONENAND_HAS_UNLOCK_ALL) { 1774 /* Set start block address */ 1775 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 1776 /* Write unlock command */ 1777 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0); 1778 1779 /* There's no return value */ 1780 this->wait(mtd, FL_LOCKING); 1781 1782 /* Sanity check */ 1783 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 1784 & ONENAND_CTRL_ONGO) 1785 continue; 1786 1787 if (ONENAND_IS_DDP(this)) { 1788 /* 1st block on another chip */ 1789 loff_t ofs = this->chipsize >> 1; 1790 size_t len = mtd->erasesize; 1791 1792 onenand_unlock(mtd, ofs, len); 1793 } 1794 1795 onenand_check_lock_status(this); 1796 1797 return 0; 1798 } 1799 1800 onenand_unlock(mtd, 0x0, this->chipsize); 1801 1802 return 0; 1803} 1804 1805#ifdef CONFIG_MTD_ONENAND_OTP 1806 1807/* Interal OTP operation */ 1808typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len, 1809 size_t *retlen, u_char *buf); 1810 1811/** 1812 * do_otp_read - [DEFAULT] Read OTP block area 1813 * @param mtd MTD device structure 1814 * @param from The offset to read 1815 * @param len number of bytes to read 1816 * @param retlen pointer to variable to store the number of readbytes 1817 * @param buf the databuffer to put/get data 1818 * 1819 * Read OTP block area. 1820 */ 1821static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len, 1822 size_t *retlen, u_char *buf) 1823{ 1824 struct onenand_chip *this = mtd->priv; 1825 int ret; 1826 1827 /* Enter OTP access mode */ 1828 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 1829 this->wait(mtd, FL_OTPING); 1830 1831 ret = mtd->read(mtd, from, len, retlen, buf); 1832 1833 /* Exit OTP access mode */ 1834 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 1835 this->wait(mtd, FL_RESETING); 1836 1837 return ret; 1838} 1839 1840/** 1841 * do_otp_write - [DEFAULT] Write OTP block area 1842 * @param mtd MTD device structure 1843 * @param from The offset to write 1844 * @param len number of bytes to write 1845 * @param retlen pointer to variable to store the number of write bytes 1846 * @param buf the databuffer to put/get data 1847 * 1848 * Write OTP block area. 1849 */ 1850static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len, 1851 size_t *retlen, u_char *buf) 1852{ 1853 struct onenand_chip *this = mtd->priv; 1854 unsigned char *pbuf = buf; 1855 int ret; 1856 1857 /* Force buffer page aligned */ 1858 if (len < mtd->writesize) { 1859 memcpy(this->page_buf, buf, len); 1860 memset(this->page_buf + len, 0xff, mtd->writesize - len); 1861 pbuf = this->page_buf; 1862 len = mtd->writesize; 1863 } 1864 1865 /* Enter OTP access mode */ 1866 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 1867 this->wait(mtd, FL_OTPING); 1868 1869 ret = mtd->write(mtd, from, len, retlen, pbuf); 1870 1871 /* Exit OTP access mode */ 1872 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 1873 this->wait(mtd, FL_RESETING); 1874 1875 return ret; 1876} 1877 1878/** 1879 * do_otp_lock - [DEFAULT] Lock OTP block area 1880 * @param mtd MTD device structure 1881 * @param from The offset to lock 1882 * @param len number of bytes to lock 1883 * @param retlen pointer to variable to store the number of lock bytes 1884 * @param buf the databuffer to put/get data 1885 * 1886 * Lock OTP block area. 1887 */ 1888static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len, 1889 size_t *retlen, u_char *buf) 1890{ 1891 struct onenand_chip *this = mtd->priv; 1892 int ret; 1893 1894 /* Enter OTP access mode */ 1895 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 1896 this->wait(mtd, FL_OTPING); 1897 1898 ret = onenand_do_write_oob(mtd, from, len, retlen, buf, MTD_OOB_PLACE); 1899 1900 /* Exit OTP access mode */ 1901 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 1902 this->wait(mtd, FL_RESETING); 1903 1904 return ret; 1905} 1906 1907/** 1908 * onenand_otp_walk - [DEFAULT] Handle OTP operation 1909 * @param mtd MTD device structure 1910 * @param from The offset to read/write 1911 * @param len number of bytes to read/write 1912 * @param retlen pointer to variable to store the number of read bytes 1913 * @param buf the databuffer to put/get data 1914 * @param action do given action 1915 * @param mode specify user and factory 1916 * 1917 * Handle OTP operation. 1918 */ 1919static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len, 1920 size_t *retlen, u_char *buf, 1921 otp_op_t action, int mode) 1922{ 1923 struct onenand_chip *this = mtd->priv; 1924 int otp_pages; 1925 int density; 1926 int ret = 0; 1927 1928 *retlen = 0; 1929 1930 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT; 1931 if (density < ONENAND_DEVICE_DENSITY_512Mb) 1932 otp_pages = 20; 1933 else 1934 otp_pages = 10; 1935 1936 if (mode == MTD_OTP_FACTORY) { 1937 from += mtd->writesize * otp_pages; 1938 otp_pages = 64 - otp_pages; 1939 } 1940 1941 /* Check User/Factory boundary */ 1942 if (((mtd->writesize * otp_pages) - (from + len)) < 0) 1943 return 0; 1944 1945 while (len > 0 && otp_pages > 0) { 1946 if (!action) { /* OTP Info functions */ 1947 struct otp_info *otpinfo; 1948 1949 len -= sizeof(struct otp_info); 1950 if (len <= 0) 1951 return -ENOSPC; 1952 1953 otpinfo = (struct otp_info *) buf; 1954 otpinfo->start = from; 1955 otpinfo->length = mtd->writesize; 1956 otpinfo->locked = 0; 1957 1958 from += mtd->writesize; 1959 buf += sizeof(struct otp_info); 1960 *retlen += sizeof(struct otp_info); 1961 } else { 1962 size_t tmp_retlen; 1963 int size = len; 1964 1965 ret = action(mtd, from, len, &tmp_retlen, buf); 1966 1967 buf += size; 1968 len -= size; 1969 *retlen += size; 1970 1971 if (ret < 0) 1972 return ret; 1973 } 1974 otp_pages--; 1975 } 1976 1977 return 0; 1978} 1979 1980/** 1981 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info 1982 * @param mtd MTD device structure 1983 * @param buf the databuffer to put/get data 1984 * @param len number of bytes to read 1985 * 1986 * Read factory OTP info. 1987 */ 1988static int onenand_get_fact_prot_info(struct mtd_info *mtd, 1989 struct otp_info *buf, size_t len) 1990{ 1991 size_t retlen; 1992 int ret; 1993 1994 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY); 1995 1996 return ret ? : retlen; 1997} 1998 1999/** 2000 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area 2001 * @param mtd MTD device structure 2002 * @param from The offset to read 2003 * @param len number of bytes to read 2004 * @param retlen pointer to variable to store the number of read bytes 2005 * @param buf the databuffer to put/get data 2006 * 2007 * Read factory OTP area. 2008 */ 2009static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, 2010 size_t len, size_t *retlen, u_char *buf) 2011{ 2012 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY); 2013} 2014 2015/** 2016 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info 2017 * @param mtd MTD device structure 2018 * @param buf the databuffer to put/get data 2019 * @param len number of bytes to read 2020 * 2021 * Read user OTP info. 2022 */ 2023static int onenand_get_user_prot_info(struct mtd_info *mtd, 2024 struct otp_info *buf, size_t len) 2025{ 2026 size_t retlen; 2027 int ret; 2028 2029 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER); 2030 2031 return ret ? : retlen; 2032} 2033 2034/** 2035 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area 2036 * @param mtd MTD device structure 2037 * @param from The offset to read 2038 * @param len number of bytes to read 2039 * @param retlen pointer to variable to store the number of read bytes 2040 * @param buf the databuffer to put/get data 2041 * 2042 * Read user OTP area. 2043 */ 2044static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from, 2045 size_t len, size_t *retlen, u_char *buf) 2046{ 2047 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER); 2048} 2049 2050/** 2051 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area 2052 * @param mtd MTD device structure 2053 * @param from The offset to write 2054 * @param len number of bytes to write 2055 * @param retlen pointer to variable to store the number of write bytes 2056 * @param buf the databuffer to put/get data 2057 * 2058 * Write user OTP area. 2059 */ 2060static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from, 2061 size_t len, size_t *retlen, u_char *buf) 2062{ 2063 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER); 2064} 2065 2066/** 2067 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area 2068 * @param mtd MTD device structure 2069 * @param from The offset to lock 2070 * @param len number of bytes to unlock 2071 * 2072 * Write lock mark on spare area in page 0 in OTP block 2073 */ 2074static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from, 2075 size_t len) 2076{ 2077 unsigned char oob_buf[64]; 2078 size_t retlen; 2079 int ret; 2080 2081 memset(oob_buf, 0xff, mtd->oobsize); 2082 /* 2083 * Note: OTP lock operation 2084 * OTP block : 0xXXFC 2085 * 1st block : 0xXXF3 (If chip support) 2086 * Both : 0xXXF0 (If chip support) 2087 */ 2088 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC; 2089 2090 /* 2091 * Write lock mark to 8th word of sector0 of page0 of the spare0. 2092 * We write 16 bytes spare area instead of 2 bytes. 2093 */ 2094 from = 0; 2095 len = 16; 2096 2097 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER); 2098 2099 return ret ? : retlen; 2100} 2101#endif /* CONFIG_MTD_ONENAND_OTP */ 2102 2103/** 2104 * onenand_check_features - Check and set OneNAND features 2105 * @param mtd MTD data structure 2106 * 2107 * Check and set OneNAND features 2108 * - lock scheme 2109 */ 2110static void onenand_check_features(struct mtd_info *mtd) 2111{ 2112 struct onenand_chip *this = mtd->priv; 2113 unsigned int density, process; 2114 2115 /* Lock scheme depends on density and process */ 2116 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT; 2117 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT; 2118 2119 /* Lock scheme */ 2120 if (density >= ONENAND_DEVICE_DENSITY_1Gb) { 2121 /* A-Die has all block unlock */ 2122 if (process) { 2123 printk(KERN_DEBUG "Chip support all block unlock\n"); 2124 this->options |= ONENAND_HAS_UNLOCK_ALL; 2125 } 2126 } else { 2127 /* Some OneNAND has continues lock scheme */ 2128 if (!process) { 2129 printk(KERN_DEBUG "Lock scheme is Continues Lock\n"); 2130 this->options |= ONENAND_HAS_CONT_LOCK; 2131 } 2132 } 2133} 2134 2135/** 2136 * onenand_print_device_info - Print device & version ID 2137 * @param device device ID 2138 * @param version version ID 2139 * 2140 * Print device & version ID 2141 */ 2142static void onenand_print_device_info(int device, int version) 2143{ 2144 int vcc, demuxed, ddp, density; 2145 2146 vcc = device & ONENAND_DEVICE_VCC_MASK; 2147 demuxed = device & ONENAND_DEVICE_IS_DEMUX; 2148 ddp = device & ONENAND_DEVICE_IS_DDP; 2149 density = device >> ONENAND_DEVICE_DENSITY_SHIFT; 2150 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", 2151 demuxed ? "" : "Muxed ", 2152 ddp ? "(DDP)" : "", 2153 (16 << density), 2154 vcc ? "2.65/3.3" : "1.8", 2155 device); 2156 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version); 2157} 2158 2159static const struct onenand_manufacturers onenand_manuf_ids[] = { 2160 {ONENAND_MFR_SAMSUNG, "Samsung"}, 2161}; 2162 2163/** 2164 * onenand_check_maf - Check manufacturer ID 2165 * @param manuf manufacturer ID 2166 * 2167 * Check manufacturer ID 2168 */ 2169static int onenand_check_maf(int manuf) 2170{ 2171 int size = ARRAY_SIZE(onenand_manuf_ids); 2172 char *name; 2173 int i; 2174 2175 for (i = 0; i < size; i++) 2176 if (manuf == onenand_manuf_ids[i].id) 2177 break; 2178 2179 if (i < size) 2180 name = onenand_manuf_ids[i].name; 2181 else 2182 name = "Unknown"; 2183 2184 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf); 2185 2186 return (i == size); 2187} 2188 2189/** 2190 * onenand_probe - [OneNAND Interface] Probe the OneNAND device 2191 * @param mtd MTD device structure 2192 * 2193 * OneNAND detection method: 2194 * Compare the values from command with ones from register 2195 */ 2196static int onenand_probe(struct mtd_info *mtd) 2197{ 2198 struct onenand_chip *this = mtd->priv; 2199 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id; 2200 int density; 2201 int syscfg; 2202 2203 /* Save system configuration 1 */ 2204 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 2205 /* Clear Sync. Burst Read mode to read BootRAM */ 2206 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1); 2207 2208 /* Send the command for reading device ID from BootRAM */ 2209 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); 2210 2211 /* Read manufacturer and device IDs from BootRAM */ 2212 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); 2213 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); 2214 2215 /* Reset OneNAND to read default register values */ 2216 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); 2217 /* Wait reset */ 2218 this->wait(mtd, FL_RESETING); 2219 2220 /* Restore system configuration 1 */ 2221 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 2222 2223 /* Check manufacturer ID */ 2224 if (onenand_check_maf(bram_maf_id)) 2225 return -ENXIO; 2226 2227 /* Read manufacturer and device IDs from Register */ 2228 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); 2229 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 2230 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); 2231 2232 /* Check OneNAND device */ 2233 if (maf_id != bram_maf_id || dev_id != bram_dev_id) 2234 return -ENXIO; 2235 2236 /* Flash device information */ 2237 onenand_print_device_info(dev_id, ver_id); 2238 this->device_id = dev_id; 2239 this->version_id = ver_id; 2240 2241 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; 2242 this->chipsize = (16 << density) << 20; 2243 /* Set density mask. it is used for DDP */ 2244 if (ONENAND_IS_DDP(this)) 2245 this->density_mask = (1 << (density + 6)); 2246 else 2247 this->density_mask = 0; 2248 2249 /* OneNAND page size & block size */ 2250 /* The data buffer size is equal to page size */ 2251 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); 2252 mtd->oobsize = mtd->writesize >> 5; 2253 /* Pages per a block are always 64 in OneNAND */ 2254 mtd->erasesize = mtd->writesize << 6; 2255 2256 this->erase_shift = ffs(mtd->erasesize) - 1; 2257 this->page_shift = ffs(mtd->writesize) - 1; 2258 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1; 2259 2260 /* REVIST: Multichip handling */ 2261 2262 mtd->size = this->chipsize; 2263 2264 /* Check OneNAND features */ 2265 onenand_check_features(mtd); 2266 2267 return 0; 2268} 2269 2270/** 2271 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash 2272 * @param mtd MTD device structure 2273 */ 2274static int onenand_suspend(struct mtd_info *mtd) 2275{ 2276 return onenand_get_device(mtd, FL_PM_SUSPENDED); 2277} 2278 2279/** 2280 * onenand_resume - [MTD Interface] Resume the OneNAND flash 2281 * @param mtd MTD device structure 2282 */ 2283static void onenand_resume(struct mtd_info *mtd) 2284{ 2285 struct onenand_chip *this = mtd->priv; 2286 2287 if (this->state == FL_PM_SUSPENDED) 2288 onenand_release_device(mtd); 2289 else 2290 printk(KERN_ERR "resume() called for the chip which is not" 2291 "in suspended state\n"); 2292} 2293 2294/** 2295 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device 2296 * @param mtd MTD device structure 2297 * @param maxchips Number of chips to scan for 2298 * 2299 * This fills out all the not initialized function pointers 2300 * with the defaults. 2301 * The flash ID is read and the mtd/chip structures are 2302 * filled with the appropriate values. 2303 */ 2304int onenand_scan(struct mtd_info *mtd, int maxchips) 2305{ 2306 int i; 2307 struct onenand_chip *this = mtd->priv; 2308 2309 if (!this->read_word) 2310 this->read_word = onenand_readw; 2311 if (!this->write_word) 2312 this->write_word = onenand_writew; 2313 2314 if (!this->command) 2315 this->command = onenand_command; 2316 if (!this->wait) 2317 onenand_setup_wait(mtd); 2318 2319 if (!this->read_bufferram) 2320 this->read_bufferram = onenand_read_bufferram; 2321 if (!this->write_bufferram) 2322 this->write_bufferram = onenand_write_bufferram; 2323 2324 if (!this->block_markbad) 2325 this->block_markbad = onenand_default_block_markbad; 2326 if (!this->scan_bbt) 2327 this->scan_bbt = onenand_default_bbt; 2328 2329 if (onenand_probe(mtd)) 2330 return -ENXIO; 2331 2332 /* Set Sync. Burst Read after probing */ 2333 if (this->mmcontrol) { 2334 printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); 2335 this->read_bufferram = onenand_sync_read_bufferram; 2336 } 2337 2338 /* Allocate buffers, if necessary */ 2339 if (!this->page_buf) { 2340 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL); 2341 if (!this->page_buf) { 2342 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n"); 2343 return -ENOMEM; 2344 } 2345 this->options |= ONENAND_PAGEBUF_ALLOC; 2346 } 2347 if (!this->oob_buf) { 2348 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL); 2349 if (!this->oob_buf) { 2350 printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n"); 2351 if (this->options & ONENAND_PAGEBUF_ALLOC) { 2352 this->options &= ~ONENAND_PAGEBUF_ALLOC; 2353 kfree(this->page_buf); 2354 } 2355 return -ENOMEM; 2356 } 2357 this->options |= ONENAND_OOBBUF_ALLOC; 2358 } 2359 2360 this->state = FL_READY; 2361 init_waitqueue_head(&this->wq); 2362 spin_lock_init(&this->chip_lock); 2363 2364 /* 2365 * Allow subpage writes up to oobsize. 2366 */ 2367 switch (mtd->oobsize) { 2368 case 64: 2369 this->ecclayout = &onenand_oob_64; 2370 mtd->subpage_sft = 2; 2371 break; 2372 2373 case 32: 2374 this->ecclayout = &onenand_oob_32; 2375 mtd->subpage_sft = 1; 2376 break; 2377 2378 default: 2379 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n", 2380 mtd->oobsize); 2381 mtd->subpage_sft = 0; 2382 /* To prevent kernel oops */ 2383 this->ecclayout = &onenand_oob_32; 2384 break; 2385 } 2386 2387 this->subpagesize = mtd->writesize >> mtd->subpage_sft; 2388 2389 /* 2390 * The number of bytes available for a client to place data into 2391 * the out of band area 2392 */ 2393 this->ecclayout->oobavail = 0; 2394 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && 2395 this->ecclayout->oobfree[i].length; i++) 2396 this->ecclayout->oobavail += 2397 this->ecclayout->oobfree[i].length; 2398 mtd->oobavail = this->ecclayout->oobavail; 2399 2400 mtd->ecclayout = this->ecclayout; 2401 2402 /* Fill in remaining MTD driver data */ 2403 mtd->type = MTD_NANDFLASH; 2404 mtd->flags = MTD_CAP_NANDFLASH; 2405 mtd->erase = onenand_erase; 2406 mtd->point = NULL; 2407 mtd->unpoint = NULL; 2408 mtd->read = onenand_read; 2409 mtd->write = onenand_write; 2410 mtd->read_oob = onenand_read_oob; 2411 mtd->write_oob = onenand_write_oob; 2412#ifdef CONFIG_MTD_ONENAND_OTP 2413 mtd->get_fact_prot_info = onenand_get_fact_prot_info; 2414 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg; 2415 mtd->get_user_prot_info = onenand_get_user_prot_info; 2416 mtd->read_user_prot_reg = onenand_read_user_prot_reg; 2417 mtd->write_user_prot_reg = onenand_write_user_prot_reg; 2418 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg; 2419#endif 2420 mtd->sync = onenand_sync; 2421 mtd->lock = onenand_lock; 2422 mtd->unlock = onenand_unlock; 2423 mtd->suspend = onenand_suspend; 2424 mtd->resume = onenand_resume; 2425 mtd->block_isbad = onenand_block_isbad; 2426 mtd->block_markbad = onenand_block_markbad; 2427 mtd->owner = THIS_MODULE; 2428 2429 /* Unlock whole block */ 2430 onenand_unlock_all(mtd); 2431 2432 return this->scan_bbt(mtd); 2433} 2434 2435/** 2436 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device 2437 * @param mtd MTD device structure 2438 */ 2439void onenand_release(struct mtd_info *mtd) 2440{ 2441 struct onenand_chip *this = mtd->priv; 2442 2443#ifdef CONFIG_MTD_PARTITIONS 2444 /* Deregister partitions */ 2445 del_mtd_partitions (mtd); 2446#endif 2447 /* Deregister the device */ 2448 del_mtd_device (mtd); 2449 2450 /* Free bad block table memory, if allocated */ 2451 if (this->bbm) { 2452 struct bbm_info *bbm = this->bbm; 2453 kfree(bbm->bbt); 2454 kfree(this->bbm); 2455 } 2456 /* Buffers allocated by onenand_scan */ 2457 if (this->options & ONENAND_PAGEBUF_ALLOC) 2458 kfree(this->page_buf); 2459 if (this->options & ONENAND_OOBBUF_ALLOC) 2460 kfree(this->oob_buf); 2461} 2462 2463EXPORT_SYMBOL_GPL(onenand_scan); 2464EXPORT_SYMBOL_GPL(onenand_release); 2465 2466MODULE_LICENSE("GPL"); 2467MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>"); 2468MODULE_DESCRIPTION("Generic OneNAND flash driver code"); 2469