1/*
2 *	PCI handling of I2O controller
3 *
4 * 	Copyright (C) 1999-2002	Red Hat Software
5 *
6 *	Written by Alan Cox, Building Number Three Ltd
7 *
8 *	This program is free software; you can redistribute it and/or modify it
9 *	under the terms of the GNU General Public License as published by the
10 *	Free Software Foundation; either version 2 of the License, or (at your
11 *	option) any later version.
12 *
13 *	A lot of the I2O message side code from this is taken from the Red
14 *	Creek RCPCI45 adapter driver by Red Creek Communications
15 *
16 *	Fixes/additions:
17 *		Philipp Rumpf
18 *		Juha Siev�nen <Juha.Sievanen@cs.Helsinki.FI>
19 *		Auvo H�kkinen <Auvo.Hakkinen@cs.Helsinki.FI>
20 *		Deepak Saxena <deepak@plexity.net>
21 *		Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
22 *		Alan Cox <alan@redhat.com>:
23 *			Ported to Linux 2.5.
24 *		Markus Lidel <Markus.Lidel@shadowconnect.com>:
25 *			Minor fixes for 2.6.
26 *		Markus Lidel <Markus.Lidel@shadowconnect.com>:
27 *			Support for sysfs included.
28 */
29
30#include <linux/pci.h>
31#include <linux/interrupt.h>
32#include <linux/i2o.h>
33#include "core.h"
34
35#define OSM_DESCRIPTION	"I2O-subsystem"
36
37/* PCI device id table for all I2O controllers */
38static struct pci_device_id __devinitdata i2o_pci_ids[] = {
39	{PCI_DEVICE_CLASS(PCI_CLASS_INTELLIGENT_I2O << 8, 0xffff00)},
40	{PCI_DEVICE(PCI_VENDOR_ID_DPT, 0xa511)},
41	{.vendor = PCI_VENDOR_ID_INTEL,.device = 0x1962,
42	 .subvendor = PCI_VENDOR_ID_PROMISE,.subdevice = PCI_ANY_ID},
43	{0}
44};
45
46/**
47 *	i2o_pci_free - Frees the DMA memory for the I2O controller
48 *	@c: I2O controller to free
49 *
50 *	Remove all allocated DMA memory and unmap memory IO regions. If MTRR
51 *	is enabled, also remove it again.
52 */
53static void i2o_pci_free(struct i2o_controller *c)
54{
55	struct device *dev;
56
57	dev = &c->pdev->dev;
58
59	i2o_dma_free(dev, &c->out_queue);
60	i2o_dma_free(dev, &c->status_block);
61	kfree(c->lct);
62	i2o_dma_free(dev, &c->dlct);
63	i2o_dma_free(dev, &c->hrt);
64	i2o_dma_free(dev, &c->status);
65
66	if (c->raptor && c->in_queue.virt)
67		iounmap(c->in_queue.virt);
68
69	if (c->base.virt)
70		iounmap(c->base.virt);
71
72	pci_release_regions(c->pdev);
73}
74
75/**
76 *	i2o_pci_alloc - Allocate DMA memory, map IO memory for I2O controller
77 *	@c: I2O controller
78 *
79 *	Allocate DMA memory for a PCI (or in theory AGP) I2O controller. All
80 *	IO mappings are also done here. If MTRR is enabled, also do add memory
81 *	regions here.
82 *
83 *	Returns 0 on success or negative error code on failure.
84 */
85static int __devinit i2o_pci_alloc(struct i2o_controller *c)
86{
87	struct pci_dev *pdev = c->pdev;
88	struct device *dev = &pdev->dev;
89	int i;
90
91	if (pci_request_regions(pdev, OSM_DESCRIPTION)) {
92		printk(KERN_ERR "%s: device already claimed\n", c->name);
93		return -ENODEV;
94	}
95
96	for (i = 0; i < 6; i++) {
97		/* Skip I/O spaces */
98		if (!(pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
99			if (!c->base.phys) {
100				c->base.phys = pci_resource_start(pdev, i);
101				c->base.len = pci_resource_len(pdev, i);
102
103				/*
104				 * If we know what card it is, set the size
105				 * correctly. Code is taken from dpt_i2o.c
106				 */
107				if (pdev->device == 0xa501) {
108					if (pdev->subsystem_device >= 0xc032 &&
109					    pdev->subsystem_device <= 0xc03b) {
110						if (c->base.len > 0x400000)
111							c->base.len = 0x400000;
112					} else {
113						if (c->base.len > 0x100000)
114							c->base.len = 0x100000;
115					}
116				}
117				if (!c->raptor)
118					break;
119			} else {
120				c->in_queue.phys = pci_resource_start(pdev, i);
121				c->in_queue.len = pci_resource_len(pdev, i);
122				break;
123			}
124		}
125	}
126
127	if (i == 6) {
128		printk(KERN_ERR "%s: I2O controller has no memory regions"
129		       " defined.\n", c->name);
130		i2o_pci_free(c);
131		return -EINVAL;
132	}
133
134	/* Map the I2O controller */
135	if (c->raptor) {
136		printk(KERN_INFO "%s: PCI I2O controller\n", c->name);
137		printk(KERN_INFO "     BAR0 at 0x%08lX size=%ld\n",
138		       (unsigned long)c->base.phys, (unsigned long)c->base.len);
139		printk(KERN_INFO "     BAR1 at 0x%08lX size=%ld\n",
140		       (unsigned long)c->in_queue.phys,
141		       (unsigned long)c->in_queue.len);
142	} else
143		printk(KERN_INFO "%s: PCI I2O controller at %08lX size=%ld\n",
144		       c->name, (unsigned long)c->base.phys,
145		       (unsigned long)c->base.len);
146
147	c->base.virt = ioremap_nocache(c->base.phys, c->base.len);
148	if (!c->base.virt) {
149		printk(KERN_ERR "%s: Unable to map controller.\n", c->name);
150		i2o_pci_free(c);
151		return -ENOMEM;
152	}
153
154	if (c->raptor) {
155		c->in_queue.virt =
156		    ioremap_nocache(c->in_queue.phys, c->in_queue.len);
157		if (!c->in_queue.virt) {
158			printk(KERN_ERR "%s: Unable to map controller.\n",
159			       c->name);
160			i2o_pci_free(c);
161			return -ENOMEM;
162		}
163	} else
164		c->in_queue = c->base;
165
166	c->irq_status = c->base.virt + I2O_IRQ_STATUS;
167	c->irq_mask = c->base.virt + I2O_IRQ_MASK;
168	c->in_port = c->base.virt + I2O_IN_PORT;
169	c->out_port = c->base.virt + I2O_OUT_PORT;
170
171	/* Motorola/Freescale chip does not follow spec */
172	if (pdev->vendor == PCI_VENDOR_ID_MOTOROLA && pdev->device == 0x18c0) {
173		/* Check if CPU is enabled */
174		if (be32_to_cpu(readl(c->base.virt + 0x10000)) & 0x10000000) {
175			printk(KERN_INFO "%s: MPC82XX needs CPU running to "
176			       "service I2O.\n", c->name);
177			i2o_pci_free(c);
178			return -ENODEV;
179		} else {
180			c->irq_status += I2O_MOTOROLA_PORT_OFFSET;
181			c->irq_mask += I2O_MOTOROLA_PORT_OFFSET;
182			c->in_port += I2O_MOTOROLA_PORT_OFFSET;
183			c->out_port += I2O_MOTOROLA_PORT_OFFSET;
184			printk(KERN_INFO "%s: MPC82XX workarounds activated.\n",
185			       c->name);
186		}
187	}
188
189	if (i2o_dma_alloc(dev, &c->status, 8, GFP_KERNEL)) {
190		i2o_pci_free(c);
191		return -ENOMEM;
192	}
193
194	if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt), GFP_KERNEL)) {
195		i2o_pci_free(c);
196		return -ENOMEM;
197	}
198
199	if (i2o_dma_alloc(dev, &c->dlct, 8192, GFP_KERNEL)) {
200		i2o_pci_free(c);
201		return -ENOMEM;
202	}
203
204	if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block),
205			  GFP_KERNEL)) {
206		i2o_pci_free(c);
207		return -ENOMEM;
208	}
209
210	if (i2o_dma_alloc
211	    (dev, &c->out_queue,
212	     I2O_MAX_OUTBOUND_MSG_FRAMES * I2O_OUTBOUND_MSG_FRAME_SIZE *
213	     sizeof(u32), GFP_KERNEL)) {
214		i2o_pci_free(c);
215		return -ENOMEM;
216	}
217
218	pci_set_drvdata(pdev, c);
219
220	return 0;
221}
222
223/**
224 *	i2o_pci_interrupt - Interrupt handler for I2O controller
225 *	@irq: interrupt line
226 *	@dev_id: pointer to the I2O controller
227 *
228 *	Handle an interrupt from a PCI based I2O controller. This turns out
229 *	to be rather simple. We keep the controller pointer in the cookie.
230 */
231static irqreturn_t i2o_pci_interrupt(int irq, void *dev_id)
232{
233	struct i2o_controller *c = dev_id;
234	u32 m;
235	irqreturn_t rc = IRQ_NONE;
236
237	while (readl(c->irq_status) & I2O_IRQ_OUTBOUND_POST) {
238		m = readl(c->out_port);
239		if (m == I2O_QUEUE_EMPTY) {
240			/*
241			 * Old 960 steppings had a bug in the I2O unit that
242			 * caused the queue to appear empty when it wasn't.
243			 */
244			m = readl(c->out_port);
245			if (unlikely(m == I2O_QUEUE_EMPTY))
246				break;
247		}
248
249		/* dispatch it */
250		if (i2o_driver_dispatch(c, m))
251			/* flush it if result != 0 */
252			i2o_flush_reply(c, m);
253
254		rc = IRQ_HANDLED;
255	}
256
257	return rc;
258}
259
260/**
261 *	i2o_pci_irq_enable - Allocate interrupt for I2O controller
262 *	@c: i2o_controller that the request is for
263 *
264 *	Allocate an interrupt for the I2O controller, and activate interrupts
265 *	on the I2O controller.
266 *
267 *	Returns 0 on success or negative error code on failure.
268 */
269static int i2o_pci_irq_enable(struct i2o_controller *c)
270{
271	struct pci_dev *pdev = c->pdev;
272	int rc;
273
274	writel(0xffffffff, c->irq_mask);
275
276	if (pdev->irq) {
277		rc = request_irq(pdev->irq, i2o_pci_interrupt, IRQF_SHARED,
278				 c->name, c);
279		if (rc < 0) {
280			printk(KERN_ERR "%s: unable to allocate interrupt %d."
281			       "\n", c->name, pdev->irq);
282			return rc;
283		}
284	}
285
286	writel(0x00000000, c->irq_mask);
287
288	printk(KERN_INFO "%s: Installed at IRQ %d\n", c->name, pdev->irq);
289
290	return 0;
291}
292
293/**
294 *	i2o_pci_irq_disable - Free interrupt for I2O controller
295 *	@c: I2O controller
296 *
297 *	Disable interrupts in I2O controller and then free interrupt.
298 */
299static void i2o_pci_irq_disable(struct i2o_controller *c)
300{
301	writel(0xffffffff, c->irq_mask);
302
303	if (c->pdev->irq > 0)
304		free_irq(c->pdev->irq, c);
305}
306
307/**
308 *	i2o_pci_probe - Probe the PCI device for an I2O controller
309 *	@pdev: PCI device to test
310 *	@id: id which matched with the PCI device id table
311 *
312 *	Probe the PCI device for any device which is a memory of the
313 *	Intelligent, I2O class or an Adaptec Zero Channel Controller. We
314 *	attempt to set up each such device and register it with the core.
315 *
316 *	Returns 0 on success or negative error code on failure.
317 */
318static int __devinit i2o_pci_probe(struct pci_dev *pdev,
319				   const struct pci_device_id *id)
320{
321	struct i2o_controller *c;
322	int rc;
323	struct pci_dev *i960 = NULL;
324
325	printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
326
327	if ((pdev->class & 0xff) > 1) {
328		printk(KERN_WARNING "i2o: %s does not support I2O 1.5 "
329		       "(skipping).\n", pci_name(pdev));
330		return -ENODEV;
331	}
332
333	if ((rc = pci_enable_device(pdev))) {
334		printk(KERN_WARNING "i2o: couldn't enable device %s\n",
335		       pci_name(pdev));
336		return rc;
337	}
338
339	if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
340		printk(KERN_WARNING "i2o: no suitable DMA found for %s\n",
341		       pci_name(pdev));
342		rc = -ENODEV;
343		goto disable;
344	}
345
346	pci_set_master(pdev);
347
348	c = i2o_iop_alloc();
349	if (IS_ERR(c)) {
350		printk(KERN_ERR "i2o: couldn't allocate memory for %s\n",
351		       pci_name(pdev));
352		rc = PTR_ERR(c);
353		goto disable;
354	} else
355		printk(KERN_INFO "%s: controller found (%s)\n", c->name,
356		       pci_name(pdev));
357
358	c->pdev = pdev;
359	c->device.parent = &pdev->dev;
360
361	/* Cards that fall apart if you hit them with large I/O loads... */
362	if (pdev->vendor == PCI_VENDOR_ID_NCR && pdev->device == 0x0630) {
363		c->short_req = 1;
364		printk(KERN_INFO "%s: Symbios FC920 workarounds activated.\n",
365		       c->name);
366	}
367
368	if (pdev->subsystem_vendor == PCI_VENDOR_ID_PROMISE) {
369		/*
370		 * Expose the ship behind i960 for initialization, or it will
371		 * failed
372		 */
373		i960 = pci_get_slot(c->pdev->bus,
374				  PCI_DEVFN(PCI_SLOT(c->pdev->devfn), 0));
375
376		if (i960) {
377			pci_write_config_word(i960, 0x42, 0);
378			pci_dev_put(i960);
379		}
380
381		c->promise = 1;
382		c->limit_sectors = 1;
383	}
384
385	if (pdev->subsystem_vendor == PCI_VENDOR_ID_DPT)
386		c->adaptec = 1;
387
388	/* Cards that go bananas if you quiesce them before you reset them. */
389	if (pdev->vendor == PCI_VENDOR_ID_DPT) {
390		c->no_quiesce = 1;
391		if (pdev->device == 0xa511)
392			c->raptor = 1;
393
394		if (pdev->subsystem_device == 0xc05a) {
395			c->limit_sectors = 1;
396			printk(KERN_INFO
397			       "%s: limit sectors per request to %d\n", c->name,
398			       I2O_MAX_SECTORS_LIMITED);
399		}
400#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
401		if (sizeof(dma_addr_t) > 4) {
402			if (pci_set_dma_mask(pdev, DMA_64BIT_MASK))
403				printk(KERN_INFO "%s: 64-bit DMA unavailable\n",
404				       c->name);
405			else {
406				c->pae_support = 1;
407				printk(KERN_INFO "%s: using 64-bit DMA\n",
408				       c->name);
409			}
410		}
411#endif
412	}
413
414	if ((rc = i2o_pci_alloc(c))) {
415		printk(KERN_ERR "%s: DMA / IO allocation for I2O controller "
416		       "failed\n", c->name);
417		goto free_controller;
418	}
419
420	if (i2o_pci_irq_enable(c)) {
421		printk(KERN_ERR "%s: unable to enable interrupts for I2O "
422		       "controller\n", c->name);
423		goto free_pci;
424	}
425
426	if ((rc = i2o_iop_add(c)))
427		goto uninstall;
428
429	if (i960)
430		pci_write_config_word(i960, 0x42, 0x03ff);
431
432	return 0;
433
434      uninstall:
435	i2o_pci_irq_disable(c);
436
437      free_pci:
438	i2o_pci_free(c);
439
440      free_controller:
441	i2o_iop_free(c);
442
443      disable:
444	pci_disable_device(pdev);
445
446	return rc;
447}
448
449/**
450 *	i2o_pci_remove - Removes a I2O controller from the system
451 *	@pdev: I2O controller which should be removed
452 *
453 *	Reset the I2O controller, disable interrupts and remove all allocated
454 *	resources.
455 */
456static void __devexit i2o_pci_remove(struct pci_dev *pdev)
457{
458	struct i2o_controller *c;
459	c = pci_get_drvdata(pdev);
460
461	i2o_iop_remove(c);
462	i2o_pci_irq_disable(c);
463	i2o_pci_free(c);
464
465	pci_disable_device(pdev);
466
467	printk(KERN_INFO "%s: Controller removed.\n", c->name);
468
469	put_device(&c->device);
470};
471
472/* PCI driver for I2O controller */
473static struct pci_driver i2o_pci_driver = {
474	.name = "PCI_I2O",
475	.id_table = i2o_pci_ids,
476	.probe = i2o_pci_probe,
477	.remove = __devexit_p(i2o_pci_remove),
478};
479
480/**
481 *	i2o_pci_init - registers I2O PCI driver in PCI subsystem
482 *
483 *	Returns > 0 on success or negative error code on failure.
484 */
485int __init i2o_pci_init(void)
486{
487	return pci_register_driver(&i2o_pci_driver);
488};
489
490/**
491 *	i2o_pci_exit - unregisters I2O PCI driver from PCI subsystem
492 */
493void __exit i2o_pci_exit(void)
494{
495	pci_unregister_driver(&i2o_pci_driver);
496};
497
498MODULE_DEVICE_TABLE(pci, i2o_pci_ids);
499