1/* 2 * Copyright (c) 2000-2006 LSI Logic Corporation. 3 * 4 * 5 * Name: mpi_ioc.h 6 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages 7 * Creation Date: August 11, 2000 8 * 9 * mpi_ioc.h Version: 01.05.12 10 * 11 * Version History 12 * --------------- 13 * 14 * Date Version Description 15 * -------- -------- ------------------------------------------------------ 16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 17 * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure. 18 * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY. 19 * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure. 20 * Added _MSG_EVENT_ACK_REPLY structure. 21 * Added _MSG_FW_DOWNLOAD_REPLY structure. 22 * Added _MSG_TOOLBOX_REPLY structure. 23 * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure. 24 * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI, 25 * _LINK_STATUS, _LOOP_STATE and _LOGOUT. 26 * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in 27 * _MSG_EVENT_ACK_REPLY structure to match specification. 28 * 11-02-00 01.01.01 Original release for post 1.0 work. 29 * Added a value for Manufacturer to WhoInit. 30 * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and 31 * removed toolbox message. 32 * 01-09-01 01.01.03 Added event enabled and disabled defines. 33 * Added structures for FwHeader and DataHeader. 34 * Added ImageType to FwUpload reply. 35 * 02-20-01 01.01.04 Started using MPI_POINTER. 36 * 02-27-01 01.01.05 Added event for RAID status change and its event data. 37 * Added IocNumber field to MSG_IOC_FACTS_REPLY. 38 * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER. 39 * Added structure offset comments. 40 * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE. 41 * 08-08-01 01.02.01 Original release for v1.2 work. 42 * New format for FWVersion and ProductId in 43 * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER. 44 * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and 45 * related structure and defines. 46 * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED. 47 * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE. 48 * Replaced a reserved field in MSG_IOC_FACTS_REPLY with 49 * IOCExceptions and changed DataImageSize to reserved. 50 * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and 51 * MPI_FW_UPLOAD_ITYPE_NVDATA. 52 * 09-28-01 01.02.03 Modified Event Data for Integrated RAID. 53 * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field. 54 * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY. 55 * 05-31-02 01.02.06 Added define for 56 * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID. 57 * Added AliasIndex to EVENT_DATA_LOGOUT structure. 58 * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_. 59 * 06-26-03 01.02.08 Added new values to the product family defines. 60 * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and 61 * added related defines. 62 * 05-11-04 01.03.01 Original release for MPI v1.3. 63 * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT. 64 * Added three new fields to MSG_IOC_FACTS_REPLY. 65 * Defined four new bits for the IOCCapabilities field of 66 * the IOCFacts reply. 67 * Added two new PortTypes for the PortFacts reply. 68 * Added six new events along with their EventData 69 * structures. 70 * Added a new MsgFlag to the FwDownload request to 71 * indicate last segment. 72 * Defined a new image type of boot loader. 73 * Added FW family codes for SAS product families. 74 * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to 75 * MSG_IOC_FACTS_REPLY. 76 * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event. 77 * 12-09-04 01.05.04 Added Unsupported device to SAS Device event. 78 * 01-15-05 01.05.05 Added event data for SAS SES Event. 79 * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define. 80 * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts 81 * Reply and IOC Init Request. 82 * 03-11-05 01.05.08 Added family code for 1068E family. 83 * Removed IOCFacts Reply EEDP Capability bit. 84 * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits. 85 * Added Max SATA Targets to SAS Discovery Error event. 86 * 08-30-05 01.05.10 Added 4 new events and their event data structures. 87 * Added new ReasonCode value for SAS Device Status Change 88 * event. 89 * Added new family code for FC949E. 90 * 03-27-06 01.05.11 Added MPI_IOCFACTS_CAPABILITY_TLR. 91 * Added additional Reason Codes and more event data fields 92 * to EVENT_DATA_SAS_DEVICE_STATUS_CHANGE. 93 * Added EVENT_DATA_SAS_BROADCAST_PRIMITIVE structure and 94 * new event. 95 * Added MPI_EVENT_SAS_SMP_ERROR and event data structure. 96 * Added MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE and event 97 * data structure. 98 * Added MPI_EVENT_SAS_INIT_TABLE_OVERFLOW and event 99 * data structure. 100 * Added MPI_EXT_IMAGE_TYPE_INITIALIZATION. 101 * 10-11-06 01.05.12 Added MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED. 102 * Added MaxInitiators field to PortFacts reply. 103 * Added SAS Device Status Change ReasonCode for 104 * asynchronous notificaiton. 105 * Added MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE and event 106 * data structure. 107 * Added new ImageType values for FWDownload and FWUpload 108 * requests. 109 * -------------------------------------------------------------------------- 110 */ 111 112#ifndef MPI_IOC_H 113#define MPI_IOC_H 114 115 116/***************************************************************************** 117* 118* I O C M e s s a g e s 119* 120*****************************************************************************/ 121 122/****************************************************************************/ 123/* IOCInit message */ 124/****************************************************************************/ 125 126typedef struct _MSG_IOC_INIT 127{ 128 U8 WhoInit; /* 00h */ 129 U8 Reserved; /* 01h */ 130 U8 ChainOffset; /* 02h */ 131 U8 Function; /* 03h */ 132 U8 Flags; /* 04h */ 133 U8 MaxDevices; /* 05h */ 134 U8 MaxBuses; /* 06h */ 135 U8 MsgFlags; /* 07h */ 136 U32 MsgContext; /* 08h */ 137 U16 ReplyFrameSize; /* 0Ch */ 138 U8 Reserved1[2]; /* 0Eh */ 139 U32 HostMfaHighAddr; /* 10h */ 140 U32 SenseBufferHighAddr; /* 14h */ 141 U32 ReplyFifoHostSignalingAddr; /* 18h */ 142 SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */ 143 U16 MsgVersion; /* 28h */ 144 U16 HeaderVersion; /* 2Ah */ 145} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT, 146 IOCInit_t, MPI_POINTER pIOCInit_t; 147 148/* WhoInit values */ 149#define MPI_WHOINIT_NO_ONE (0x00) 150#define MPI_WHOINIT_SYSTEM_BIOS (0x01) 151#define MPI_WHOINIT_ROM_BIOS (0x02) 152#define MPI_WHOINIT_PCI_PEER (0x03) 153#define MPI_WHOINIT_HOST_DRIVER (0x04) 154#define MPI_WHOINIT_MANUFACTURER (0x05) 155 156/* Flags values */ 157#define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04) 158#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02) 159#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01) 160 161/* MsgVersion */ 162#define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00) 163#define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8) 164#define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF) 165#define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0) 166 167/* HeaderVersion */ 168#define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00) 169#define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8) 170#define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF) 171#define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0) 172 173 174typedef struct _MSG_IOC_INIT_REPLY 175{ 176 U8 WhoInit; /* 00h */ 177 U8 Reserved; /* 01h */ 178 U8 MsgLength; /* 02h */ 179 U8 Function; /* 03h */ 180 U8 Flags; /* 04h */ 181 U8 MaxDevices; /* 05h */ 182 U8 MaxBuses; /* 06h */ 183 U8 MsgFlags; /* 07h */ 184 U32 MsgContext; /* 08h */ 185 U16 Reserved2; /* 0Ch */ 186 U16 IOCStatus; /* 0Eh */ 187 U32 IOCLogInfo; /* 10h */ 188} MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY, 189 IOCInitReply_t, MPI_POINTER pIOCInitReply_t; 190 191 192 193/****************************************************************************/ 194/* IOC Facts message */ 195/****************************************************************************/ 196 197typedef struct _MSG_IOC_FACTS 198{ 199 U8 Reserved[2]; /* 00h */ 200 U8 ChainOffset; /* 01h */ 201 U8 Function; /* 02h */ 202 U8 Reserved1[3]; /* 03h */ 203 U8 MsgFlags; /* 04h */ 204 U32 MsgContext; /* 08h */ 205} MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS, 206 IOCFacts_t, MPI_POINTER pIOCFacts_t; 207 208typedef struct _MPI_FW_VERSION_STRUCT 209{ 210 U8 Dev; /* 00h */ 211 U8 Unit; /* 01h */ 212 U8 Minor; /* 02h */ 213 U8 Major; /* 03h */ 214} MPI_FW_VERSION_STRUCT; 215 216typedef union _MPI_FW_VERSION 217{ 218 MPI_FW_VERSION_STRUCT Struct; 219 U32 Word; 220} MPI_FW_VERSION; 221 222/* IOC Facts Reply */ 223typedef struct _MSG_IOC_FACTS_REPLY 224{ 225 U16 MsgVersion; /* 00h */ 226 U8 MsgLength; /* 02h */ 227 U8 Function; /* 03h */ 228 U16 HeaderVersion; /* 04h */ 229 U8 IOCNumber; /* 06h */ 230 U8 MsgFlags; /* 07h */ 231 U32 MsgContext; /* 08h */ 232 U16 IOCExceptions; /* 0Ch */ 233 U16 IOCStatus; /* 0Eh */ 234 U32 IOCLogInfo; /* 10h */ 235 U8 MaxChainDepth; /* 14h */ 236 U8 WhoInit; /* 15h */ 237 U8 BlockSize; /* 16h */ 238 U8 Flags; /* 17h */ 239 U16 ReplyQueueDepth; /* 18h */ 240 U16 RequestFrameSize; /* 1Ah */ 241 U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */ 242 U16 ProductID; /* 1Eh */ 243 U32 CurrentHostMfaHighAddr; /* 20h */ 244 U16 GlobalCredits; /* 24h */ 245 U8 NumberOfPorts; /* 26h */ 246 U8 EventState; /* 27h */ 247 U32 CurrentSenseBufferHighAddr; /* 28h */ 248 U16 CurReplyFrameSize; /* 2Ch */ 249 U8 MaxDevices; /* 2Eh */ 250 U8 MaxBuses; /* 2Fh */ 251 U32 FWImageSize; /* 30h */ 252 U32 IOCCapabilities; /* 34h */ 253 MPI_FW_VERSION FWVersion; /* 38h */ 254 U16 HighPriorityQueueDepth; /* 3Ch */ 255 U16 Reserved2; /* 3Eh */ 256 SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */ 257 U32 ReplyFifoHostSignalingAddr; /* 4Ch */ 258} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY, 259 IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t; 260 261#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00) 262#define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8) 263#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF) 264#define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0) 265 266#define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00) 267#define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8) 268#define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF) 269#define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0) 270 271#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001) 272#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002) 273#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004) 274#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008) 275#define MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010) 276 277#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01) 278#define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02) 279#define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04) 280 281#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00) 282#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01) 283 284#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001) 285#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002) 286#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004) 287#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008) 288#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010) 289#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020) 290#define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040) 291#define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080) 292#define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100) 293#define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200) 294#define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400) 295#define MPI_IOCFACTS_CAPABILITY_TLR (0x00000800) 296 297 298/***************************************************************************** 299* 300* P o r t M e s s a g e s 301* 302*****************************************************************************/ 303 304/****************************************************************************/ 305/* Port Facts message and Reply */ 306/****************************************************************************/ 307 308typedef struct _MSG_PORT_FACTS 309{ 310 U8 Reserved[2]; /* 00h */ 311 U8 ChainOffset; /* 02h */ 312 U8 Function; /* 03h */ 313 U8 Reserved1[2]; /* 04h */ 314 U8 PortNumber; /* 06h */ 315 U8 MsgFlags; /* 07h */ 316 U32 MsgContext; /* 08h */ 317} MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS, 318 PortFacts_t, MPI_POINTER pPortFacts_t; 319 320typedef struct _MSG_PORT_FACTS_REPLY 321{ 322 U16 Reserved; /* 00h */ 323 U8 MsgLength; /* 02h */ 324 U8 Function; /* 03h */ 325 U16 Reserved1; /* 04h */ 326 U8 PortNumber; /* 06h */ 327 U8 MsgFlags; /* 07h */ 328 U32 MsgContext; /* 08h */ 329 U16 Reserved2; /* 0Ch */ 330 U16 IOCStatus; /* 0Eh */ 331 U32 IOCLogInfo; /* 10h */ 332 U8 Reserved3; /* 14h */ 333 U8 PortType; /* 15h */ 334 U16 MaxDevices; /* 16h */ 335 U16 PortSCSIID; /* 18h */ 336 U16 ProtocolFlags; /* 1Ah */ 337 U16 MaxPostedCmdBuffers; /* 1Ch */ 338 U16 MaxPersistentIDs; /* 1Eh */ 339 U16 MaxLanBuckets; /* 20h */ 340 U8 MaxInitiators; /* 22h */ 341 U8 Reserved4; /* 23h */ 342 U32 Reserved5; /* 24h */ 343} MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY, 344 PortFactsReply_t, MPI_POINTER pPortFactsReply_t; 345 346 347/* PortTypes values */ 348 349#define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00) 350#define MPI_PORTFACTS_PORTTYPE_SCSI (0x01) 351#define MPI_PORTFACTS_PORTTYPE_FC (0x10) 352#define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20) 353#define MPI_PORTFACTS_PORTTYPE_SAS (0x30) 354 355/* ProtocolFlags values */ 356 357#define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01) 358#define MPI_PORTFACTS_PROTOCOL_LAN (0x02) 359#define MPI_PORTFACTS_PROTOCOL_TARGET (0x04) 360#define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08) 361 362 363/****************************************************************************/ 364/* Port Enable Message */ 365/****************************************************************************/ 366 367typedef struct _MSG_PORT_ENABLE 368{ 369 U8 Reserved[2]; /* 00h */ 370 U8 ChainOffset; /* 02h */ 371 U8 Function; /* 03h */ 372 U8 Reserved1[2]; /* 04h */ 373 U8 PortNumber; /* 06h */ 374 U8 MsgFlags; /* 07h */ 375 U32 MsgContext; /* 08h */ 376} MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE, 377 PortEnable_t, MPI_POINTER pPortEnable_t; 378 379typedef struct _MSG_PORT_ENABLE_REPLY 380{ 381 U8 Reserved[2]; /* 00h */ 382 U8 MsgLength; /* 02h */ 383 U8 Function; /* 03h */ 384 U8 Reserved1[2]; /* 04h */ 385 U8 PortNumber; /* 05h */ 386 U8 MsgFlags; /* 07h */ 387 U32 MsgContext; /* 08h */ 388 U16 Reserved2; /* 0Ch */ 389 U16 IOCStatus; /* 0Eh */ 390 U32 IOCLogInfo; /* 10h */ 391} MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY, 392 PortEnableReply_t, MPI_POINTER pPortEnableReply_t; 393 394 395/***************************************************************************** 396* 397* E v e n t M e s s a g e s 398* 399*****************************************************************************/ 400 401/****************************************************************************/ 402/* Event Notification messages */ 403/****************************************************************************/ 404 405typedef struct _MSG_EVENT_NOTIFY 406{ 407 U8 Switch; /* 00h */ 408 U8 Reserved; /* 01h */ 409 U8 ChainOffset; /* 02h */ 410 U8 Function; /* 03h */ 411 U8 Reserved1[3]; /* 04h */ 412 U8 MsgFlags; /* 07h */ 413 U32 MsgContext; /* 08h */ 414} MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY, 415 EventNotification_t, MPI_POINTER pEventNotification_t; 416 417/* Event Notification Reply */ 418 419typedef struct _MSG_EVENT_NOTIFY_REPLY 420{ 421 U16 EventDataLength; /* 00h */ 422 U8 MsgLength; /* 02h */ 423 U8 Function; /* 03h */ 424 U8 Reserved1[2]; /* 04h */ 425 U8 AckRequired; /* 06h */ 426 U8 MsgFlags; /* 07h */ 427 U32 MsgContext; /* 08h */ 428 U8 Reserved2[2]; /* 0Ch */ 429 U16 IOCStatus; /* 0Eh */ 430 U32 IOCLogInfo; /* 10h */ 431 U32 Event; /* 14h */ 432 U32 EventContext; /* 18h */ 433 U32 Data[1]; /* 1Ch */ 434} MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY, 435 EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t; 436 437/* Event Acknowledge */ 438 439typedef struct _MSG_EVENT_ACK 440{ 441 U8 Reserved[2]; /* 00h */ 442 U8 ChainOffset; /* 02h */ 443 U8 Function; /* 03h */ 444 U8 Reserved1[3]; /* 04h */ 445 U8 MsgFlags; /* 07h */ 446 U32 MsgContext; /* 08h */ 447 U32 Event; /* 0Ch */ 448 U32 EventContext; /* 10h */ 449} MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK, 450 EventAck_t, MPI_POINTER pEventAck_t; 451 452typedef struct _MSG_EVENT_ACK_REPLY 453{ 454 U8 Reserved[2]; /* 00h */ 455 U8 MsgLength; /* 02h */ 456 U8 Function; /* 03h */ 457 U8 Reserved1[3]; /* 04h */ 458 U8 MsgFlags; /* 07h */ 459 U32 MsgContext; /* 08h */ 460 U16 Reserved2; /* 0Ch */ 461 U16 IOCStatus; /* 0Eh */ 462 U32 IOCLogInfo; /* 10h */ 463} MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY, 464 EventAckReply_t, MPI_POINTER pEventAckReply_t; 465 466/* Switch */ 467 468#define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00) 469#define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01) 470 471/* Event */ 472 473#define MPI_EVENT_NONE (0x00000000) 474#define MPI_EVENT_LOG_DATA (0x00000001) 475#define MPI_EVENT_STATE_CHANGE (0x00000002) 476#define MPI_EVENT_UNIT_ATTENTION (0x00000003) 477#define MPI_EVENT_IOC_BUS_RESET (0x00000004) 478#define MPI_EVENT_EXT_BUS_RESET (0x00000005) 479#define MPI_EVENT_RESCAN (0x00000006) 480#define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007) 481#define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008) 482#define MPI_EVENT_LOGOUT (0x00000009) 483#define MPI_EVENT_EVENT_CHANGE (0x0000000A) 484#define MPI_EVENT_INTEGRATED_RAID (0x0000000B) 485#define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C) 486#define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D) 487#define MPI_EVENT_QUEUE_FULL (0x0000000E) 488#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F) 489#define MPI_EVENT_SAS_SES (0x00000010) 490#define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011) 491#define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012) 492#define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013) 493#define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014) 494#define MPI_EVENT_IR2 (0x00000015) 495#define MPI_EVENT_SAS_DISCOVERY (0x00000016) 496#define MPI_EVENT_SAS_BROADCAST_PRIMITIVE (0x00000017) 497#define MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x00000018) 498#define MPI_EVENT_SAS_INIT_TABLE_OVERFLOW (0x00000019) 499#define MPI_EVENT_SAS_SMP_ERROR (0x0000001A) 500#define MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE (0x0000001B) 501#define MPI_EVENT_LOG_ENTRY_ADDED (0x00000021) 502 503/* AckRequired field values */ 504 505#define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00) 506#define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01) 507 508/* EventChange Event data */ 509 510typedef struct _EVENT_DATA_EVENT_CHANGE 511{ 512 U8 EventState; /* 00h */ 513 U8 Reserved; /* 01h */ 514 U16 Reserved1; /* 02h */ 515} EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE, 516 EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t; 517 518/* LogEntryAdded Event data */ 519 520/* this structure matches MPI_LOG_0_ENTRY in mpi_cnfg.h */ 521#define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH (0x1C) 522typedef struct _EVENT_DATA_LOG_ENTRY 523{ 524 U32 TimeStamp; /* 00h */ 525 U32 Reserved1; /* 04h */ 526 U16 LogSequence; /* 08h */ 527 U16 LogEntryQualifier; /* 0Ah */ 528 U8 LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH]; /* 0Ch */ 529} EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY, 530 MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t; 531 532typedef struct _EVENT_DATA_LOG_ENTRY_ADDED 533{ 534 U16 LogSequence; /* 00h */ 535 U16 Reserved1; /* 02h */ 536 U32 Reserved2; /* 04h */ 537 EVENT_DATA_LOG_ENTRY LogEntry; /* 08h */ 538} EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED, 539 MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t; 540 541/* SCSI Event data for Port, Bus and Device forms */ 542 543typedef struct _EVENT_DATA_SCSI 544{ 545 U8 TargetID; /* 00h */ 546 U8 BusPort; /* 01h */ 547 U16 Reserved; /* 02h */ 548} EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI, 549 EventDataScsi_t, MPI_POINTER pEventDataScsi_t; 550 551/* SCSI Device Status Change Event data */ 552 553typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE 554{ 555 U8 TargetID; /* 00h */ 556 U8 Bus; /* 01h */ 557 U8 ReasonCode; /* 02h */ 558 U8 LUN; /* 03h */ 559 U8 ASC; /* 04h */ 560 U8 ASCQ; /* 05h */ 561 U16 Reserved; /* 06h */ 562} EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE, 563 MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE, 564 MpiEventDataScsiDeviceStatusChange_t, 565 MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t; 566 567/* MPI SCSI Device Status Change Event data ReasonCode values */ 568#define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03) 569#define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04) 570#define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05) 571 572/* SAS Device Status Change Event data */ 573 574typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE 575{ 576 U8 TargetID; /* 00h */ 577 U8 Bus; /* 01h */ 578 U8 ReasonCode; /* 02h */ 579 U8 Reserved; /* 03h */ 580 U8 ASC; /* 04h */ 581 U8 ASCQ; /* 05h */ 582 U16 DevHandle; /* 06h */ 583 U32 DeviceInfo; /* 08h */ 584 U16 ParentDevHandle; /* 0Ch */ 585 U8 PhyNum; /* 0Eh */ 586 U8 Reserved1; /* 0Fh */ 587 U64 SASAddress; /* 10h */ 588 U8 LUN[8]; /* 18h */ 589 U16 TaskTag; /* 20h */ 590 U16 Reserved2; /* 22h */ 591} EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, 592 MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, 593 MpiEventDataSasDeviceStatusChange_t, 594 MPI_POINTER pMpiEventDataSasDeviceStatusChange_t; 595 596/* MPI SAS Device Status Change Event data ReasonCode values */ 597#define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03) 598#define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04) 599#define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05) 600#define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06) 601#define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07) 602#define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08) 603#define MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09) 604#define MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A) 605#define MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B) 606#define MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C) 607#define MPI_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D) 608 609 610/* SCSI Event data for Queue Full event */ 611 612typedef struct _EVENT_DATA_QUEUE_FULL 613{ 614 U8 TargetID; /* 00h */ 615 U8 Bus; /* 01h */ 616 U16 CurrentDepth; /* 02h */ 617} EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL, 618 EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t; 619 620/* MPI Integrated RAID Event data */ 621 622typedef struct _EVENT_DATA_RAID 623{ 624 U8 VolumeID; /* 00h */ 625 U8 VolumeBus; /* 01h */ 626 U8 ReasonCode; /* 02h */ 627 U8 PhysDiskNum; /* 03h */ 628 U8 ASC; /* 04h */ 629 U8 ASCQ; /* 05h */ 630 U16 Reserved; /* 06h */ 631 U32 SettingsStatus; /* 08h */ 632} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID, 633 MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t; 634 635/* MPI Integrated RAID Event data ReasonCode values */ 636#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00) 637#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01) 638#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02) 639#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03) 640#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04) 641#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05) 642#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06) 643#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07) 644#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08) 645#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09) 646#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A) 647#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B) 648 649 650/* MPI Integrated RAID Resync Update Event data */ 651 652typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE 653{ 654 U8 VolumeID; /* 00h */ 655 U8 VolumeBus; /* 01h */ 656 U8 ResyncComplete; /* 02h */ 657 U8 Reserved1; /* 03h */ 658 U32 Reserved2; /* 04h */ 659} MPI_EVENT_DATA_IR_RESYNC_UPDATE, 660 MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE, 661 MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t; 662 663/* MPI IR2 Event data */ 664 665/* MPI_LD_STATE or MPI_PD_STATE */ 666typedef struct _IR2_STATE_CHANGED 667{ 668 U16 PreviousState; /* 00h */ 669 U16 NewState; /* 02h */ 670} IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED; 671 672typedef struct _IR2_PD_INFO 673{ 674 U16 DeviceHandle; /* 00h */ 675 U8 TruncEnclosureHandle; /* 02h */ 676 U8 TruncatedSlot; /* 03h */ 677} IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO; 678 679typedef union _MPI_IR2_RC_EVENT_DATA 680{ 681 IR2_STATE_CHANGED StateChanged; 682 U32 Lba; 683 IR2_PD_INFO PdInfo; 684} MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA; 685 686typedef struct _MPI_EVENT_DATA_IR2 687{ 688 U8 TargetID; /* 00h */ 689 U8 Bus; /* 01h */ 690 U8 ReasonCode; /* 02h */ 691 U8 PhysDiskNum; /* 03h */ 692 MPI_IR2_RC_EVENT_DATA IR2EventData; /* 04h */ 693} MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2, 694 MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t; 695 696/* MPI IR2 Event data ReasonCode values */ 697#define MPI_EVENT_IR2_RC_LD_STATE_CHANGED (0x01) 698#define MPI_EVENT_IR2_RC_PD_STATE_CHANGED (0x02) 699#define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL (0x03) 700#define MPI_EVENT_IR2_RC_PD_INSERTED (0x04) 701#define MPI_EVENT_IR2_RC_PD_REMOVED (0x05) 702#define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED (0x06) 703#define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR (0x07) 704 705/* defines for logical disk states */ 706#define MPI_LD_STATE_OPTIMAL (0x00) 707#define MPI_LD_STATE_DEGRADED (0x01) 708#define MPI_LD_STATE_FAILED (0x02) 709#define MPI_LD_STATE_MISSING (0x03) 710#define MPI_LD_STATE_OFFLINE (0x04) 711 712/* defines for physical disk states */ 713#define MPI_PD_STATE_ONLINE (0x00) 714#define MPI_PD_STATE_MISSING (0x01) 715#define MPI_PD_STATE_NOT_COMPATIBLE (0x02) 716#define MPI_PD_STATE_FAILED (0x03) 717#define MPI_PD_STATE_INITIALIZING (0x04) 718#define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST (0x05) 719#define MPI_PD_STATE_FAILED_AT_HOST_REQUEST (0x06) 720#define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON (0xFF) 721 722/* MPI Link Status Change Event data */ 723 724typedef struct _EVENT_DATA_LINK_STATUS 725{ 726 U8 State; /* 00h */ 727 U8 Reserved; /* 01h */ 728 U16 Reserved1; /* 02h */ 729 U8 Reserved2; /* 04h */ 730 U8 Port; /* 05h */ 731 U16 Reserved3; /* 06h */ 732} EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS, 733 EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t; 734 735#define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000) 736#define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001) 737 738/* MPI Loop State Change Event data */ 739 740typedef struct _EVENT_DATA_LOOP_STATE 741{ 742 U8 Character4; /* 00h */ 743 U8 Character3; /* 01h */ 744 U8 Type; /* 02h */ 745 U8 Reserved; /* 03h */ 746 U8 Reserved1; /* 04h */ 747 U8 Port; /* 05h */ 748 U16 Reserved2; /* 06h */ 749} EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE, 750 EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t; 751 752#define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001) 753#define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002) 754#define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003) 755 756/* MPI LOGOUT Event data */ 757 758typedef struct _EVENT_DATA_LOGOUT 759{ 760 U32 NPortID; /* 00h */ 761 U8 AliasIndex; /* 04h */ 762 U8 Port; /* 05h */ 763 U16 Reserved1; /* 06h */ 764} EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT, 765 EventDataLogout_t, MPI_POINTER pEventDataLogout_t; 766 767#define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF) 768 769/* SAS SES Event data */ 770 771typedef struct _EVENT_DATA_SAS_SES 772{ 773 U8 PhyNum; /* 00h */ 774 U8 Port; /* 01h */ 775 U8 PortWidth; /* 02h */ 776 U8 Reserved1; /* 04h */ 777} EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES, 778 MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t; 779 780/* SAS Broadcast Primitive Event data */ 781 782typedef struct _EVENT_DATA_SAS_BROADCAST_PRIMITIVE 783{ 784 U8 PhyNum; /* 00h */ 785 U8 Port; /* 01h */ 786 U8 PortWidth; /* 02h */ 787 U8 Primitive; /* 04h */ 788} EVENT_DATA_SAS_BROADCAST_PRIMITIVE, 789 MPI_POINTER PTR_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, 790 MpiEventDataSasBroadcastPrimitive_t, 791 MPI_POINTER pMpiEventDataSasBroadcastPrimitive_t; 792 793#define MPI_EVENT_PRIMITIVE_CHANGE (0x01) 794#define MPI_EVENT_PRIMITIVE_EXPANDER (0x03) 795#define MPI_EVENT_PRIMITIVE_RESERVED2 (0x04) 796#define MPI_EVENT_PRIMITIVE_RESERVED3 (0x05) 797#define MPI_EVENT_PRIMITIVE_RESERVED4 (0x06) 798#define MPI_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07) 799#define MPI_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08) 800 801/* SAS Phy Link Status Event data */ 802 803typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS 804{ 805 U8 PhyNum; /* 00h */ 806 U8 LinkRates; /* 01h */ 807 U16 DevHandle; /* 02h */ 808 U64 SASAddress; /* 04h */ 809} EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS, 810 MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t; 811 812/* defines for the LinkRates field of the SAS PHY Link Status event */ 813#define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0) 814#define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4) 815#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F) 816#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0) 817#define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00) 818#define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01) 819#define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02) 820#define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03) 821#define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08) 822#define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09) 823 824/* SAS Discovery Event data */ 825 826typedef struct _EVENT_DATA_SAS_DISCOVERY 827{ 828 U32 DiscoveryStatus; /* 00h */ 829 U32 Reserved1; /* 04h */ 830} EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY, 831 EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t; 832 833#define MPI_EVENT_SAS_DSCVRY_COMPLETE (0x00000000) 834#define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS (0x00000001) 835#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK (0xFFFF0000) 836#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT (16) 837 838/* SAS Discovery Errror Event data */ 839 840typedef struct _EVENT_DATA_DISCOVERY_ERROR 841{ 842 U32 DiscoveryStatus; /* 00h */ 843 U8 Port; /* 04h */ 844 U8 Reserved1; /* 05h */ 845 U16 Reserved2; /* 06h */ 846} EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR, 847 EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t; 848 849#define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001) 850#define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002) 851#define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004) 852#define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008) 853#define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010) 854#define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020) 855#define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040) 856#define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080) 857#define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100) 858#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200) 859#define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400) 860#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS (0x00000800) 861#define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000) 862 863/* SAS SMP Error Event data */ 864 865typedef struct _EVENT_DATA_SAS_SMP_ERROR 866{ 867 U8 Status; /* 00h */ 868 U8 Port; /* 01h */ 869 U8 SMPFunctionResult; /* 02h */ 870 U8 Reserved1; /* 03h */ 871 U64 SASAddress; /* 04h */ 872} EVENT_DATA_SAS_SMP_ERROR, MPI_POINTER PTR_EVENT_DATA_SAS_SMP_ERROR, 873 MpiEventDataSasSmpError_t, MPI_POINTER pMpiEventDataSasSmpError_t; 874 875/* defines for the Status field of the SAS SMP Error event */ 876#define MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID (0x00) 877#define MPI_EVENT_SAS_SMP_CRC_ERROR (0x01) 878#define MPI_EVENT_SAS_SMP_TIMEOUT (0x02) 879#define MPI_EVENT_SAS_SMP_NO_DESTINATION (0x03) 880#define MPI_EVENT_SAS_SMP_BAD_DESTINATION (0x04) 881 882/* SAS Initiator Device Status Change Event data */ 883 884typedef struct _EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE 885{ 886 U8 ReasonCode; /* 00h */ 887 U8 Port; /* 01h */ 888 U16 DevHandle; /* 02h */ 889 U64 SASAddress; /* 04h */ 890} EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, 891 MPI_POINTER PTR_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, 892 MpiEventDataSasInitDevStatusChange_t, 893 MPI_POINTER pMpiEventDataSasInitDevStatusChange_t; 894 895/* defines for the ReasonCode field of the SAS Initiator Device Status Change event */ 896#define MPI_EVENT_SAS_INIT_RC_ADDED (0x01) 897 898/* SAS Initiator Device Table Overflow Event data */ 899 900typedef struct _EVENT_DATA_SAS_INIT_TABLE_OVERFLOW 901{ 902 U8 MaxInit; /* 00h */ 903 U8 CurrentInit; /* 01h */ 904 U16 Reserved1; /* 02h */ 905} EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, 906 MPI_POINTER PTR_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, 907 MpiEventDataSasInitTableOverflow_t, 908 MPI_POINTER pMpiEventDataSasInitTableOverflow_t; 909 910/* SAS Expander Status Change Event data */ 911 912typedef struct _EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE 913{ 914 U8 ReasonCode; /* 00h */ 915 U8 Reserved1; /* 01h */ 916 U16 Reserved2; /* 02h */ 917 U8 PhysicalPort; /* 04h */ 918 U8 Reserved3; /* 05h */ 919 U16 EnclosureHandle; /* 06h */ 920 U64 SASAddress; /* 08h */ 921 U32 DiscoveryStatus; /* 10h */ 922 U16 DevHandle; /* 14h */ 923 U16 ParentDevHandle; /* 16h */ 924 U16 ExpanderChangeCount; /* 18h */ 925 U16 ExpanderRouteIndexes; /* 1Ah */ 926 U8 NumPhys; /* 1Ch */ 927 U8 SASLevel; /* 1Dh */ 928 U8 Flags; /* 1Eh */ 929 U8 Reserved4; /* 1Fh */ 930} EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE, 931 MPI_POINTER PTR_EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE, 932 MpiEventDataSasExpanderStatusChange_t, 933 MPI_POINTER pMpiEventDataSasExpanderStatusChange_t; 934 935/* values for ReasonCode field of SAS Expander Status Change Event data */ 936#define MPI_EVENT_SAS_EXP_RC_ADDED (0x00) 937#define MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING (0x01) 938 939/* values for DiscoveryStatus field of SAS Expander Status Change Event data */ 940#define MPI_EVENT_SAS_EXP_DS_LOOP_DETECTED (0x00000001) 941#define MPI_EVENT_SAS_EXP_DS_UNADDRESSABLE_DEVICE (0x00000002) 942#define MPI_EVENT_SAS_EXP_DS_MULTIPLE_PORTS (0x00000004) 943#define MPI_EVENT_SAS_EXP_DS_EXPANDER_ERR (0x00000008) 944#define MPI_EVENT_SAS_EXP_DS_SMP_TIMEOUT (0x00000010) 945#define MPI_EVENT_SAS_EXP_DS_OUT_ROUTE_ENTRIES (0x00000020) 946#define MPI_EVENT_SAS_EXP_DS_INDEX_NOT_EXIST (0x00000040) 947#define MPI_EVENT_SAS_EXP_DS_SMP_FUNCTION_FAILED (0x00000080) 948#define MPI_EVENT_SAS_EXP_DS_SMP_CRC_ERROR (0x00000100) 949#define MPI_EVENT_SAS_EXP_DS_SUBTRACTIVE_LINK (0x00000200) 950#define MPI_EVENT_SAS_EXP_DS_TABLE_LINK (0x00000400) 951#define MPI_EVENT_SAS_EXP_DS_UNSUPPORTED_DEVICE (0x00000800) 952 953/* values for Flags field of SAS Expander Status Change Event data */ 954#define MPI_EVENT_SAS_EXP_FLAGS_ROUTE_TABLE_CONFIG (0x02) 955#define MPI_EVENT_SAS_EXP_FLAGS_CONFIG_IN_PROGRESS (0x01) 956 957 958 959/***************************************************************************** 960* 961* F i r m w a r e L o a d M e s s a g e s 962* 963*****************************************************************************/ 964 965/****************************************************************************/ 966/* Firmware Download message and associated structures */ 967/****************************************************************************/ 968 969typedef struct _MSG_FW_DOWNLOAD 970{ 971 U8 ImageType; /* 00h */ 972 U8 Reserved; /* 01h */ 973 U8 ChainOffset; /* 02h */ 974 U8 Function; /* 03h */ 975 U8 Reserved1[3]; /* 04h */ 976 U8 MsgFlags; /* 07h */ 977 U32 MsgContext; /* 08h */ 978 SGE_MPI_UNION SGL; /* 0Ch */ 979} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD, 980 FWDownload_t, MPI_POINTER pFWDownload_t; 981 982#define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01) 983 984#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00) 985#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01) 986#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02) 987#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03) 988#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04) 989#define MPI_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06) 990#define MPI_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07) 991#define MPI_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08) 992#define MPI_FW_DOWNLOAD_ITYPE_MEGARAID (0x09) 993 994 995typedef struct _FWDownloadTCSGE 996{ 997 U8 Reserved; /* 00h */ 998 U8 ContextSize; /* 01h */ 999 U8 DetailsLength; /* 02h */ 1000 U8 Flags; /* 03h */ 1001 U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */ 1002 U32 ImageOffset; /* 08h */ 1003 U32 ImageSize; /* 0Ch */ 1004} FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE, 1005 FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t; 1006 1007/* Firmware Download reply */ 1008typedef struct _MSG_FW_DOWNLOAD_REPLY 1009{ 1010 U8 ImageType; /* 00h */ 1011 U8 Reserved; /* 01h */ 1012 U8 MsgLength; /* 02h */ 1013 U8 Function; /* 03h */ 1014 U8 Reserved1[3]; /* 04h */ 1015 U8 MsgFlags; /* 07h */ 1016 U32 MsgContext; /* 08h */ 1017 U16 Reserved2; /* 0Ch */ 1018 U16 IOCStatus; /* 0Eh */ 1019 U32 IOCLogInfo; /* 10h */ 1020} MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY, 1021 FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t; 1022 1023 1024/****************************************************************************/ 1025/* Firmware Upload message and associated structures */ 1026/****************************************************************************/ 1027 1028typedef struct _MSG_FW_UPLOAD 1029{ 1030 U8 ImageType; /* 00h */ 1031 U8 Reserved; /* 01h */ 1032 U8 ChainOffset; /* 02h */ 1033 U8 Function; /* 03h */ 1034 U8 Reserved1[3]; /* 04h */ 1035 U8 MsgFlags; /* 07h */ 1036 U32 MsgContext; /* 08h */ 1037 SGE_MPI_UNION SGL; /* 0Ch */ 1038} MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD, 1039 FWUpload_t, MPI_POINTER pFWUpload_t; 1040 1041#define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00) 1042#define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01) 1043#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02) 1044#define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03) 1045#define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04) 1046#define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05) 1047#define MPI_FW_UPLOAD_ITYPE_MANUFACTURING (0x06) 1048#define MPI_FW_UPLOAD_ITYPE_CONFIG_1 (0x07) 1049#define MPI_FW_UPLOAD_ITYPE_CONFIG_2 (0x08) 1050#define MPI_FW_UPLOAD_ITYPE_MEGARAID (0x09) 1051#define MPI_FW_UPLOAD_ITYPE_COMPLETE (0x0A) 1052 1053typedef struct _FWUploadTCSGE 1054{ 1055 U8 Reserved; /* 00h */ 1056 U8 ContextSize; /* 01h */ 1057 U8 DetailsLength; /* 02h */ 1058 U8 Flags; /* 03h */ 1059 U32 Reserved1; /* 04h */ 1060 U32 ImageOffset; /* 08h */ 1061 U32 ImageSize; /* 0Ch */ 1062} FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE, 1063 FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t; 1064 1065/* Firmware Upload reply */ 1066typedef struct _MSG_FW_UPLOAD_REPLY 1067{ 1068 U8 ImageType; /* 00h */ 1069 U8 Reserved; /* 01h */ 1070 U8 MsgLength; /* 02h */ 1071 U8 Function; /* 03h */ 1072 U8 Reserved1[3]; /* 04h */ 1073 U8 MsgFlags; /* 07h */ 1074 U32 MsgContext; /* 08h */ 1075 U16 Reserved2; /* 0Ch */ 1076 U16 IOCStatus; /* 0Eh */ 1077 U32 IOCLogInfo; /* 10h */ 1078 U32 ActualImageSize; /* 14h */ 1079} MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY, 1080 FWUploadReply_t, MPI_POINTER pFWUploadReply_t; 1081 1082 1083typedef struct _MPI_FW_HEADER 1084{ 1085 U32 ArmBranchInstruction0; /* 00h */ 1086 U32 Signature0; /* 04h */ 1087 U32 Signature1; /* 08h */ 1088 U32 Signature2; /* 0Ch */ 1089 U32 ArmBranchInstruction1; /* 10h */ 1090 U32 ArmBranchInstruction2; /* 14h */ 1091 U32 Reserved; /* 18h */ 1092 U32 Checksum; /* 1Ch */ 1093 U16 VendorId; /* 20h */ 1094 U16 ProductId; /* 22h */ 1095 MPI_FW_VERSION FWVersion; /* 24h */ 1096 U32 SeqCodeVersion; /* 28h */ 1097 U32 ImageSize; /* 2Ch */ 1098 U32 NextImageHeaderOffset; /* 30h */ 1099 U32 LoadStartAddress; /* 34h */ 1100 U32 IopResetVectorValue; /* 38h */ 1101 U32 IopResetRegAddr; /* 3Ch */ 1102 U32 VersionNameWhat; /* 40h */ 1103 U8 VersionName[32]; /* 44h */ 1104 U32 VendorNameWhat; /* 64h */ 1105 U8 VendorName[32]; /* 68h */ 1106} MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER, 1107 MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t; 1108 1109#define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840) 1110 1111/* defines for using the ProductId field */ 1112#define MPI_FW_HEADER_PID_TYPE_MASK (0xF000) 1113#define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000) 1114#define MPI_FW_HEADER_PID_TYPE_FC (0x1000) 1115#define MPI_FW_HEADER_PID_TYPE_SAS (0x2000) 1116 1117#define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A) 1118#define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5) 1119#define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA) 1120 1121#define MPI_FW_HEADER_PID_PROD_MASK (0x0F00) 1122#define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100) 1123#define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200) 1124#define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300) 1125#define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400) 1126#define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500) 1127#define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600) 1128#define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700) 1129 1130#define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF) 1131/* SCSI */ 1132#define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001) 1133#define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002) 1134#define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003) 1135#define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004) 1136#define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005) 1137#define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006) 1138#define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007) 1139#define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008) 1140#define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009) 1141#define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A) 1142#define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B) 1143#define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C) 1144/* Fibre Channel */ 1145#define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000) 1146#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */ 1147#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */ 1148#define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */ 1149#define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */ 1150#define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005) 1151#define MPI_FW_HEADER_PID_FAMILY_949E_FC (0x0006) 1152/* SAS */ 1153#define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001) 1154#define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002) 1155#define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003) 1156#define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */ 1157 1158typedef struct _MPI_EXT_IMAGE_HEADER 1159{ 1160 U8 ImageType; /* 00h */ 1161 U8 Reserved; /* 01h */ 1162 U16 Reserved1; /* 02h */ 1163 U32 Checksum; /* 04h */ 1164 U32 ImageSize; /* 08h */ 1165 U32 NextImageHeaderOffset; /* 0Ch */ 1166 U32 LoadStartAddress; /* 10h */ 1167 U32 Reserved2; /* 14h */ 1168} MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER, 1169 MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t; 1170 1171/* defines for the ImageType field */ 1172#define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00) 1173#define MPI_EXT_IMAGE_TYPE_FW (0x01) 1174#define MPI_EXT_IMAGE_TYPE_NVDATA (0x03) 1175#define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04) 1176#define MPI_EXT_IMAGE_TYPE_INITIALIZATION (0x05) 1177 1178#endif 1179