1/* 2 * Copyright (C) 2006-2007 PA Semi, Inc 3 * 4 * SMBus host driver for PA Semi PWRficient 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 */ 19 20#include <linux/module.h> 21#include <linux/pci.h> 22#include <linux/kernel.h> 23#include <linux/stddef.h> 24#include <linux/sched.h> 25#include <linux/i2c.h> 26#include <linux/delay.h> 27#include <asm/io.h> 28 29static struct pci_driver pasemi_smb_driver; 30 31struct pasemi_smbus { 32 struct pci_dev *dev; 33 struct i2c_adapter adapter; 34 unsigned long base; 35 int size; 36}; 37 38/* Register offsets */ 39#define REG_MTXFIFO 0x00 40#define REG_MRXFIFO 0x04 41#define REG_SMSTA 0x14 42#define REG_CTL 0x1c 43 44/* Register defs */ 45#define MTXFIFO_READ 0x00000400 46#define MTXFIFO_STOP 0x00000200 47#define MTXFIFO_START 0x00000100 48#define MTXFIFO_DATA_M 0x000000ff 49 50#define MRXFIFO_EMPTY 0x00000100 51#define MRXFIFO_DATA_M 0x000000ff 52 53#define SMSTA_XEN 0x08000000 54 55#define CTL_MRR 0x00000400 56#define CTL_MTR 0x00000200 57#define CTL_CLK_M 0x000000ff 58 59#define CLK_100K_DIV 84 60#define CLK_400K_DIV 21 61 62static inline void reg_write(struct pasemi_smbus *smbus, int reg, int val) 63{ 64 dev_dbg(&smbus->dev->dev, "smbus write reg %lx val %08x\n", 65 smbus->base + reg, val); 66 outl(val, smbus->base + reg); 67} 68 69static inline int reg_read(struct pasemi_smbus *smbus, int reg) 70{ 71 int ret; 72 ret = inl(smbus->base + reg); 73 dev_dbg(&smbus->dev->dev, "smbus read reg %lx val %08x\n", 74 smbus->base + reg, ret); 75 return ret; 76} 77 78#define TXFIFO_WR(smbus, reg) reg_write((smbus), REG_MTXFIFO, (reg)) 79#define RXFIFO_RD(smbus) reg_read((smbus), REG_MRXFIFO) 80 81static void pasemi_smb_clear(struct pasemi_smbus *smbus) 82{ 83 unsigned int status; 84 85 status = reg_read(smbus, REG_SMSTA); 86 reg_write(smbus, REG_SMSTA, status); 87} 88 89static unsigned int pasemi_smb_waitready(struct pasemi_smbus *smbus) 90{ 91 int timeout = 10; 92 unsigned int status; 93 94 status = reg_read(smbus, REG_SMSTA); 95 96 while (!(status & SMSTA_XEN) && timeout--) { 97 msleep(1); 98 status = reg_read(smbus, REG_SMSTA); 99 } 100 101 if (timeout < 0) { 102 dev_warn(&smbus->dev->dev, "Timeout, status 0x%08x\n", status); 103 reg_write(smbus, REG_SMSTA, status); 104 return -ETIME; 105 } 106 107 /* Clear XEN */ 108 reg_write(smbus, REG_SMSTA, SMSTA_XEN); 109 110 return 0; 111} 112 113static int pasemi_i2c_xfer_msg(struct i2c_adapter *adapter, 114 struct i2c_msg *msg, int stop) 115{ 116 struct pasemi_smbus *smbus = adapter->algo_data; 117 int read, i, err; 118 u32 rd; 119 120 read = msg->flags & I2C_M_RD ? 1 : 0; 121 122 TXFIFO_WR(smbus, MTXFIFO_START | (msg->addr << 1) | read); 123 124 if (read) { 125 TXFIFO_WR(smbus, msg->len | MTXFIFO_READ | 126 (stop ? MTXFIFO_STOP : 0)); 127 128 err = pasemi_smb_waitready(smbus); 129 if (err) 130 goto reset_out; 131 132 for (i = 0; i < msg->len; i++) { 133 rd = RXFIFO_RD(smbus); 134 if (rd & MRXFIFO_EMPTY) { 135 err = -ENODATA; 136 goto reset_out; 137 } 138 msg->buf[i] = rd & MRXFIFO_DATA_M; 139 } 140 } else { 141 for (i = 0; i < msg->len - 1; i++) 142 TXFIFO_WR(smbus, msg->buf[i]); 143 144 TXFIFO_WR(smbus, msg->buf[msg->len-1] | 145 (stop ? MTXFIFO_STOP : 0)); 146 } 147 148 return 0; 149 150 reset_out: 151 reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR | 152 (CLK_100K_DIV & CTL_CLK_M))); 153 return err; 154} 155 156static int pasemi_i2c_xfer(struct i2c_adapter *adapter, 157 struct i2c_msg *msgs, int num) 158{ 159 struct pasemi_smbus *smbus = adapter->algo_data; 160 int ret, i; 161 162 pasemi_smb_clear(smbus); 163 164 ret = 0; 165 166 for (i = 0; i < num && !ret; i++) 167 ret = pasemi_i2c_xfer_msg(adapter, &msgs[i], (i == (num - 1))); 168 169 return ret ? ret : num; 170} 171 172static int pasemi_smb_xfer(struct i2c_adapter *adapter, 173 u16 addr, unsigned short flags, char read_write, u8 command, 174 int size, union i2c_smbus_data *data) 175{ 176 struct pasemi_smbus *smbus = adapter->algo_data; 177 unsigned int rd; 178 int read_flag, err; 179 int len = 0, i; 180 181 /* All our ops take 8-bit shifted addresses */ 182 addr <<= 1; 183 read_flag = read_write == I2C_SMBUS_READ; 184 185 pasemi_smb_clear(smbus); 186 187 switch (size) { 188 case I2C_SMBUS_QUICK: 189 TXFIFO_WR(smbus, addr | read_flag | MTXFIFO_START | 190 MTXFIFO_STOP); 191 break; 192 case I2C_SMBUS_BYTE: 193 TXFIFO_WR(smbus, addr | read_flag | MTXFIFO_START); 194 if (read_write) 195 TXFIFO_WR(smbus, 1 | MTXFIFO_STOP | MTXFIFO_READ); 196 else 197 TXFIFO_WR(smbus, MTXFIFO_STOP | command); 198 break; 199 case I2C_SMBUS_BYTE_DATA: 200 TXFIFO_WR(smbus, addr | MTXFIFO_START); 201 TXFIFO_WR(smbus, command); 202 if (read_write) { 203 TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START); 204 TXFIFO_WR(smbus, 1 | MTXFIFO_READ | MTXFIFO_STOP); 205 } else { 206 TXFIFO_WR(smbus, MTXFIFO_STOP | data->byte); 207 } 208 break; 209 case I2C_SMBUS_WORD_DATA: 210 TXFIFO_WR(smbus, addr | MTXFIFO_START); 211 TXFIFO_WR(smbus, command); 212 if (read_write) { 213 TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START); 214 TXFIFO_WR(smbus, 2 | MTXFIFO_READ | MTXFIFO_STOP); 215 } else { 216 TXFIFO_WR(smbus, data->word & MTXFIFO_DATA_M); 217 TXFIFO_WR(smbus, MTXFIFO_STOP | (data->word >> 8)); 218 } 219 break; 220 case I2C_SMBUS_BLOCK_DATA: 221 TXFIFO_WR(smbus, addr | MTXFIFO_START); 222 TXFIFO_WR(smbus, command); 223 if (read_write) { 224 TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START); 225 TXFIFO_WR(smbus, 1 | MTXFIFO_READ); 226 rd = RXFIFO_RD(smbus); 227 len = min_t(u8, (rd & MRXFIFO_DATA_M), 228 I2C_SMBUS_BLOCK_MAX); 229 TXFIFO_WR(smbus, len | MTXFIFO_READ | 230 MTXFIFO_STOP); 231 } else { 232 len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX); 233 TXFIFO_WR(smbus, len); 234 for (i = 1; i < len; i++) 235 TXFIFO_WR(smbus, data->block[i]); 236 TXFIFO_WR(smbus, data->block[len] | MTXFIFO_STOP); 237 } 238 break; 239 case I2C_SMBUS_PROC_CALL: 240 read_write = I2C_SMBUS_READ; 241 TXFIFO_WR(smbus, addr | MTXFIFO_START); 242 TXFIFO_WR(smbus, command); 243 TXFIFO_WR(smbus, data->word & MTXFIFO_DATA_M); 244 TXFIFO_WR(smbus, (data->word >> 8) & MTXFIFO_DATA_M); 245 TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START); 246 TXFIFO_WR(smbus, 2 | MTXFIFO_STOP | MTXFIFO_READ); 247 break; 248 case I2C_SMBUS_BLOCK_PROC_CALL: 249 len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX - 1); 250 read_write = I2C_SMBUS_READ; 251 TXFIFO_WR(smbus, addr | MTXFIFO_START); 252 TXFIFO_WR(smbus, command); 253 TXFIFO_WR(smbus, len); 254 for (i = 1; i <= len; i++) 255 TXFIFO_WR(smbus, data->block[i]); 256 TXFIFO_WR(smbus, addr | I2C_SMBUS_READ); 257 TXFIFO_WR(smbus, MTXFIFO_READ | 1); 258 rd = RXFIFO_RD(smbus); 259 len = min_t(u8, (rd & MRXFIFO_DATA_M), 260 I2C_SMBUS_BLOCK_MAX - len); 261 TXFIFO_WR(smbus, len | MTXFIFO_READ | MTXFIFO_STOP); 262 break; 263 264 default: 265 dev_warn(&adapter->dev, "Unsupported transaction %d\n", size); 266 return -EINVAL; 267 } 268 269 err = pasemi_smb_waitready(smbus); 270 if (err) 271 goto reset_out; 272 273 if (read_write == I2C_SMBUS_WRITE) 274 return 0; 275 276 switch (size) { 277 case I2C_SMBUS_BYTE: 278 case I2C_SMBUS_BYTE_DATA: 279 rd = RXFIFO_RD(smbus); 280 if (rd & MRXFIFO_EMPTY) { 281 err = -ENODATA; 282 goto reset_out; 283 } 284 data->byte = rd & MRXFIFO_DATA_M; 285 break; 286 case I2C_SMBUS_WORD_DATA: 287 case I2C_SMBUS_PROC_CALL: 288 rd = RXFIFO_RD(smbus); 289 if (rd & MRXFIFO_EMPTY) { 290 err = -ENODATA; 291 goto reset_out; 292 } 293 data->word = rd & MRXFIFO_DATA_M; 294 rd = RXFIFO_RD(smbus); 295 if (rd & MRXFIFO_EMPTY) { 296 err = -ENODATA; 297 goto reset_out; 298 } 299 data->word |= (rd & MRXFIFO_DATA_M) << 8; 300 break; 301 case I2C_SMBUS_BLOCK_DATA: 302 case I2C_SMBUS_BLOCK_PROC_CALL: 303 data->block[0] = len; 304 for (i = 1; i <= len; i ++) { 305 rd = RXFIFO_RD(smbus); 306 if (rd & MRXFIFO_EMPTY) { 307 err = -ENODATA; 308 goto reset_out; 309 } 310 data->block[i] = rd & MRXFIFO_DATA_M; 311 } 312 break; 313 } 314 315 return 0; 316 317 reset_out: 318 reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR | 319 (CLK_100K_DIV & CTL_CLK_M))); 320 return err; 321} 322 323static u32 pasemi_smb_func(struct i2c_adapter *adapter) 324{ 325 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 326 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 327 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_PROC_CALL | 328 I2C_FUNC_SMBUS_BLOCK_PROC_CALL | I2C_FUNC_I2C; 329} 330 331static const struct i2c_algorithm smbus_algorithm = { 332 .master_xfer = pasemi_i2c_xfer, 333 .smbus_xfer = pasemi_smb_xfer, 334 .functionality = pasemi_smb_func, 335}; 336 337static int __devinit pasemi_smb_probe(struct pci_dev *dev, 338 const struct pci_device_id *id) 339{ 340 struct pasemi_smbus *smbus; 341 int error; 342 343 if (!(pci_resource_flags(dev, 0) & IORESOURCE_IO)) 344 return -ENODEV; 345 346 smbus = kzalloc(sizeof(struct pasemi_smbus), GFP_KERNEL); 347 if (!smbus) 348 return -ENOMEM; 349 350 smbus->dev = dev; 351 smbus->base = pci_resource_start(dev, 0); 352 smbus->size = pci_resource_len(dev, 0); 353 354 if (!request_region(smbus->base, smbus->size, 355 pasemi_smb_driver.name)) { 356 error = -EBUSY; 357 goto out_kfree; 358 } 359 360 smbus->adapter.owner = THIS_MODULE; 361 snprintf(smbus->adapter.name, sizeof(smbus->adapter.name), 362 "PA Semi SMBus adapter at 0x%lx", smbus->base); 363 smbus->adapter.class = I2C_CLASS_HWMON; 364 smbus->adapter.algo = &smbus_algorithm; 365 smbus->adapter.algo_data = smbus; 366 367 /* set up the driverfs linkage to our parent device */ 368 smbus->adapter.dev.parent = &dev->dev; 369 370 reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR | 371 (CLK_100K_DIV & CTL_CLK_M))); 372 373 error = i2c_add_adapter(&smbus->adapter); 374 if (error) 375 goto out_release_region; 376 377 pci_set_drvdata(dev, smbus); 378 379 return 0; 380 381 out_release_region: 382 release_region(smbus->base, smbus->size); 383 out_kfree: 384 kfree(smbus); 385 return error; 386} 387 388static void __devexit pasemi_smb_remove(struct pci_dev *dev) 389{ 390 struct pasemi_smbus *smbus = pci_get_drvdata(dev); 391 392 i2c_del_adapter(&smbus->adapter); 393 release_region(smbus->base, smbus->size); 394 kfree(smbus); 395} 396 397static struct pci_device_id pasemi_smb_ids[] = { 398 { PCI_DEVICE(0x1959, 0xa003) }, 399 { 0, } 400}; 401 402MODULE_DEVICE_TABLE(pci, pasemi_smb_ids); 403 404static struct pci_driver pasemi_smb_driver = { 405 .name = "i2c-pasemi", 406 .id_table = pasemi_smb_ids, 407 .probe = pasemi_smb_probe, 408 .remove = __devexit_p(pasemi_smb_remove), 409}; 410 411static int __init pasemi_smb_init(void) 412{ 413 return pci_register_driver(&pasemi_smb_driver); 414} 415 416static void __exit pasemi_smb_exit(void) 417{ 418 pci_unregister_driver(&pasemi_smb_driver); 419} 420 421MODULE_LICENSE("GPL"); 422MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>"); 423MODULE_DESCRIPTION("PA Semi PWRficient SMBus driver"); 424 425module_init(pasemi_smb_init); 426module_exit(pasemi_smb_exit); 427