1/* 2 * arch/v850/kernel/mb_a_pci.c -- PCI support for Midas lab RTE-MOTHER-A board 3 * 4 * Copyright (C) 2001,02,03,05 NEC Electronics Corporation 5 * Copyright (C) 2001,02,03,05 Miles Bader <miles@gnu.org> 6 * 7 * This file is subject to the terms and conditions of the GNU General 8 * Public License. See the file COPYING in the main directory of this 9 * archive for more details. 10 * 11 * Written by Miles Bader <miles@gnu.org> 12 */ 13 14#include <linux/kernel.h> 15#include <linux/module.h> 16#include <linux/init.h> 17#include <linux/slab.h> 18#include <linux/spinlock.h> 19#include <linux/pci.h> 20 21#include <asm/machdep.h> 22 23/* __nomods_init is like __devinit, but is a no-op when modules are enabled. 24 This is used by some routines that can be called either during boot 25 or by a module. */ 26#ifdef CONFIG_MODULES 27#define __nomods_init /*nothing*/ 28#else 29#define __nomods_init __devinit 30#endif 31 32/* PCI devices on the Mother-A board can only do DMA to/from the MB SRAM 33 (the RTE-V850E/MA1-CB cpu board doesn't support PCI access to 34 CPU-board memory), and since linux DMA buffers are allocated in 35 normal kernel memory, we basically have to copy DMA blocks around 36 (this is like a `bounce buffer'). When a DMA block is `mapped', we 37 allocate an identically sized block in MB SRAM, and if we're doing 38 output to the device, copy the CPU-memory block to the MB-SRAM block. 39 When an active block is `unmapped', we will copy the block back to 40 CPU memory if necessary, and then deallocate the MB SRAM block. 41 Ack. */ 42 43/* Where the motherboard SRAM is in the PCI-bus address space (the 44 first 512K of it is also mapped at PCI address 0). */ 45#define PCI_MB_SRAM_ADDR 0x800000 46 47/* Convert CPU-view MB SRAM address to/from PCI-view addresses of the 48 same memory. */ 49#define MB_SRAM_TO_PCI(mb_sram_addr) \ 50 ((dma_addr_t)mb_sram_addr - MB_A_SRAM_ADDR + PCI_MB_SRAM_ADDR) 51#define PCI_TO_MB_SRAM(pci_addr) \ 52 (void *)(pci_addr - PCI_MB_SRAM_ADDR + MB_A_SRAM_ADDR) 53 54static void pcibios_assign_resources (void); 55 56struct mb_pci_dev_irq { 57 unsigned dev; /* PCI device number */ 58 unsigned irq_base; /* First IRQ */ 59 unsigned query_pin; /* True if we should read the device's 60 Interrupt Pin info, and allocate 61 interrupt IRQ_BASE + PIN. */ 62}; 63 64/* PCI interrupts are mapped statically to GBUS interrupts. */ 65static struct mb_pci_dev_irq mb_pci_dev_irqs[] = { 66 /* Motherboard SB82558 ethernet controller */ 67 { 10, IRQ_MB_A_LAN, 0 }, 68 /* PCI slot 1 */ 69 { 8, IRQ_MB_A_PCI1(0), 1 }, 70 /* PCI slot 2 */ 71 { 9, IRQ_MB_A_PCI2(0), 1 } 72}; 73#define NUM_MB_PCI_DEV_IRQS ARRAY_SIZE(mb_pci_dev_irqs) 74 75 76/* PCI configuration primitives. */ 77 78#define CONFIG_DMCFGA(bus, devfn, offs) \ 79 (0x80000000 \ 80 | ((offs) & ~0x3) \ 81 | ((devfn) << 8) \ 82 | ((bus)->number << 16)) 83 84static int 85mb_pci_read (struct pci_bus *bus, unsigned devfn, int offs, int size, u32 *rval) 86{ 87 u32 addr; 88 int flags; 89 90 local_irq_save (flags); 91 92 MB_A_PCI_PCICR = 0x7; 93 MB_A_PCI_DMCFGA = CONFIG_DMCFGA (bus, devfn, offs); 94 95 addr = MB_A_PCI_IO_ADDR + (offs & 0x3); 96 97 switch (size) { 98 case 1: *rval = *(volatile u8 *)addr; break; 99 case 2: *rval = *(volatile u16 *)addr; break; 100 case 4: *rval = *(volatile u32 *)addr; break; 101 } 102 103 if (MB_A_PCI_PCISR & 0x2000) { 104 MB_A_PCI_PCISR = 0x2000; 105 *rval = ~0; 106 } 107 108 MB_A_PCI_DMCFGA = 0; 109 110 local_irq_restore (flags); 111 112 return PCIBIOS_SUCCESSFUL; 113} 114 115static int 116mb_pci_write (struct pci_bus *bus, unsigned devfn, int offs, int size, u32 val) 117{ 118 u32 addr; 119 int flags; 120 121 local_irq_save (flags); 122 123 MB_A_PCI_PCICR = 0x7; 124 MB_A_PCI_DMCFGA = CONFIG_DMCFGA (bus, devfn, offs); 125 126 addr = MB_A_PCI_IO_ADDR + (offs & 0x3); 127 128 switch (size) { 129 case 1: *(volatile u8 *)addr = val; break; 130 case 2: *(volatile u16 *)addr = val; break; 131 case 4: *(volatile u32 *)addr = val; break; 132 } 133 134 if (MB_A_PCI_PCISR & 0x2000) 135 MB_A_PCI_PCISR = 0x2000; 136 137 MB_A_PCI_DMCFGA = 0; 138 139 local_irq_restore (flags); 140 141 return PCIBIOS_SUCCESSFUL; 142} 143 144static struct pci_ops mb_pci_config_ops = { 145 .read = mb_pci_read, 146 .write = mb_pci_write, 147}; 148 149 150/* PCI Initialization. */ 151 152static struct pci_bus *mb_pci_bus = 0; 153 154/* Do initial PCI setup. */ 155static int __devinit pcibios_init (void) 156{ 157 u32 id = MB_A_PCI_PCIHIDR; 158 u16 vendor = id & 0xFFFF; 159 u16 device = (id >> 16) & 0xFFFF; 160 161 if (vendor == PCI_VENDOR_ID_PLX && device == PCI_DEVICE_ID_PLX_9080) { 162 printk (KERN_INFO 163 "PCI: PLX Technology PCI9080 HOST/PCI bridge\n"); 164 165 MB_A_PCI_PCICR = 0x147; 166 167 MB_A_PCI_PCIBAR0 = 0x007FFF00; 168 MB_A_PCI_PCIBAR1 = 0x0000FF00; 169 MB_A_PCI_PCIBAR2 = 0x00800000; 170 171 MB_A_PCI_PCILTR = 0x20; 172 173 MB_A_PCI_PCIPBAM |= 0x3; 174 175 MB_A_PCI_PCISR = ~0; /* Clear errors. */ 176 177 /* Reprogram the motherboard's IO/config address space, 178 as we don't support the GCS7 address space that the 179 default uses. */ 180 181 /* Significant address bits used for decoding PCI GCS5 space 182 accessess. */ 183 MB_A_PCI_DMRR = ~(MB_A_PCI_MEM_SIZE - 1); 184 185#if GCS5_SIZE == 0x00800000 186#define GCS5_CFG_OFFS 0x00800000 187#else 188#define GCS5_CFG_OFFS 0 189#endif 190 191 /* Address bit values for matching. Note that we have to give 192 the address from the motherboard's point of view, which is 193 different than the CPU's. */ 194 /* PCI memory space. */ 195 MB_A_PCI_DMLBAM = GCS5_CFG_OFFS + 0x0; 196 /* PCI I/O space. */ 197 MB_A_PCI_DMLBAI = 198 GCS5_CFG_OFFS + (MB_A_PCI_IO_ADDR - GCS5_ADDR); 199 200 mb_pci_bus = pci_scan_bus (0, &mb_pci_config_ops, 0); 201 202 pcibios_assign_resources (); 203 } else 204 printk (KERN_ERR "PCI: HOST/PCI bridge not found\n"); 205 206 return 0; 207} 208 209subsys_initcall (pcibios_init); 210 211char __devinit *pcibios_setup (char *option) 212{ 213 /* Don't handle any options. */ 214 return option; 215} 216 217 218int __nomods_init pcibios_enable_device (struct pci_dev *dev, int mask) 219{ 220 u16 cmd, old_cmd; 221 int idx; 222 struct resource *r; 223 224 pci_read_config_word(dev, PCI_COMMAND, &cmd); 225 old_cmd = cmd; 226 for (idx = 0; idx < 6; idx++) { 227 r = &dev->resource[idx]; 228 if (!r->start && r->end) { 229 printk(KERN_ERR "PCI: Device %s not available because " 230 "of resource collisions\n", pci_name(dev)); 231 return -EINVAL; 232 } 233 if (r->flags & IORESOURCE_IO) 234 cmd |= PCI_COMMAND_IO; 235 if (r->flags & IORESOURCE_MEM) 236 cmd |= PCI_COMMAND_MEMORY; 237 } 238 if (cmd != old_cmd) { 239 printk("PCI: Enabling device %s (%04x -> %04x)\n", 240 pci_name(dev), old_cmd, cmd); 241 pci_write_config_word(dev, PCI_COMMAND, cmd); 242 } 243 return 0; 244} 245 246 247/* Resource allocation. */ 248static void __devinit pcibios_assign_resources (void) 249{ 250 struct pci_dev *dev = NULL; 251 struct resource *r; 252 253 for_each_pci_dev(dev) { 254 unsigned di_num; 255 unsigned class = dev->class >> 8; 256 257 if (class && class != PCI_CLASS_BRIDGE_HOST) { 258 unsigned r_num; 259 for(r_num = 0; r_num < 6; r_num++) { 260 r = &dev->resource[r_num]; 261 if (!r->start && r->end) 262 pci_assign_resource (dev, r_num); 263 } 264 } 265 266 /* Assign interrupts. */ 267 for (di_num = 0; di_num < NUM_MB_PCI_DEV_IRQS; di_num++) { 268 struct mb_pci_dev_irq *di = &mb_pci_dev_irqs[di_num]; 269 270 if (di->dev == PCI_SLOT (dev->devfn)) { 271 unsigned irq = di->irq_base; 272 273 if (di->query_pin) { 274 /* Find out which interrupt pin 275 this device uses (each PCI 276 slot has 4). */ 277 u8 irq_pin; 278 279 pci_read_config_byte (dev, 280 PCI_INTERRUPT_PIN, 281 &irq_pin); 282 283 if (irq_pin == 0) 284 /* Doesn't use interrupts. */ 285 continue; 286 else 287 irq += irq_pin - 1; 288 } 289 290 pcibios_update_irq (dev, irq); 291 } 292 } 293 } 294} 295 296void __devinit pcibios_update_irq (struct pci_dev *dev, int irq) 297{ 298 dev->irq = irq; 299 pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq); 300} 301 302void __devinit 303pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, 304 struct resource *res) 305{ 306 unsigned long offset = 0; 307 308 if (res->flags & IORESOURCE_IO) { 309 offset = MB_A_PCI_IO_ADDR; 310 } else if (res->flags & IORESOURCE_MEM) { 311 offset = MB_A_PCI_MEM_ADDR; 312 } 313 314 region->start = res->start - offset; 315 region->end = res->end - offset; 316} 317 318 319/* Stubs for things we don't use. */ 320 321/* Called after each bus is probed, but before its children are examined. */ 322void pcibios_fixup_bus(struct pci_bus *b) 323{ 324} 325 326void 327pcibios_align_resource (void *data, struct resource *res, 328 resource_size_t size, resource_size_t align) 329{ 330} 331 332void pcibios_set_master (struct pci_dev *dev) 333{ 334} 335 336 337/* Mother-A SRAM memory allocation. This is a simple first-fit allocator. */ 338 339/* A memory free-list node. */ 340struct mb_sram_free_area { 341 void *mem; 342 unsigned long size; 343 struct mb_sram_free_area *next; 344}; 345 346/* The tail of the free-list, which starts out containing all the SRAM. */ 347static struct mb_sram_free_area mb_sram_free_tail = { 348 (void *)MB_A_SRAM_ADDR, MB_A_SRAM_SIZE, 0 349}; 350 351/* The free-list. */ 352static struct mb_sram_free_area *mb_sram_free_areas = &mb_sram_free_tail; 353 354/* The free-list of free free-list nodes. (:-) */ 355static struct mb_sram_free_area *mb_sram_free_free_areas = 0; 356 357/* Spinlock protecting the above globals. */ 358static DEFINE_SPINLOCK(mb_sram_lock); 359 360/* Allocate a memory block at least SIZE bytes long in the Mother-A SRAM 361 space. */ 362static void *alloc_mb_sram (size_t size) 363{ 364 struct mb_sram_free_area *prev, *fa; 365 unsigned long flags; 366 void *mem = 0; 367 368 spin_lock_irqsave (mb_sram_lock, flags); 369 370 /* Look for a free area that can contain SIZE bytes. */ 371 for (prev = 0, fa = mb_sram_free_areas; fa; prev = fa, fa = fa->next) 372 if (fa->size >= size) { 373 /* Found one! */ 374 mem = fa->mem; 375 376 if (fa->size == size) { 377 /* In fact, it fits exactly, so remove 378 this node from the free-list. */ 379 if (prev) 380 prev->next = fa->next; 381 else 382 mb_sram_free_areas = fa->next; 383 /* Put it on the free-list-entry-free-list. */ 384 fa->next = mb_sram_free_free_areas; 385 mb_sram_free_free_areas = fa; 386 } else { 387 /* FA is bigger than SIZE, so just 388 reduce its size to account for this 389 allocation. */ 390 fa->mem += size; 391 fa->size -= size; 392 } 393 394 break; 395 } 396 397 spin_unlock_irqrestore (mb_sram_lock, flags); 398 399 return mem; 400} 401 402/* Return the memory area MEM of size SIZE to the MB SRAM free pool. */ 403static void free_mb_sram (void *mem, size_t size) 404{ 405 struct mb_sram_free_area *prev, *fa, *new_fa; 406 unsigned long flags; 407 void *end = mem + size; 408 409 spin_lock_irqsave (mb_sram_lock, flags); 410 411 retry: 412 /* Find an adjacent free-list entry. */ 413 for (prev = 0, fa = mb_sram_free_areas; fa; prev = fa, fa = fa->next) 414 if (fa->mem == end) { 415 /* FA is just after MEM, grow down to encompass it. */ 416 fa->mem = mem; 417 fa->size += size; 418 goto done; 419 } else if (fa->mem + fa->size == mem) { 420 struct mb_sram_free_area *next_fa = fa->next; 421 422 /* FA is just before MEM, expand to encompass it. */ 423 fa->size += size; 424 425 /* See if FA can now be merged with its successor. */ 426 if (next_fa && fa->mem + fa->size == next_fa->mem) { 427 /* Yup; merge NEXT_FA's info into FA. */ 428 fa->size += next_fa->size; 429 fa->next = next_fa->next; 430 /* Free NEXT_FA. */ 431 next_fa->next = mb_sram_free_free_areas; 432 mb_sram_free_free_areas = next_fa; 433 } 434 goto done; 435 } else if (fa->mem > mem) 436 /* We've reached the right spot in the free-list 437 without finding an adjacent free-area, so add 438 a new free area to hold mem. */ 439 break; 440 441 /* Make a new free-list entry. */ 442 443 /* First, get a free-list entry. */ 444 if (! mb_sram_free_free_areas) { 445 /* There are none, so make some. */ 446 void *block; 447 size_t block_size = sizeof (struct mb_sram_free_area) * 8; 448 449 /* Don't hold the lock while calling kmalloc (I'm not 450 sure whether it would be a problem, since we use 451 GFP_ATOMIC, but it makes me nervous). */ 452 spin_unlock_irqrestore (mb_sram_lock, flags); 453 454 block = kmalloc (block_size, GFP_ATOMIC); 455 if (! block) 456 panic ("free_mb_sram: can't allocate free-list entry"); 457 458 /* Now get the lock back. */ 459 spin_lock_irqsave (mb_sram_lock, flags); 460 461 /* Add the new free free-list entries. */ 462 while (block_size > 0) { 463 struct mb_sram_free_area *nfa = block; 464 nfa->next = mb_sram_free_free_areas; 465 mb_sram_free_free_areas = nfa; 466 block += sizeof *nfa; 467 block_size -= sizeof *nfa; 468 } 469 470 /* Since we dropped the lock to call kmalloc, the 471 free-list could have changed, so retry from the 472 beginning. */ 473 goto retry; 474 } 475 476 /* Remove NEW_FA from the free-list of free-list entries. */ 477 new_fa = mb_sram_free_free_areas; 478 mb_sram_free_free_areas = new_fa->next; 479 480 /* NEW_FA initially holds only MEM. */ 481 new_fa->mem = mem; 482 new_fa->size = size; 483 484 /* Insert NEW_FA in the free-list between PREV and FA. */ 485 new_fa->next = fa; 486 if (prev) 487 prev->next = new_fa; 488 else 489 mb_sram_free_areas = new_fa; 490 491 done: 492 spin_unlock_irqrestore (mb_sram_lock, flags); 493} 494 495 496/* Maintainence of CPU -> Mother-A DMA mappings. */ 497 498struct dma_mapping { 499 void *cpu_addr; 500 void *mb_sram_addr; 501 size_t size; 502 struct dma_mapping *next; 503}; 504 505/* A list of mappings from CPU addresses to MB SRAM addresses for active 506 DMA blocks (that have been `granted' to the PCI device). */ 507static struct dma_mapping *active_dma_mappings = 0; 508 509/* A list of free mapping objects. */ 510static struct dma_mapping *free_dma_mappings = 0; 511 512/* Spinlock protecting the above globals. */ 513static DEFINE_SPINLOCK(dma_mappings_lock); 514 515static struct dma_mapping *new_dma_mapping (size_t size) 516{ 517 unsigned long flags; 518 struct dma_mapping *mapping; 519 void *mb_sram_block = alloc_mb_sram (size); 520 521 if (! mb_sram_block) 522 return 0; 523 524 spin_lock_irqsave (dma_mappings_lock, flags); 525 526 if (! free_dma_mappings) { 527 /* We're out of mapping structures, make more. */ 528 void *mblock; 529 size_t mblock_size = sizeof (struct dma_mapping) * 8; 530 531 /* Don't hold the lock while calling kmalloc (I'm not 532 sure whether it would be a problem, since we use 533 GFP_ATOMIC, but it makes me nervous). */ 534 spin_unlock_irqrestore (dma_mappings_lock, flags); 535 536 mblock = kmalloc (mblock_size, GFP_ATOMIC); 537 if (! mblock) { 538 free_mb_sram (mb_sram_block, size); 539 return 0; 540 } 541 542 /* Get the lock back. */ 543 spin_lock_irqsave (dma_mappings_lock, flags); 544 545 /* Add the new mapping structures to the free-list. */ 546 while (mblock_size > 0) { 547 struct dma_mapping *fm = mblock; 548 fm->next = free_dma_mappings; 549 free_dma_mappings = fm; 550 mblock += sizeof *fm; 551 mblock_size -= sizeof *fm; 552 } 553 } 554 555 /* Get a mapping struct from the freelist. */ 556 mapping = free_dma_mappings; 557 free_dma_mappings = mapping->next; 558 559 /* Initialize the mapping. Other fields should be filled in by 560 caller. */ 561 mapping->mb_sram_addr = mb_sram_block; 562 mapping->size = size; 563 564 /* Add it to the list of active mappings. */ 565 mapping->next = active_dma_mappings; 566 active_dma_mappings = mapping; 567 568 spin_unlock_irqrestore (dma_mappings_lock, flags); 569 570 return mapping; 571} 572 573static struct dma_mapping *find_dma_mapping (void *mb_sram_addr) 574{ 575 unsigned long flags; 576 struct dma_mapping *mapping; 577 578 spin_lock_irqsave (dma_mappings_lock, flags); 579 580 for (mapping = active_dma_mappings; mapping; mapping = mapping->next) 581 if (mapping->mb_sram_addr == mb_sram_addr) { 582 spin_unlock_irqrestore (dma_mappings_lock, flags); 583 return mapping; 584 } 585 586 panic ("find_dma_mapping: unmapped PCI DMA addr 0x%x", 587 MB_SRAM_TO_PCI (mb_sram_addr)); 588} 589 590static struct dma_mapping *deactivate_dma_mapping (void *mb_sram_addr) 591{ 592 unsigned long flags; 593 struct dma_mapping *mapping, *prev; 594 595 spin_lock_irqsave (dma_mappings_lock, flags); 596 597 for (prev = 0, mapping = active_dma_mappings; 598 mapping; 599 prev = mapping, mapping = mapping->next) 600 { 601 if (mapping->mb_sram_addr == mb_sram_addr) { 602 /* This is the MAPPING; deactivate it. */ 603 if (prev) 604 prev->next = mapping->next; 605 else 606 active_dma_mappings = mapping->next; 607 608 spin_unlock_irqrestore (dma_mappings_lock, flags); 609 610 return mapping; 611 } 612 } 613 614 panic ("deactivate_dma_mapping: unmapped PCI DMA addr 0x%x", 615 MB_SRAM_TO_PCI (mb_sram_addr)); 616} 617 618/* Return MAPPING to the freelist. */ 619static inline void 620free_dma_mapping (struct dma_mapping *mapping) 621{ 622 unsigned long flags; 623 624 free_mb_sram (mapping->mb_sram_addr, mapping->size); 625 626 spin_lock_irqsave (dma_mappings_lock, flags); 627 628 mapping->next = free_dma_mappings; 629 free_dma_mappings = mapping; 630 631 spin_unlock_irqrestore (dma_mappings_lock, flags); 632} 633 634 635/* Single PCI DMA mappings. */ 636 637/* `Grant' to PDEV the memory block at CPU_ADDR, for doing DMA. The 638 32-bit PCI bus mastering address to use is returned. the device owns 639 this memory until either pci_unmap_single or pci_dma_sync_single is 640 performed. */ 641dma_addr_t 642pci_map_single (struct pci_dev *pdev, void *cpu_addr, size_t size, int dir) 643{ 644 struct dma_mapping *mapping = new_dma_mapping (size); 645 646 if (! mapping) 647 return 0; 648 649 mapping->cpu_addr = cpu_addr; 650 651 if (dir == PCI_DMA_BIDIRECTIONAL || dir == PCI_DMA_TODEVICE) 652 memcpy (mapping->mb_sram_addr, cpu_addr, size); 653 654 return MB_SRAM_TO_PCI (mapping->mb_sram_addr); 655} 656 657/* Return to the CPU the PCI DMA memory block previously `granted' to 658 PDEV, at DMA_ADDR. */ 659void pci_unmap_single (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, 660 int dir) 661{ 662 void *mb_sram_addr = PCI_TO_MB_SRAM (dma_addr); 663 struct dma_mapping *mapping = deactivate_dma_mapping (mb_sram_addr); 664 665 if (size != mapping->size) 666 panic ("pci_unmap_single: size (%d) doesn't match" 667 " size of mapping at PCI DMA addr 0x%x (%d)\n", 668 size, dma_addr, mapping->size); 669 670 /* Copy back the DMA'd contents if necessary. */ 671 if (dir == PCI_DMA_BIDIRECTIONAL || dir == PCI_DMA_FROMDEVICE) 672 memcpy (mapping->cpu_addr, mb_sram_addr, size); 673 674 /* Return mapping to the freelist. */ 675 free_dma_mapping (mapping); 676} 677 678/* Make physical memory consistent for a single streaming mode DMA 679 translation after a transfer. 680 681 If you perform a pci_map_single() but wish to interrogate the 682 buffer using the cpu, yet do not wish to teardown the PCI dma 683 mapping, you must call this function before doing so. At the next 684 point you give the PCI dma address back to the card, you must first 685 perform a pci_dma_sync_for_device, and then the device again owns 686 the buffer. */ 687void 688pci_dma_sync_single_for_cpu (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, 689 int dir) 690{ 691 void *mb_sram_addr = PCI_TO_MB_SRAM (dma_addr); 692 struct dma_mapping *mapping = find_dma_mapping (mb_sram_addr); 693 694 /* Synchronize the DMA buffer with the CPU buffer if necessary. */ 695 if (dir == PCI_DMA_FROMDEVICE) 696 memcpy (mapping->cpu_addr, mb_sram_addr, size); 697 else if (dir == PCI_DMA_TODEVICE) 698 ; /* nothing to do */ 699 else 700 panic("pci_dma_sync_single: unsupported sync dir: %d", dir); 701} 702 703void 704pci_dma_sync_single_for_device (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, 705 int dir) 706{ 707 void *mb_sram_addr = PCI_TO_MB_SRAM (dma_addr); 708 struct dma_mapping *mapping = find_dma_mapping (mb_sram_addr); 709 710 /* Synchronize the DMA buffer with the CPU buffer if necessary. */ 711 if (dir == PCI_DMA_FROMDEVICE) 712 ; /* nothing to do */ 713 else if (dir == PCI_DMA_TODEVICE) 714 memcpy (mb_sram_addr, mapping->cpu_addr, size); 715 else 716 panic("pci_dma_sync_single: unsupported sync dir: %d", dir); 717} 718 719 720/* Scatter-gather PCI DMA mappings. */ 721 722/* Do multiple DMA mappings at once. */ 723int 724pci_map_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len, int dir) 725{ 726 BUG (); 727 return 0; 728} 729 730/* Unmap multiple DMA mappings at once. */ 731void 732pci_unmap_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len,int dir) 733{ 734 BUG (); 735} 736 737/* Make physical memory consistent for a set of streaming mode DMA 738 translations after a transfer. The same as pci_dma_sync_single_* but 739 for a scatter-gather list, same rules and usage. */ 740 741void 742pci_dma_sync_sg_for_cpu (struct pci_dev *dev, 743 struct scatterlist *sg, int sg_len, 744 int dir) 745{ 746 BUG (); 747} 748 749void 750pci_dma_sync_sg_for_device (struct pci_dev *dev, 751 struct scatterlist *sg, int sg_len, 752 int dir) 753{ 754 BUG (); 755} 756 757 758/* PCI mem mapping. */ 759 760/* Allocate and map kernel buffer using consistent mode DMA for PCI 761 device. Returns non-NULL cpu-view pointer to the buffer if 762 successful and sets *DMA_ADDR to the pci side dma address as well, 763 else DMA_ADDR is undefined. */ 764void * 765pci_alloc_consistent (struct pci_dev *pdev, size_t size, dma_addr_t *dma_addr) 766{ 767 void *mb_sram_mem = alloc_mb_sram (size); 768 if (mb_sram_mem) 769 *dma_addr = MB_SRAM_TO_PCI (mb_sram_mem); 770 return mb_sram_mem; 771} 772 773/* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must 774 be values that were returned from pci_alloc_consistent. SIZE must be 775 the same as what as passed into pci_alloc_consistent. References to 776 the memory and mappings assosciated with CPU_ADDR or DMA_ADDR past 777 this call are illegal. */ 778void 779pci_free_consistent (struct pci_dev *pdev, size_t size, void *cpu_addr, 780 dma_addr_t dma_addr) 781{ 782 void *mb_sram_mem = PCI_TO_MB_SRAM (dma_addr); 783 free_mb_sram (mb_sram_mem, size); 784} 785 786 787/* iomap/iomap */ 788 789void __iomem *pci_iomap (struct pci_dev *dev, int bar, unsigned long max) 790{ 791 unsigned long start = pci_resource_start (dev, bar); 792 unsigned long len = pci_resource_len (dev, bar); 793 794 if (!start || len == 0) 795 return 0; 796 797 /* None of the ioremap functions actually do anything, other than 798 re-casting their argument, so don't bother differentiating them. */ 799 return ioremap (start, len); 800} 801 802void pci_iounmap (struct pci_dev *dev, void __iomem *addr) 803{ 804 /* nothing */ 805} 806 807 808/* symbol exports (for modules) */ 809 810EXPORT_SYMBOL (pci_map_single); 811EXPORT_SYMBOL (pci_unmap_single); 812EXPORT_SYMBOL (pci_alloc_consistent); 813EXPORT_SYMBOL (pci_free_consistent); 814EXPORT_SYMBOL (pci_dma_sync_single_for_cpu); 815EXPORT_SYMBOL (pci_dma_sync_single_for_device); 816EXPORT_SYMBOL (pci_iomap); 817EXPORT_SYMBOL (pci_iounmap); 818