1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License.  See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mach-harp/setup.c
7 *
8 * SH-5 Simulator Platform Support
9 *
10 * This file handles the architecture-dependent parts of initialization
11 *
12 * Copyright (C) 2000, 2001  Paolo Alberelli
13 *
14 * benedict.gaster@superh.com:	 3rd May 2002
15 *    Added support for ramdisk, removing statically linked romfs at the same time. *
16 *
17 * lethal@linux-sh.org:          15th May 2003
18 *    Use the generic procfs cpuinfo interface, just return a valid board name.
19 */
20
21#include <linux/stddef.h>
22#include <linux/init.h>
23#include <linux/mm.h>
24#include <linux/bootmem.h>
25#include <linux/delay.h>
26#include <linux/kernel.h>
27#include <asm/processor.h>
28#include <asm/platform.h>
29#include <asm/io.h>
30#include <asm/irq.h>
31#include <asm/page.h>
32
33#define RES_COUNT(res) ((sizeof((res))/sizeof(struct resource)))
34
35/*
36 * Platform Dependent Interrupt Priorities.
37 */
38
39/* Using defaults defined in irq.h */
40#define	RES NO_PRIORITY		/* Disabled */
41#define IR0 IRL0_PRIORITY	/* IRLs */
42#define IR1 IRL1_PRIORITY
43#define IR2 IRL2_PRIORITY
44#define IR3 IRL3_PRIORITY
45#define PCA INTA_PRIORITY	/* PCI Ints */
46#define PCB INTB_PRIORITY
47#define PCC INTC_PRIORITY
48#define PCD INTD_PRIORITY
49#define SER TOP_PRIORITY
50#define ERR TOP_PRIORITY
51#define PW0 TOP_PRIORITY
52#define PW1 TOP_PRIORITY
53#define PW2 TOP_PRIORITY
54#define PW3 TOP_PRIORITY
55#define DM0 NO_PRIORITY		/* DMA Ints */
56#define DM1 NO_PRIORITY
57#define DM2 NO_PRIORITY
58#define DM3 NO_PRIORITY
59#define DAE NO_PRIORITY
60#define TU0 TIMER_PRIORITY	/* TMU Ints */
61#define TU1 NO_PRIORITY
62#define TU2 NO_PRIORITY
63#define TI2 NO_PRIORITY
64#define ATI NO_PRIORITY		/* RTC Ints */
65#define PRI NO_PRIORITY
66#define CUI RTC_PRIORITY
67#define ERI SCIF_PRIORITY	/* SCIF Ints */
68#define RXI SCIF_PRIORITY
69#define BRI SCIF_PRIORITY
70#define TXI SCIF_PRIORITY
71#define ITI TOP_PRIORITY	/* WDT Ints */
72
73/*
74 * Platform dependent structures: maps and parms block.
75 */
76struct resource io_resources[] = {
77	/* To be updated with external devices */
78};
79
80struct resource kram_resources[] = {
81	{ "Kernel code", 0, 0 },	/* These must be last in the array */
82	{ "Kernel data", 0, 0 }		/* These must be last in the array */
83};
84
85struct resource xram_resources[] = {
86	/* To be updated with external devices */
87};
88
89struct resource rom_resources[] = {
90	/* To be updated with external devices */
91};
92
93struct sh64_platform platform_parms = {
94	.readonly_rootfs =	1,
95	.initial_root_dev =	0x0100,
96	.loader_type =		1,
97	.io_res_p =		io_resources,
98	.io_res_count =		RES_COUNT(io_resources),
99	.kram_res_p =		kram_resources,
100	.kram_res_count =	RES_COUNT(kram_resources),
101	.xram_res_p =		xram_resources,
102	.xram_res_count =	RES_COUNT(xram_resources),
103	.rom_res_p =		rom_resources,
104	.rom_res_count =	RES_COUNT(rom_resources),
105};
106
107int platform_int_priority[NR_INTC_IRQS] = {
108	IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD,	/* IRQ  0- 7 */
109	RES, RES, RES, RES, SER, ERR, PW3, PW2,	/* IRQ  8-15 */
110	PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES,	/* IRQ 16-23 */
111	RES, RES, RES, RES, RES, RES, RES, RES,	/* IRQ 24-31 */
112	TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI,	/* IRQ 32-39 */
113	RXI, BRI, TXI, RES, RES, RES, RES, RES,	/* IRQ 40-47 */
114	RES, RES, RES, RES, RES, RES, RES, RES,	/* IRQ 48-55 */
115	RES, RES, RES, RES, RES, RES, RES, ITI,	/* IRQ 56-63 */
116};
117
118void __init platform_setup(void)
119{
120	/* Harp platform leaves the decision to head.S, for now */
121	platform_parms.fpu_flags = fpu_in_use;
122}
123
124void __init platform_monitor(void)
125{
126	/* Nothing yet .. */
127}
128
129void __init platform_reserve(void)
130{
131	/* Nothing yet .. */
132}
133
134const char *get_system_type(void)
135{
136	return "ST50 Harp";
137}
138