1/* 2 * arch/sh/kernel/cpu/sh2a/clock-sh7206.c 3 * 4 * SH7206 support for the clock framework 5 * 6 * Copyright (C) 2006 Yoshinori Sato 7 * 8 * Based on clock-sh4.c 9 * Copyright (C) 2005 Paul Mundt 10 * 11 * This file is subject to the terms and conditions of the GNU General Public 12 * License. See the file "COPYING" in the main directory of this archive 13 * for more details. 14 */ 15#include <linux/init.h> 16#include <linux/kernel.h> 17#include <asm/clock.h> 18#include <asm/freq.h> 19#include <asm/io.h> 20 21static const int pll1rate[]={1,2,3,4,6,8}; 22static const int pfc_divisors[]={1,2,3,4,6,8,12}; 23#define ifc_divisors pfc_divisors 24 25#if (CONFIG_SH_CLK_MD == 2) 26#define PLL2 (4) 27#elif (CONFIG_SH_CLK_MD == 6) 28#define PLL2 (2) 29#elif (CONFIG_SH_CLK_MD == 7) 30#define PLL2 (1) 31#else 32#error "Illigal Clock Mode!" 33#endif 34 35static void master_clk_init(struct clk *clk) 36{ 37 clk->rate *= PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; 38} 39 40static struct clk_ops sh7206_master_clk_ops = { 41 .init = master_clk_init, 42}; 43 44static void module_clk_recalc(struct clk *clk) 45{ 46 int idx = (ctrl_inw(FREQCR) & 0x0007); 47 clk->rate = clk->parent->rate / pfc_divisors[idx]; 48} 49 50static struct clk_ops sh7206_module_clk_ops = { 51 .recalc = module_clk_recalc, 52}; 53 54static void bus_clk_recalc(struct clk *clk) 55{ 56 clk->rate = clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; 57} 58 59static struct clk_ops sh7206_bus_clk_ops = { 60 .recalc = bus_clk_recalc, 61}; 62 63static void cpu_clk_recalc(struct clk *clk) 64{ 65 int idx = (ctrl_inw(FREQCR) & 0x0007); 66 clk->rate = clk->parent->rate / ifc_divisors[idx]; 67} 68 69static struct clk_ops sh7206_cpu_clk_ops = { 70 .recalc = cpu_clk_recalc, 71}; 72 73static struct clk_ops *sh7206_clk_ops[] = { 74 &sh7206_master_clk_ops, 75 &sh7206_module_clk_ops, 76 &sh7206_bus_clk_ops, 77 &sh7206_cpu_clk_ops, 78}; 79 80void __init arch_init_clk_ops(struct clk_ops **ops, int idx) 81{ 82 if (idx < ARRAY_SIZE(sh7206_clk_ops)) 83 *ops = sh7206_clk_ops[idx]; 84} 85