1/*
2 * Definitions for Motorola SPS Sandpoint Test Platform
3 *
4 * Author: Mark A. Greer
5 *         mgreer@mvista.com
6 *
7 * 2000-2003 (c) MontaVista, Software, Inc.  This file is licensed under
8 * the terms of the GNU General Public License version 2.  This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 */
12
13/*
14 * Sandpoint uses the CHRP map (Map B).
15 */
16
17#ifndef __PPC_PLATFORMS_SANDPOINT_H
18#define __PPC_PLATFORMS_SANDPOINT_H
19
20#include <asm/ppcboot.h>
21
22#define SANDPOINT_IDE_INT0		14	/* 8259 Test */
23#define SANDPOINT_IDE_INT1		15	/* 8259 Test */
24
25/*
26 * The sandpoint boards have processor modules that either have an 8240 or
27 * an MPC107 host bridge on them.  These bridges have an IDSEL line that allows
28 * them to respond to PCI transactions as if they were a normal PCI devices.
29 * However, the processor on the processor side of the bridge can not reach
30 * out onto the PCI bus and then select the bridge or bad things will happen
31 * (documented in the 8240 and 107 manuals).
32 * Because of this, we always skip the bridge PCI device when accessing the
33 * PCI bus.  The PCI slot that the bridge occupies is defined by the macro
34 * below.
35 */
36#define SANDPOINT_HOST_BRIDGE_IDSEL     12
37
38/*
39 * Serial defines.
40 */
41#define SANDPOINT_SERIAL_0		0xfe0003f8
42#define SANDPOINT_SERIAL_1		0xfe0002f8
43
44#define RS_TABLE_SIZE  2
45
46/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
47#define BASE_BAUD			( 1843200 / 16 )
48#define UART_CLK			1843200
49
50#ifdef CONFIG_SERIAL_DETECT_IRQ
51#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_AUTO_IRQ)
52#else
53#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF)
54#endif
55
56#define STD_SERIAL_PORT_DFNS \
57        { 0, BASE_BAUD, SANDPOINT_SERIAL_0, 4, STD_COM_FLAGS, /* ttyS0 */ \
58		iomem_base: (u8 *)SANDPOINT_SERIAL_0,			  \
59		io_type: SERIAL_IO_MEM },				  \
60        { 0, BASE_BAUD, SANDPOINT_SERIAL_1, 3, STD_COM_FLAGS, /* ttyS1 */ \
61		iomem_base: (u8 *)SANDPOINT_SERIAL_1,			  \
62		io_type: SERIAL_IO_MEM },
63
64#define SERIAL_PORT_DFNS \
65        STD_SERIAL_PORT_DFNS
66
67#endif /* __PPC_PLATFORMS_SANDPOINT_H */
68