1/* 2 * arch/mips/pmc-sierra/yosemite/i2c-yosemite.h 3 * 4 * Copyright (C) 2003 PMC-Sierra Inc. 5 * Author: Manish Lachwani (lachwani@pmc-sierra.com) 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 * 12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 22 * 23 * You should have received a copy of the GNU General Public License along 24 * with this program; if not, write to the Free Software Foundation, Inc., 25 * 675 Mass Ave, Cambridge, MA 02139, USA. 26 */ 27 28#ifndef __I2C_YOSEMITE_H 29#define __I2C_YOSEMITE_H 30 31/* Read and Write operations to the chip */ 32 33#define TITAN_I2C_BASE 0xbb000000 34 35#define TITAN_I2C_WRITE(offset, data) \ 36 *(volatile unsigned long *)(TITAN_I2C_BASE + offset) = data 37 38#define TITAN_I2C_READ(offset) *(volatile unsigned long *)(TITAN_I2C_BASE + offset) 39 40 41/* Local constansts*/ 42#define TITAN_I2C_MAX_FILTER 15 43#define TITAN_I2C_MAX_CLK 1023 44#define TITAN_I2C_MAX_ARBF 15 45#define TITAN_I2C_MAX_NAK 15 46#define TITAN_I2C_MAX_MASTERCODE 7 47#define TITAN_I2C_MAX_WORDS_PER_RW 4 48#define TITAN_I2C_MAX_POLL 100 49 50/* Registers used for I2C work */ 51#define TITAN_I2C_SCMB_CONTROL 0x0180 /* SCMB Control */ 52#define TITAN_I2C_SCMB_CLOCK_A 0x0184 /* SCMB Clock A */ 53#define TITAN_I2C_SCMB_CLOCK_B 0x0188 /* SCMB Clock B */ 54#define TITAN_I2C_CONFIG 0x01A0 /* I2C Config */ 55#define TITAN_I2C_COMMAND 0x01A4 /* I2C Command */ 56#define TITAN_I2C_SLAVE_ADDRESS 0x01A8 /* I2C Slave Address */ 57#define TITAN_I2C_DATA 0x01AC /* I2C Data [15:0] */ 58#define TITAN_I2C_INTERRUPTS 0x01BC /* I2C Interrupts */ 59 60/* Error */ 61#define TITAN_I2C_ERR_ARB_LOST (-9220) 62#define TITAN_I2C_ERR_NO_RESP (-9221) 63#define TITAN_I2C_ERR_DATA_COLLISION (-9222) 64#define TITAN_I2C_ERR_TIMEOUT (-9223) 65#define TITAN_I2C_ERR_OK 0 66 67/* I2C Command Type */ 68typedef enum { 69 TITAN_I2C_CMD_WRITE = 0, 70 TITAN_I2C_CMD_READ = 1, 71 TITAN_I2C_CMD_READ_WRITE = 2 72} titan_i2c_cmd_type; 73 74/* I2C structures */ 75typedef struct { 76 int filtera; /* Register 0x0184, bits 15 - 12 */ 77 int clka; /* Register 0x0184, bits 9 - 0 */ 78 int filterb; /* Register 0x0188, bits 15 - 12 */ 79 int clkb; /* Register 0x0188, bits 9 - 0 */ 80} titan_i2c_config; 81 82/* I2C command type */ 83typedef struct { 84 titan_i2c_cmd_type type; /* Type of command */ 85 int num_arb; /* Register 0x01a0, bits 15 - 12 */ 86 int num_nak; /* Register 0x01a0, bits 11 - 8 */ 87 int addr_size; /* Register 0x01a0, bit 7 */ 88 int mst_code; /* Register 0x01a0, bits 6 - 4 */ 89 int arb_en; /* Register 0x01a0, bit 1 */ 90 int speed; /* Register 0x01a0, bit 0 */ 91 int slave_addr; /* Register 0x01a8 */ 92 int write_size; /* Register 0x01a4, bits 10 - 8 */ 93 unsigned int *data; /* Register 0x01ac */ 94} titan_i2c_command; 95 96#endif /* __I2C_YOSEMITE_H */ 97