1/* 2 * Dump R4x00 TLB for debugging purposes. 3 * 4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle. 5 * Copyright (C) 1999 by Silicon Graphics, Inc. 6 */ 7#include <linux/kernel.h> 8#include <linux/mm.h> 9#include <linux/sched.h> 10#include <linux/string.h> 11 12#include <asm/bootinfo.h> 13#include <asm/cachectl.h> 14#include <asm/cpu.h> 15#include <asm/mipsregs.h> 16#include <asm/page.h> 17#include <asm/pgtable.h> 18 19static inline const char *msk2str(unsigned int mask) 20{ 21 switch (mask) { 22 case PM_4K: 23 return "4kb"; 24 case PM_16K: 25 return "16kb"; 26 case PM_64K: 27 return "64kb"; 28 case PM_256K: 29 return "256kb"; 30#ifndef CONFIG_CPU_VR41XX 31 case PM_1M: 32 return "1Mb"; 33 case PM_4M: 34 return "4Mb"; 35 case PM_16M: 36 return "16Mb"; 37 case PM_64M: 38 return "64Mb"; 39 case PM_256M: 40 return "256Mb"; 41#endif 42 } 43} 44 45#define BARRIER() \ 46 __asm__ __volatile__( \ 47 ".set\tnoreorder\n\t" \ 48 "nop;nop;nop;nop;nop;nop;nop\n\t" \ 49 ".set\treorder"); 50 51void dump_tlb(int first, int last) 52{ 53 unsigned int pagemask, c0, c1, asid; 54 unsigned long long entrylo0, entrylo1; 55 unsigned long entryhi; 56 int i; 57 58 asid = read_c0_entryhi() & 0xff; 59 60 printk("\n"); 61 for (i = first; i <= last; i++) { 62 write_c0_index(i); 63 BARRIER(); 64 tlb_read(); 65 BARRIER(); 66 pagemask = read_c0_pagemask(); 67 entryhi = read_c0_entryhi(); 68 entrylo0 = read_c0_entrylo0(); 69 entrylo1 = read_c0_entrylo1(); 70 71 /* Unused entries have a virtual address in KSEG0. */ 72 if ((entryhi & 0xf0000000) != 0x80000000 73 && (entryhi & 0xff) == asid) { 74 /* 75 * Only print entries in use 76 */ 77 printk("Index: %2d pgmask=%s ", i, msk2str(pagemask)); 78 79 c0 = (entrylo0 >> 3) & 7; 80 c1 = (entrylo1 >> 3) & 7; 81 82 printk("va=%08lx asid=%02lx\n", 83 (entryhi & 0xffffe000), (entryhi & 0xff)); 84 printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n", 85 (entrylo0 << 6) & PAGE_MASK, c0, 86 (entrylo0 & 4) ? 1 : 0, 87 (entrylo0 & 2) ? 1 : 0, (entrylo0 & 1)); 88 printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n", 89 (entrylo1 << 6) & PAGE_MASK, c1, 90 (entrylo1 & 4) ? 1 : 0, 91 (entrylo1 & 2) ? 1 : 0, (entrylo1 & 1)); 92 printk("\n"); 93 } 94 } 95 96 write_c0_entryhi(asid); 97} 98 99void dump_tlb_all(void) 100{ 101 dump_tlb(0, current_cpu_data.tlbsize - 1); 102} 103 104void dump_tlb_wired(void) 105{ 106 int wired; 107 108 wired = read_c0_wired(); 109 printk("Wired: %d", wired); 110 dump_tlb(0, read_c0_wired()); 111} 112 113void dump_tlb_addr(unsigned long addr) 114{ 115 unsigned int flags, oldpid; 116 int index; 117 118 local_irq_save(flags); 119 oldpid = read_c0_entryhi() & 0xff; 120 BARRIER(); 121 write_c0_entryhi((addr & PAGE_MASK) | oldpid); 122 BARRIER(); 123 tlb_probe(); 124 BARRIER(); 125 index = read_c0_index(); 126 write_c0_entryhi(oldpid); 127 local_irq_restore(flags); 128 129 if (index < 0) { 130 printk("No entry for address 0x%08lx in TLB\n", addr); 131 return; 132 } 133 134 printk("Entry %d maps address 0x%08lx\n", index, addr); 135 dump_tlb(index, index); 136} 137 138void dump_tlb_nonwired(void) 139{ 140 dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1); 141} 142 143void dump_list_process(struct task_struct *t, void *address) 144{ 145 pgd_t *page_dir, *pgd; 146 pud_t *pud; 147 pmd_t *pmd; 148 pte_t *pte, page; 149 unsigned long addr, val; 150 151 addr = (unsigned long) address; 152 153 printk("Addr == %08lx\n", addr); 154 printk("task == %8p\n", t); 155 printk("task->mm == %8p\n", t->mm); 156 //printk("tasks->mm.pgd == %08x\n", (unsigned int) t->mm->pgd); 157 158 if (addr > KSEG0) { 159 page_dir = pgd_offset_k(0); 160 pgd = pgd_offset_k(addr); 161 } else if (t->mm) { 162 page_dir = pgd_offset(t->mm, 0); 163 pgd = pgd_offset(t->mm, addr); 164 } else { 165 printk("Current thread has no mm\n"); 166 return; 167 } 168 printk("page_dir == %08x\n", (unsigned int) page_dir); 169 printk("pgd == %08x, ", (unsigned int) pgd); 170 pud = pud_offset(pgd, addr); 171 printk("pud == %08x, ", (unsigned int) pud); 172 173 pmd = pmd_offset(pud, addr); 174 printk("pmd == %08x, ", (unsigned int) pmd); 175 176 pte = pte_offset(pmd, addr); 177 printk("pte == %08x, ", (unsigned int) pte); 178 179 page = *pte; 180#ifdef CONFIG_64BIT_PHYS_ADDR 181 printk("page == %08Lx\n", pte_val(page)); 182#else 183 printk("page == %08lx\n", pte_val(page)); 184#endif 185 186 val = pte_val(page); 187 if (val & _PAGE_PRESENT) 188 printk("present "); 189 if (val & _PAGE_READ) 190 printk("read "); 191 if (val & _PAGE_WRITE) 192 printk("write "); 193 if (val & _PAGE_ACCESSED) 194 printk("accessed "); 195 if (val & _PAGE_MODIFIED) 196 printk("modified "); 197 if (val & _PAGE_R4KBUG) 198 printk("r4kbug "); 199 if (val & _PAGE_GLOBAL) 200 printk("global "); 201 if (val & _PAGE_VALID) 202 printk("valid "); 203 printk("\n"); 204} 205 206void dump_list_current(void *address) 207{ 208 dump_list_process(current, address); 209} 210 211unsigned int vtop(void *address) 212{ 213 pgd_t *pgd; 214 pud_t *pud; 215 pmd_t *pmd; 216 pte_t *pte; 217 unsigned int addr, paddr; 218 219 addr = (unsigned long) address; 220 pgd = pgd_offset(current->mm, addr); 221 pud = pud_offset(pgd, addr); 222 pmd = pmd_offset(pud, addr); 223 pte = pte_offset(pmd, addr); 224 paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; 225 paddr |= (addr & ~PAGE_MASK); 226 227 return paddr; 228} 229 230void dump16(unsigned long *p) 231{ 232 int i; 233 234 for (i = 0; i < 8; i++) { 235 printk("*%08lx == %08lx, ", (unsigned long) p, *p); 236 p++; 237 printk("*%08lx == %08lx\n", (unsigned long) p, *p); 238 p++; 239 } 240} 241