1/* 2 * BRIEF MODULE DESCRIPTION 3 * Au1xxx irq map table 4 * 5 * Copyright 2003 Embedded Edge, LLC 6 * dan@embeddededge.com 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * You should have received a copy of the GNU General Public License along 25 * with this program; if not, write to the Free Software Foundation, Inc., 26 * 675 Mass Ave, Cambridge, MA 02139, USA. 27 */ 28#include <linux/errno.h> 29#include <linux/init.h> 30#include <linux/irq.h> 31#include <linux/kernel_stat.h> 32#include <linux/module.h> 33#include <linux/signal.h> 34#include <linux/sched.h> 35#include <linux/types.h> 36#include <linux/interrupt.h> 37#include <linux/ioport.h> 38#include <linux/timex.h> 39#include <linux/slab.h> 40#include <linux/random.h> 41#include <linux/delay.h> 42#include <linux/bitops.h> 43 44#include <asm/bootinfo.h> 45#include <asm/io.h> 46#include <asm/mipsregs.h> 47#include <asm/system.h> 48#include <asm/mach-au1x00/au1000.h> 49 50#ifdef CONFIG_MIPS_DB1500 51char irq_tab_alchemy[][5] __initdata = { 52 [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT371 */ 53 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ 54}; 55#endif 56 57#ifdef CONFIG_MIPS_BOSPORUS 58char irq_tab_alchemy[][5] __initdata = { 59 [11] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 11 - miniPCI */ 60 [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - SN1741 */ 61 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ 62}; 63#endif 64 65#ifdef CONFIG_MIPS_MIRAGE 66char irq_tab_alchemy[][5] __initdata = { 67 [11] = { -1, INTD, INTX, INTX, INTX}, /* IDSEL 11 - SMI VGX */ 68 [12] = { -1, INTX, INTX, INTC, INTX}, /* IDSEL 12 - PNX1300 */ 69 [13] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 13 - miniPCI */ 70}; 71#endif 72 73#ifdef CONFIG_MIPS_DB1550 74char irq_tab_alchemy[][5] __initdata = { 75 [11] = { -1, INTC, INTX, INTX, INTX}, /* IDSEL 11 - on-board HPT371 */ 76 [12] = { -1, INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */ 77 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */ 78}; 79#endif 80 81 82au1xxx_irq_map_t __initdata au1xxx_irq_map[] = { 83 84#ifndef CONFIG_MIPS_MIRAGE 85#ifdef CONFIG_MIPS_DB1550 86 { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card 0 IRQ# */ 87 { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card 1 IRQ# */ 88#else 89 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card 0 Fully_Interted# */ 90 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card 0 STSCHG# */ 91 { AU1000_GPIO_2, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card 0 IRQ# */ 92 93 { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card 1 Fully_Interted# */ 94 { AU1000_GPIO_4, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card 1 STSCHG# */ 95 { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card 1 IRQ# */ 96#endif 97#else 98 { AU1000_GPIO_7, INTC_INT_RISE_EDGE, 0 }, /* touchscreen pen down */ 99#endif 100 101}; 102 103int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map); 104