1/* 2 * linux/arch/m68k/kernel/traps.c 3 * 4 * Copyright (C) 1993, 1994 by Hamish Macdonald 5 * 6 * 68040 fixes by Michael Rausch 7 * 68040 fixes by Martin Apel 8 * 68040 fixes and writeback by Richard Zidlicky 9 * 68060 fixes by Roman Hodek 10 * 68060 fixes by Jesper Skov 11 * 12 * This file is subject to the terms and conditions of the GNU General Public 13 * License. See the file COPYING in the main directory of this archive 14 * for more details. 15 */ 16 17/* 18 * Sets up all exception vectors 19 */ 20 21#include <linux/sched.h> 22#include <linux/signal.h> 23#include <linux/kernel.h> 24#include <linux/mm.h> 25#include <linux/module.h> 26#include <linux/a.out.h> 27#include <linux/user.h> 28#include <linux/string.h> 29#include <linux/linkage.h> 30#include <linux/init.h> 31#include <linux/ptrace.h> 32#include <linux/kallsyms.h> 33 34#include <asm/setup.h> 35#include <asm/fpu.h> 36#include <asm/system.h> 37#include <asm/uaccess.h> 38#include <asm/traps.h> 39#include <asm/pgalloc.h> 40#include <asm/machdep.h> 41#include <asm/siginfo.h> 42 43/* assembler routines */ 44asmlinkage void system_call(void); 45asmlinkage void buserr(void); 46asmlinkage void trap(void); 47asmlinkage void nmihandler(void); 48#ifdef CONFIG_M68KFPU_EMU 49asmlinkage void fpu_emu(void); 50#endif 51 52e_vector vectors[256] = { 53 [VEC_BUSERR] = buserr, 54 [VEC_SYS] = system_call, 55}; 56 57/* nmi handler for the Amiga */ 58asm(".text\n" 59 __ALIGN_STR "\n" 60 "nmihandler: rte"); 61 62/* 63 * this must be called very early as the kernel might 64 * use some instruction that are emulated on the 060 65 */ 66void __init base_trap_init(void) 67{ 68 if(MACH_IS_SUN3X) { 69 extern e_vector *sun3x_prom_vbr; 70 71 __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr)); 72 } 73 74 /* setup the exception vector table */ 75 __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors)); 76 77 if (CPU_IS_060) { 78 /* set up ISP entry points */ 79 asmlinkage void unimp_vec(void) asm ("_060_isp_unimp"); 80 81 vectors[VEC_UNIMPII] = unimp_vec; 82 } 83} 84 85void __init trap_init (void) 86{ 87 int i; 88 89 for (i = VEC_SPUR; i <= VEC_INT7; i++) 90 vectors[i] = bad_inthandler; 91 92 for (i = 0; i < VEC_USER; i++) 93 if (!vectors[i]) 94 vectors[i] = trap; 95 96 for (i = VEC_USER; i < 256; i++) 97 vectors[i] = bad_inthandler; 98 99#ifdef CONFIG_M68KFPU_EMU 100 if (FPU_IS_EMU) 101 vectors[VEC_LINE11] = fpu_emu; 102#endif 103 104 if (CPU_IS_040 && !FPU_IS_EMU) { 105 /* set up FPSP entry points */ 106 asmlinkage void dz_vec(void) asm ("dz"); 107 asmlinkage void inex_vec(void) asm ("inex"); 108 asmlinkage void ovfl_vec(void) asm ("ovfl"); 109 asmlinkage void unfl_vec(void) asm ("unfl"); 110 asmlinkage void snan_vec(void) asm ("snan"); 111 asmlinkage void operr_vec(void) asm ("operr"); 112 asmlinkage void bsun_vec(void) asm ("bsun"); 113 asmlinkage void fline_vec(void) asm ("fline"); 114 asmlinkage void unsupp_vec(void) asm ("unsupp"); 115 116 vectors[VEC_FPDIVZ] = dz_vec; 117 vectors[VEC_FPIR] = inex_vec; 118 vectors[VEC_FPOVER] = ovfl_vec; 119 vectors[VEC_FPUNDER] = unfl_vec; 120 vectors[VEC_FPNAN] = snan_vec; 121 vectors[VEC_FPOE] = operr_vec; 122 vectors[VEC_FPBRUC] = bsun_vec; 123 vectors[VEC_LINE11] = fline_vec; 124 vectors[VEC_FPUNSUP] = unsupp_vec; 125 } 126 127 if (CPU_IS_060 && !FPU_IS_EMU) { 128 /* set up IFPSP entry points */ 129 asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan"); 130 asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr"); 131 asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl"); 132 asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl"); 133 asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz"); 134 asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex"); 135 asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline"); 136 asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp"); 137 asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd"); 138 139 vectors[VEC_FPNAN] = snan_vec6; 140 vectors[VEC_FPOE] = operr_vec6; 141 vectors[VEC_FPOVER] = ovfl_vec6; 142 vectors[VEC_FPUNDER] = unfl_vec6; 143 vectors[VEC_FPDIVZ] = dz_vec6; 144 vectors[VEC_FPIR] = inex_vec6; 145 vectors[VEC_LINE11] = fline_vec6; 146 vectors[VEC_FPUNSUP] = unsupp_vec6; 147 vectors[VEC_UNIMPEA] = effadd_vec6; 148 } 149 150 /* if running on an amiga, make the NMI interrupt do nothing */ 151 if (MACH_IS_AMIGA) { 152 vectors[VEC_INT7] = nmihandler; 153 } 154} 155 156 157static const char *vec_names[] = { 158 [VEC_RESETSP] = "RESET SP", 159 [VEC_RESETPC] = "RESET PC", 160 [VEC_BUSERR] = "BUS ERROR", 161 [VEC_ADDRERR] = "ADDRESS ERROR", 162 [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION", 163 [VEC_ZERODIV] = "ZERO DIVIDE", 164 [VEC_CHK] = "CHK", 165 [VEC_TRAP] = "TRAPcc", 166 [VEC_PRIV] = "PRIVILEGE VIOLATION", 167 [VEC_TRACE] = "TRACE", 168 [VEC_LINE10] = "LINE 1010", 169 [VEC_LINE11] = "LINE 1111", 170 [VEC_RESV12] = "UNASSIGNED RESERVED 12", 171 [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION", 172 [VEC_FORMAT] = "FORMAT ERROR", 173 [VEC_UNINT] = "UNINITIALIZED INTERRUPT", 174 [VEC_RESV16] = "UNASSIGNED RESERVED 16", 175 [VEC_RESV17] = "UNASSIGNED RESERVED 17", 176 [VEC_RESV18] = "UNASSIGNED RESERVED 18", 177 [VEC_RESV19] = "UNASSIGNED RESERVED 19", 178 [VEC_RESV20] = "UNASSIGNED RESERVED 20", 179 [VEC_RESV21] = "UNASSIGNED RESERVED 21", 180 [VEC_RESV22] = "UNASSIGNED RESERVED 22", 181 [VEC_RESV23] = "UNASSIGNED RESERVED 23", 182 [VEC_SPUR] = "SPURIOUS INTERRUPT", 183 [VEC_INT1] = "LEVEL 1 INT", 184 [VEC_INT2] = "LEVEL 2 INT", 185 [VEC_INT3] = "LEVEL 3 INT", 186 [VEC_INT4] = "LEVEL 4 INT", 187 [VEC_INT5] = "LEVEL 5 INT", 188 [VEC_INT6] = "LEVEL 6 INT", 189 [VEC_INT7] = "LEVEL 7 INT", 190 [VEC_SYS] = "SYSCALL", 191 [VEC_TRAP1] = "TRAP #1", 192 [VEC_TRAP2] = "TRAP #2", 193 [VEC_TRAP3] = "TRAP #3", 194 [VEC_TRAP4] = "TRAP #4", 195 [VEC_TRAP5] = "TRAP #5", 196 [VEC_TRAP6] = "TRAP #6", 197 [VEC_TRAP7] = "TRAP #7", 198 [VEC_TRAP8] = "TRAP #8", 199 [VEC_TRAP9] = "TRAP #9", 200 [VEC_TRAP10] = "TRAP #10", 201 [VEC_TRAP11] = "TRAP #11", 202 [VEC_TRAP12] = "TRAP #12", 203 [VEC_TRAP13] = "TRAP #13", 204 [VEC_TRAP14] = "TRAP #14", 205 [VEC_TRAP15] = "TRAP #15", 206 [VEC_FPBRUC] = "FPCP BSUN", 207 [VEC_FPIR] = "FPCP INEXACT", 208 [VEC_FPDIVZ] = "FPCP DIV BY 0", 209 [VEC_FPUNDER] = "FPCP UNDERFLOW", 210 [VEC_FPOE] = "FPCP OPERAND ERROR", 211 [VEC_FPOVER] = "FPCP OVERFLOW", 212 [VEC_FPNAN] = "FPCP SNAN", 213 [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION", 214 [VEC_MMUCFG] = "MMU CONFIGURATION ERROR", 215 [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR", 216 [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR", 217 [VEC_RESV59] = "UNASSIGNED RESERVED 59", 218 [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60", 219 [VEC_UNIMPII] = "UNASSIGNED RESERVED 61", 220 [VEC_RESV62] = "UNASSIGNED RESERVED 62", 221 [VEC_RESV63] = "UNASSIGNED RESERVED 63", 222}; 223 224static const char *space_names[] = { 225 [0] = "Space 0", 226 [USER_DATA] = "User Data", 227 [USER_PROGRAM] = "User Program", 228#ifndef CONFIG_SUN3 229 [3] = "Space 3", 230#else 231 [FC_CONTROL] = "Control", 232#endif 233 [4] = "Space 4", 234 [SUPER_DATA] = "Super Data", 235 [SUPER_PROGRAM] = "Super Program", 236 [CPU_SPACE] = "CPU" 237}; 238 239void die_if_kernel(char *,struct pt_regs *,int); 240asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address, 241 unsigned long error_code); 242int send_fault_sig(struct pt_regs *regs); 243 244asmlinkage void trap_c(struct frame *fp); 245 246#if defined(CONFIG_M68060) 247static inline void access_error060 (struct frame *fp) 248{ 249 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */ 250 251#ifdef DEBUG 252 printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr); 253#endif 254 255 if (fslw & MMU060_BPE) { 256 /* branch prediction error -> clear branch cache */ 257 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t" 258 "orl #0x00400000,%/d0\n\t" 259 "movec %/d0,%/cacr" 260 : : : "d0" ); 261 /* return if there's no other error */ 262 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE)) 263 return; 264 } 265 266 if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) { 267 unsigned long errorcode; 268 unsigned long addr = fp->un.fmt4.effaddr; 269 270 if (fslw & MMU060_MA) 271 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK; 272 273 errorcode = 1; 274 if (fslw & MMU060_DESC_ERR) { 275 __flush_tlb040_one(addr); 276 errorcode = 0; 277 } 278 if (fslw & MMU060_W) 279 errorcode |= 2; 280#ifdef DEBUG 281 printk("errorcode = %d\n", errorcode ); 282#endif 283 do_page_fault(&fp->ptregs, addr, errorcode); 284 } else if (fslw & (MMU060_SEE)){ 285 /* Software Emulation Error. 286 * fault during mem_read/mem_write in ifpsp060/os.S 287 */ 288 send_fault_sig(&fp->ptregs); 289 } else if (!(fslw & (MMU060_RE|MMU060_WE)) || 290 send_fault_sig(&fp->ptregs) > 0) { 291 printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr); 292 printk( "68060 access error, fslw=%lx\n", fslw ); 293 trap_c( fp ); 294 } 295} 296#endif /* CONFIG_M68060 */ 297 298#if defined(CONFIG_M68040) 299static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs) 300{ 301 unsigned long mmusr; 302 mm_segment_t old_fs = get_fs(); 303 304 set_fs(MAKE_MM_SEG(wbs)); 305 306 if (iswrite) 307 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr)); 308 else 309 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr)); 310 311 asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr)); 312 313 set_fs(old_fs); 314 315 return mmusr; 316} 317 318static inline int do_040writeback1(unsigned short wbs, unsigned long wba, 319 unsigned long wbd) 320{ 321 int res = 0; 322 mm_segment_t old_fs = get_fs(); 323 324 /* set_fs can not be moved, otherwise put_user() may oops */ 325 set_fs(MAKE_MM_SEG(wbs)); 326 327 switch (wbs & WBSIZ_040) { 328 case BA_SIZE_BYTE: 329 res = put_user(wbd & 0xff, (char __user *)wba); 330 break; 331 case BA_SIZE_WORD: 332 res = put_user(wbd & 0xffff, (short __user *)wba); 333 break; 334 case BA_SIZE_LONG: 335 res = put_user(wbd, (int __user *)wba); 336 break; 337 } 338 339 /* set_fs can not be moved, otherwise put_user() may oops */ 340 set_fs(old_fs); 341 342 343#ifdef DEBUG 344 printk("do_040writeback1, res=%d\n",res); 345#endif 346 347 return res; 348} 349 350/* after an exception in a writeback the stack frame corresponding 351 * to that exception is discarded, set a few bits in the old frame 352 * to simulate what it should look like 353 */ 354static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs) 355{ 356 fp->un.fmt7.faddr = wba; 357 fp->un.fmt7.ssw = wbs & 0xff; 358 if (wba != current->thread.faddr) 359 fp->un.fmt7.ssw |= MA_040; 360} 361 362static inline void do_040writebacks(struct frame *fp) 363{ 364 int res = 0; 365 366 if ((fp->un.fmt7.wb2s & WBV_040) && 367 !(fp->un.fmt7.wb2s & WBTT_040)) { 368 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, 369 fp->un.fmt7.wb2d); 370 if (res) 371 fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s); 372 else 373 fp->un.fmt7.wb2s = 0; 374 } 375 376 /* do the 2nd wb only if the first one was successful (except for a kernel wb) */ 377 if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) { 378 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, 379 fp->un.fmt7.wb3d); 380 if (res) 381 { 382 fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s); 383 384 fp->un.fmt7.wb2s = fp->un.fmt7.wb3s; 385 fp->un.fmt7.wb3s &= (~WBV_040); 386 fp->un.fmt7.wb2a = fp->un.fmt7.wb3a; 387 fp->un.fmt7.wb2d = fp->un.fmt7.wb3d; 388 } 389 else 390 fp->un.fmt7.wb3s = 0; 391 } 392 393 if (res) 394 send_fault_sig(&fp->ptregs); 395} 396 397/* 398 * called from sigreturn(), must ensure userspace code didn't 399 * manipulate exception frame to circumvent protection, then complete 400 * pending writebacks 401 * we just clear TM2 to turn it into an userspace access 402 */ 403asmlinkage void berr_040cleanup(struct frame *fp) 404{ 405 fp->un.fmt7.wb2s &= ~4; 406 fp->un.fmt7.wb3s &= ~4; 407 408 do_040writebacks(fp); 409} 410 411static inline void access_error040(struct frame *fp) 412{ 413 unsigned short ssw = fp->un.fmt7.ssw; 414 unsigned long mmusr; 415 416#ifdef DEBUG 417 printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr); 418 printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s, 419 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s); 420 printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n", 421 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a, 422 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d); 423#endif 424 425 if (ssw & ATC_040) { 426 unsigned long addr = fp->un.fmt7.faddr; 427 unsigned long errorcode; 428 429 /* 430 * The MMU status has to be determined AFTER the address 431 * has been corrected if there was a misaligned access (MA). 432 */ 433 if (ssw & MA_040) 434 addr = (addr + 7) & -8; 435 436 /* MMU error, get the MMUSR info for this access */ 437 mmusr = probe040(!(ssw & RW_040), addr, ssw); 438#ifdef DEBUG 439 printk("mmusr = %lx\n", mmusr); 440#endif 441 errorcode = 1; 442 if (!(mmusr & MMU_R_040)) { 443 /* clear the invalid atc entry */ 444 __flush_tlb040_one(addr); 445 errorcode = 0; 446 } 447 448 /* despite what documentation seems to say, RMW 449 * accesses have always both the LK and RW bits set */ 450 if (!(ssw & RW_040) || (ssw & LK_040)) 451 errorcode |= 2; 452 453 if (do_page_fault(&fp->ptregs, addr, errorcode)) { 454#ifdef DEBUG 455 printk("do_page_fault() !=0 \n"); 456#endif 457 if (user_mode(&fp->ptregs)){ 458 /* delay writebacks after signal delivery */ 459#ifdef DEBUG 460 printk(".. was usermode - return\n"); 461#endif 462 return; 463 } 464 /* disable writeback into user space from kernel 465 * (if do_page_fault didn't fix the mapping, 466 * the writeback won't do good) 467 */ 468#ifdef DEBUG 469 printk(".. disabling wb2\n"); 470#endif 471 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr) 472 fp->un.fmt7.wb2s &= ~WBV_040; 473 } 474 } else if (send_fault_sig(&fp->ptregs) > 0) { 475 printk("68040 access error, ssw=%x\n", ssw); 476 trap_c(fp); 477 } 478 479 do_040writebacks(fp); 480} 481#endif /* CONFIG_M68040 */ 482 483#if defined(CONFIG_SUN3) 484#include <asm/sun3mmu.h> 485 486extern int mmu_emu_handle_fault (unsigned long, int, int); 487 488/* sun3 version of bus_error030 */ 489 490static inline void bus_error030 (struct frame *fp) 491{ 492 unsigned char buserr_type = sun3_get_buserr (); 493 unsigned long addr, errorcode; 494 unsigned short ssw = fp->un.fmtb.ssw; 495 extern unsigned long _sun3_map_test_start, _sun3_map_test_end; 496 497#ifdef DEBUG 498 if (ssw & (FC | FB)) 499 printk ("Instruction fault at %#010lx\n", 500 ssw & FC ? 501 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2 502 : 503 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr); 504 if (ssw & DF) 505 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 506 ssw & RW ? "read" : "write", 507 fp->un.fmtb.daddr, 508 space_names[ssw & DFC], fp->ptregs.pc); 509#endif 510 511 /* 512 * Check if this page should be demand-mapped. This needs to go before 513 * the testing for a bad kernel-space access (demand-mapping applies 514 * to kernel accesses too). 515 */ 516 517 if ((ssw & DF) 518 && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) { 519 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0)) 520 return; 521 } 522 523 /* Check for kernel-space pagefault (BAD). */ 524 if (fp->ptregs.sr & PS_S) { 525 /* kernel fault must be a data fault to user space */ 526 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) { 527 // try checking the kernel mappings before surrender 528 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1)) 529 return; 530 /* instruction fault or kernel data fault! */ 531 if (ssw & (FC | FB)) 532 printk ("Instruction fault at %#010lx\n", 533 fp->ptregs.pc); 534 if (ssw & DF) { 535 /* was this fault incurred testing bus mappings? */ 536 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) && 537 (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) { 538 send_fault_sig(&fp->ptregs); 539 return; 540 } 541 542 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 543 ssw & RW ? "read" : "write", 544 fp->un.fmtb.daddr, 545 space_names[ssw & DFC], fp->ptregs.pc); 546 } 547 printk ("BAD KERNEL BUSERR\n"); 548 549 die_if_kernel("Oops", &fp->ptregs,0); 550 force_sig(SIGKILL, current); 551 return; 552 } 553 } else { 554 /* user fault */ 555 if (!(ssw & (FC | FB)) && !(ssw & DF)) 556 /* not an instruction fault or data fault! BAD */ 557 panic ("USER BUSERR w/o instruction or data fault"); 558 } 559 560 561 /* First handle the data fault, if any. */ 562 if (ssw & DF) { 563 addr = fp->un.fmtb.daddr; 564 565// errorcode bit 0: 0 -> no page 1 -> protection fault 566// errorcode bit 1: 0 -> read fault 1 -> write fault 567 568// (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault 569// (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault 570 571 if (buserr_type & SUN3_BUSERR_PROTERR) 572 errorcode = 0x01; 573 else if (buserr_type & SUN3_BUSERR_INVALID) 574 errorcode = 0x00; 575 else { 576#ifdef DEBUG 577 printk ("*** unexpected busfault type=%#04x\n", buserr_type); 578 printk ("invalid %s access at %#lx from pc %#lx\n", 579 !(ssw & RW) ? "write" : "read", addr, 580 fp->ptregs.pc); 581#endif 582 die_if_kernel ("Oops", &fp->ptregs, buserr_type); 583 force_sig (SIGBUS, current); 584 return; 585 } 586 587//todo: wtf is RM bit? --m 588 if (!(ssw & RW) || ssw & RM) 589 errorcode |= 0x02; 590 591 /* Handle page fault. */ 592 do_page_fault (&fp->ptregs, addr, errorcode); 593 594 /* Retry the data fault now. */ 595 return; 596 } 597 598 /* Now handle the instruction fault. */ 599 600 /* Get the fault address. */ 601 if (fp->ptregs.format == 0xA) 602 addr = fp->ptregs.pc + 4; 603 else 604 addr = fp->un.fmtb.baddr; 605 if (ssw & FC) 606 addr -= 2; 607 608 if (buserr_type & SUN3_BUSERR_INVALID) { 609 if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0)) 610 do_page_fault (&fp->ptregs, addr, 0); 611 } else { 612#ifdef DEBUG 613 printk ("protection fault on insn access (segv).\n"); 614#endif 615 force_sig (SIGSEGV, current); 616 } 617} 618#else 619#if defined(CPU_M68020_OR_M68030) 620static inline void bus_error030 (struct frame *fp) 621{ 622 volatile unsigned short temp; 623 unsigned short mmusr; 624 unsigned long addr, errorcode; 625 unsigned short ssw = fp->un.fmtb.ssw; 626#ifdef DEBUG 627 unsigned long desc; 628 629 printk ("pid = %x ", current->pid); 630 printk ("SSW=%#06x ", ssw); 631 632 if (ssw & (FC | FB)) 633 printk ("Instruction fault at %#010lx\n", 634 ssw & FC ? 635 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2 636 : 637 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr); 638 if (ssw & DF) 639 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 640 ssw & RW ? "read" : "write", 641 fp->un.fmtb.daddr, 642 space_names[ssw & DFC], fp->ptregs.pc); 643#endif 644 645 /* ++andreas: If a data fault and an instruction fault happen 646 at the same time map in both pages. */ 647 648 /* First handle the data fault, if any. */ 649 if (ssw & DF) { 650 addr = fp->un.fmtb.daddr; 651 652#ifdef DEBUG 653 asm volatile ("ptestr %3,%2@,#7,%0\n\t" 654 "pmove %%psr,%1@" 655 : "=a&" (desc) 656 : "a" (&temp), "a" (addr), "d" (ssw)); 657#else 658 asm volatile ("ptestr %2,%1@,#7\n\t" 659 "pmove %%psr,%0@" 660 : : "a" (&temp), "a" (addr), "d" (ssw)); 661#endif 662 mmusr = temp; 663 664#ifdef DEBUG 665 printk("mmusr is %#x for addr %#lx in task %p\n", 666 mmusr, addr, current); 667 printk("descriptor address is %#lx, contents %#lx\n", 668 __va(desc), *(unsigned long *)__va(desc)); 669#endif 670 671 errorcode = (mmusr & MMU_I) ? 0 : 1; 672 if (!(ssw & RW) || (ssw & RM)) 673 errorcode |= 2; 674 675 if (mmusr & (MMU_I | MMU_WP)) { 676 if (ssw & 4) { 677 printk("Data %s fault at %#010lx in %s (pc=%#lx)\n", 678 ssw & RW ? "read" : "write", 679 fp->un.fmtb.daddr, 680 space_names[ssw & DFC], fp->ptregs.pc); 681 goto buserr; 682 } 683 /* Don't try to do anything further if an exception was 684 handled. */ 685 if (do_page_fault (&fp->ptregs, addr, errorcode) < 0) 686 return; 687 } else if (!(mmusr & MMU_I)) { 688 /* probably a 020 cas fault */ 689 if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0) 690 printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr); 691 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) { 692 printk("invalid %s access at %#lx from pc %#lx\n", 693 !(ssw & RW) ? "write" : "read", addr, 694 fp->ptregs.pc); 695 die_if_kernel("Oops",&fp->ptregs,mmusr); 696 force_sig(SIGSEGV, current); 697 return; 698 } else { 699 700 printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n", 701 !(ssw & RW) ? "write" : "read", addr, 702 fp->ptregs.pc, ssw); 703 asm volatile ("ptestr #1,%1@,#0\n\t" 704 "pmove %%psr,%0@" 705 : /* no outputs */ 706 : "a" (&temp), "a" (addr)); 707 mmusr = temp; 708 709 printk ("level 0 mmusr is %#x\n", mmusr); 710#ifdef DEBUG 711 printk("Unknown SIGSEGV - 1\n"); 712#endif 713 die_if_kernel("Oops",&fp->ptregs,mmusr); 714 force_sig(SIGSEGV, current); 715 return; 716 } 717 718 /* setup an ATC entry for the access about to be retried */ 719 if (!(ssw & RW) || (ssw & RM)) 720 asm volatile ("ploadw %1,%0@" : /* no outputs */ 721 : "a" (addr), "d" (ssw)); 722 else 723 asm volatile ("ploadr %1,%0@" : /* no outputs */ 724 : "a" (addr), "d" (ssw)); 725 } 726 727 /* Now handle the instruction fault. */ 728 729 if (!(ssw & (FC|FB))) 730 return; 731 732 if (fp->ptregs.sr & PS_S) { 733 printk("Instruction fault at %#010lx\n", 734 fp->ptregs.pc); 735 buserr: 736 printk ("BAD KERNEL BUSERR\n"); 737 die_if_kernel("Oops",&fp->ptregs,0); 738 force_sig(SIGKILL, current); 739 return; 740 } 741 742 /* get the fault address */ 743 if (fp->ptregs.format == 10) 744 addr = fp->ptregs.pc + 4; 745 else 746 addr = fp->un.fmtb.baddr; 747 if (ssw & FC) 748 addr -= 2; 749 750 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0) 751 /* Insn fault on same page as data fault. But we 752 should still create the ATC entry. */ 753 goto create_atc_entry; 754 755#ifdef DEBUG 756 asm volatile ("ptestr #1,%2@,#7,%0\n\t" 757 "pmove %%psr,%1@" 758 : "=a&" (desc) 759 : "a" (&temp), "a" (addr)); 760#else 761 asm volatile ("ptestr #1,%1@,#7\n\t" 762 "pmove %%psr,%0@" 763 : : "a" (&temp), "a" (addr)); 764#endif 765 mmusr = temp; 766 767#ifdef DEBUG 768 printk ("mmusr is %#x for addr %#lx in task %p\n", 769 mmusr, addr, current); 770 printk ("descriptor address is %#lx, contents %#lx\n", 771 __va(desc), *(unsigned long *)__va(desc)); 772#endif 773 774 if (mmusr & MMU_I) 775 do_page_fault (&fp->ptregs, addr, 0); 776 else if (mmusr & (MMU_B|MMU_L|MMU_S)) { 777 printk ("invalid insn access at %#lx from pc %#lx\n", 778 addr, fp->ptregs.pc); 779#ifdef DEBUG 780 printk("Unknown SIGSEGV - 2\n"); 781#endif 782 die_if_kernel("Oops",&fp->ptregs,mmusr); 783 force_sig(SIGSEGV, current); 784 return; 785 } 786 787create_atc_entry: 788 /* setup an ATC entry for the access about to be retried */ 789 asm volatile ("ploadr #2,%0@" : /* no outputs */ 790 : "a" (addr)); 791} 792#endif /* CPU_M68020_OR_M68030 */ 793#endif /* !CONFIG_SUN3 */ 794 795asmlinkage void buserr_c(struct frame *fp) 796{ 797 /* Only set esp0 if coming from user mode */ 798 if (user_mode(&fp->ptregs)) 799 current->thread.esp0 = (unsigned long) fp; 800 801#ifdef DEBUG 802 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format); 803#endif 804 805 switch (fp->ptregs.format) { 806#if defined(CONFIG_M68060) 807 case 4: /* 68060 access error */ 808 access_error060 (fp); 809 break; 810#endif 811#if defined(CONFIG_M68040) 812 case 0x7: /* 68040 access error */ 813 access_error040 (fp); 814 break; 815#endif 816#if defined(CPU_M68020_OR_M68030) 817 case 0xa: 818 case 0xb: 819 bus_error030 (fp); 820 break; 821#endif 822 default: 823 die_if_kernel("bad frame format",&fp->ptregs,0); 824#ifdef DEBUG 825 printk("Unknown SIGSEGV - 4\n"); 826#endif 827 force_sig(SIGSEGV, current); 828 } 829} 830 831 832static int kstack_depth_to_print = 48; 833 834void show_trace(unsigned long *stack) 835{ 836 unsigned long *endstack; 837 unsigned long addr; 838 int i; 839 840 printk("Call Trace:"); 841 addr = (unsigned long)stack + THREAD_SIZE - 1; 842 endstack = (unsigned long *)(addr & -THREAD_SIZE); 843 i = 0; 844 while (stack + 1 <= endstack) { 845 addr = *stack++; 846 /* 847 * If the address is either in the text segment of the 848 * kernel, or in the region which contains vmalloc'ed 849 * memory, it *may* be the address of a calling 850 * routine; if so, print it so that someone tracing 851 * down the cause of the crash will be able to figure 852 * out the call path that was taken. 853 */ 854 if (__kernel_text_address(addr)) { 855#ifndef CONFIG_KALLSYMS 856 if (i % 5 == 0) 857 printk("\n "); 858#endif 859 printk(" [<%08lx>]", addr); 860 print_symbol(" %s\n", addr); 861 i++; 862 } 863 } 864 printk("\n"); 865} 866 867void show_registers(struct pt_regs *regs) 868{ 869 struct frame *fp = (struct frame *)regs; 870 mm_segment_t old_fs = get_fs(); 871 u16 c, *cp; 872 unsigned long addr; 873 int i; 874 875 print_modules(); 876 printk("PC: [<%08lx>]",regs->pc); 877 print_symbol(" %s", regs->pc); 878 printk("\nSR: %04x SP: %p a2: %08lx\n", 879 regs->sr, regs, regs->a2); 880 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", 881 regs->d0, regs->d1, regs->d2, regs->d3); 882 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", 883 regs->d4, regs->d5, regs->a0, regs->a1); 884 885 printk("Process %s (pid: %d, task=%p)\n", 886 current->comm, current->pid, current); 887 addr = (unsigned long)&fp->un; 888 printk("Frame format=%X ", regs->format); 889 switch (regs->format) { 890 case 0x2: 891 printk("instr addr=%08lx\n", fp->un.fmt2.iaddr); 892 addr += sizeof(fp->un.fmt2); 893 break; 894 case 0x3: 895 printk("eff addr=%08lx\n", fp->un.fmt3.effaddr); 896 addr += sizeof(fp->un.fmt3); 897 break; 898 case 0x4: 899 printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n" 900 : "eff addr=%08lx pc=%08lx\n"), 901 fp->un.fmt4.effaddr, fp->un.fmt4.pc); 902 addr += sizeof(fp->un.fmt4); 903 break; 904 case 0x7: 905 printk("eff addr=%08lx ssw=%04x faddr=%08lx\n", 906 fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr); 907 printk("wb 1 stat/addr/data: %04x %08lx %08lx\n", 908 fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0); 909 printk("wb 2 stat/addr/data: %04x %08lx %08lx\n", 910 fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d); 911 printk("wb 3 stat/addr/data: %04x %08lx %08lx\n", 912 fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d); 913 printk("push data: %08lx %08lx %08lx %08lx\n", 914 fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2, 915 fp->un.fmt7.pd3); 916 addr += sizeof(fp->un.fmt7); 917 break; 918 case 0x9: 919 printk("instr addr=%08lx\n", fp->un.fmt9.iaddr); 920 addr += sizeof(fp->un.fmt9); 921 break; 922 case 0xa: 923 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n", 924 fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb, 925 fp->un.fmta.daddr, fp->un.fmta.dobuf); 926 addr += sizeof(fp->un.fmta); 927 break; 928 case 0xb: 929 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n", 930 fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb, 931 fp->un.fmtb.daddr, fp->un.fmtb.dobuf); 932 printk("baddr=%08lx dibuf=%08lx ver=%x\n", 933 fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver); 934 addr += sizeof(fp->un.fmtb); 935 break; 936 default: 937 printk("\n"); 938 } 939 show_stack(NULL, (unsigned long *)addr); 940 941 printk("Code:"); 942 set_fs(KERNEL_DS); 943 cp = (u16 *)regs->pc; 944 for (i = -8; i < 16; i++) { 945 if (get_user(c, cp + i) && i >= 0) { 946 printk(" Bad PC value."); 947 break; 948 } 949 printk(i ? " %04x" : " <%04x>", c); 950 } 951 set_fs(old_fs); 952 printk ("\n"); 953} 954 955void show_stack(struct task_struct *task, unsigned long *stack) 956{ 957 unsigned long *p; 958 unsigned long *endstack; 959 int i; 960 961 if (!stack) { 962 if (task) 963 stack = (unsigned long *)task->thread.esp0; 964 else 965 stack = (unsigned long *)&stack; 966 } 967 endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE); 968 969 printk("Stack from %08lx:", (unsigned long)stack); 970 p = stack; 971 for (i = 0; i < kstack_depth_to_print; i++) { 972 if (p + 1 > endstack) 973 break; 974 if (i % 8 == 0) 975 printk("\n "); 976 printk(" %08lx", *p++); 977 } 978 printk("\n"); 979 show_trace(stack); 980} 981 982/* 983 * The architecture-independent backtrace generator 984 */ 985void dump_stack(void) 986{ 987 unsigned long stack; 988 989 show_trace(&stack); 990} 991 992EXPORT_SYMBOL(dump_stack); 993 994void bad_super_trap (struct frame *fp) 995{ 996 console_verbose(); 997 if (fp->ptregs.vector < 4 * ARRAY_SIZE(vec_names)) 998 printk ("*** %s *** FORMAT=%X\n", 999 vec_names[(fp->ptregs.vector) >> 2], 1000 fp->ptregs.format); 1001 else 1002 printk ("*** Exception %d *** FORMAT=%X\n", 1003 (fp->ptregs.vector) >> 2, 1004 fp->ptregs.format); 1005 if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) { 1006 unsigned short ssw = fp->un.fmtb.ssw; 1007 1008 printk ("SSW=%#06x ", ssw); 1009 1010 if (ssw & RC) 1011 printk ("Pipe stage C instruction fault at %#010lx\n", 1012 (fp->ptregs.format) == 0xA ? 1013 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2); 1014 if (ssw & RB) 1015 printk ("Pipe stage B instruction fault at %#010lx\n", 1016 (fp->ptregs.format) == 0xA ? 1017 fp->ptregs.pc + 4 : fp->un.fmtb.baddr); 1018 if (ssw & DF) 1019 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 1020 ssw & RW ? "read" : "write", 1021 fp->un.fmtb.daddr, space_names[ssw & DFC], 1022 fp->ptregs.pc); 1023 } 1024 printk ("Current process id is %d\n", current->pid); 1025 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0); 1026} 1027 1028asmlinkage void trap_c(struct frame *fp) 1029{ 1030 int sig; 1031 siginfo_t info; 1032 1033 if (fp->ptregs.sr & PS_S) { 1034 if ((fp->ptregs.vector >> 2) == VEC_TRACE) { 1035 /* traced a trapping instruction */ 1036 current->ptrace |= PT_DTRACE; 1037 } else 1038 bad_super_trap(fp); 1039 return; 1040 } 1041 1042 /* send the appropriate signal to the user program */ 1043 switch ((fp->ptregs.vector) >> 2) { 1044 case VEC_ADDRERR: 1045 info.si_code = BUS_ADRALN; 1046 sig = SIGBUS; 1047 break; 1048 case VEC_ILLEGAL: 1049 case VEC_LINE10: 1050 case VEC_LINE11: 1051 info.si_code = ILL_ILLOPC; 1052 sig = SIGILL; 1053 break; 1054 case VEC_PRIV: 1055 info.si_code = ILL_PRVOPC; 1056 sig = SIGILL; 1057 break; 1058 case VEC_COPROC: 1059 info.si_code = ILL_COPROC; 1060 sig = SIGILL; 1061 break; 1062 case VEC_TRAP1: 1063 case VEC_TRAP2: 1064 case VEC_TRAP3: 1065 case VEC_TRAP4: 1066 case VEC_TRAP5: 1067 case VEC_TRAP6: 1068 case VEC_TRAP7: 1069 case VEC_TRAP8: 1070 case VEC_TRAP9: 1071 case VEC_TRAP10: 1072 case VEC_TRAP11: 1073 case VEC_TRAP12: 1074 case VEC_TRAP13: 1075 case VEC_TRAP14: 1076 info.si_code = ILL_ILLTRP; 1077 sig = SIGILL; 1078 break; 1079 case VEC_FPBRUC: 1080 case VEC_FPOE: 1081 case VEC_FPNAN: 1082 info.si_code = FPE_FLTINV; 1083 sig = SIGFPE; 1084 break; 1085 case VEC_FPIR: 1086 info.si_code = FPE_FLTRES; 1087 sig = SIGFPE; 1088 break; 1089 case VEC_FPDIVZ: 1090 info.si_code = FPE_FLTDIV; 1091 sig = SIGFPE; 1092 break; 1093 case VEC_FPUNDER: 1094 info.si_code = FPE_FLTUND; 1095 sig = SIGFPE; 1096 break; 1097 case VEC_FPOVER: 1098 info.si_code = FPE_FLTOVF; 1099 sig = SIGFPE; 1100 break; 1101 case VEC_ZERODIV: 1102 info.si_code = FPE_INTDIV; 1103 sig = SIGFPE; 1104 break; 1105 case VEC_CHK: 1106 case VEC_TRAP: 1107 info.si_code = FPE_INTOVF; 1108 sig = SIGFPE; 1109 break; 1110 case VEC_TRACE: /* ptrace single step */ 1111 info.si_code = TRAP_TRACE; 1112 sig = SIGTRAP; 1113 break; 1114 case VEC_TRAP15: /* breakpoint */ 1115 info.si_code = TRAP_BRKPT; 1116 sig = SIGTRAP; 1117 break; 1118 default: 1119 info.si_code = ILL_ILLOPC; 1120 sig = SIGILL; 1121 break; 1122 } 1123 info.si_signo = sig; 1124 info.si_errno = 0; 1125 switch (fp->ptregs.format) { 1126 default: 1127 info.si_addr = (void *) fp->ptregs.pc; 1128 break; 1129 case 2: 1130 info.si_addr = (void *) fp->un.fmt2.iaddr; 1131 break; 1132 case 7: 1133 info.si_addr = (void *) fp->un.fmt7.effaddr; 1134 break; 1135 case 9: 1136 info.si_addr = (void *) fp->un.fmt9.iaddr; 1137 break; 1138 case 10: 1139 info.si_addr = (void *) fp->un.fmta.daddr; 1140 break; 1141 case 11: 1142 info.si_addr = (void *) fp->un.fmtb.daddr; 1143 break; 1144 } 1145 force_sig_info (sig, &info, current); 1146} 1147 1148void die_if_kernel (char *str, struct pt_regs *fp, int nr) 1149{ 1150 if (!(fp->sr & PS_S)) 1151 return; 1152 1153 console_verbose(); 1154 printk("%s: %08x\n",str,nr); 1155 show_registers(fp); 1156 do_exit(SIGSEGV); 1157} 1158 1159/* 1160 * This function is called if an error occur while accessing 1161 * user-space from the fpsp040 code. 1162 */ 1163asmlinkage void fpsp040_die(void) 1164{ 1165 do_exit(SIGSEGV); 1166} 1167 1168#ifdef CONFIG_M68KFPU_EMU 1169asmlinkage void fpemu_signal(int signal, int code, void *addr) 1170{ 1171 siginfo_t info; 1172 1173 info.si_signo = signal; 1174 info.si_errno = 0; 1175 info.si_code = code; 1176 info.si_addr = addr; 1177 force_sig_info(signal, &info, current); 1178} 1179#endif 1180