1/*
2 * linux/arch/ia64/kernel/time.c
3 *
4 * Copyright (C) 1998-2003 Hewlett-Packard Co
5 *	Stephane Eranian <eranian@hpl.hp.com>
6 *	David Mosberger <davidm@hpl.hp.com>
7 * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
8 * Copyright (C) 1999-2000 VA Linux Systems
9 * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com>
10 */
11
12#include <linux/cpu.h>
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/profile.h>
17#include <linux/sched.h>
18#include <linux/time.h>
19#include <linux/interrupt.h>
20#include <linux/efi.h>
21#include <linux/timex.h>
22
23#include <asm/machvec.h>
24#include <asm/delay.h>
25#include <asm/hw_irq.h>
26#include <asm/ptrace.h>
27#include <asm/sal.h>
28#include <asm/sections.h>
29#include <asm/system.h>
30
31volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */
32
33#ifdef CONFIG_IA64_DEBUG_IRQ
34
35unsigned long last_cli_ip;
36EXPORT_SYMBOL(last_cli_ip);
37
38#endif
39
40static struct time_interpolator itc_interpolator = {
41	.shift = 16,
42	.mask = 0xffffffffffffffffLL,
43	.source = TIME_SOURCE_CPU
44};
45
46static irqreturn_t
47timer_interrupt (int irq, void *dev_id)
48{
49	unsigned long new_itm;
50
51	if (unlikely(cpu_is_offline(smp_processor_id()))) {
52		return IRQ_HANDLED;
53	}
54
55	platform_timer_interrupt(irq, dev_id);
56
57	new_itm = local_cpu_data->itm_next;
58
59	if (!time_after(ia64_get_itc(), new_itm))
60		printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n",
61		       ia64_get_itc(), new_itm);
62
63	profile_tick(CPU_PROFILING);
64
65	while (1) {
66		update_process_times(user_mode(get_irq_regs()));
67
68		new_itm += local_cpu_data->itm_delta;
69
70		if (smp_processor_id() == time_keeper_id) {
71			/*
72			 * Here we are in the timer irq handler. We have irqs locally
73			 * disabled, but we don't know if the timer_bh is running on
74			 * another CPU. We need to avoid to SMP race by acquiring the
75			 * xtime_lock.
76			 */
77			write_seqlock(&xtime_lock);
78			do_timer(1);
79			local_cpu_data->itm_next = new_itm;
80			write_sequnlock(&xtime_lock);
81		} else
82			local_cpu_data->itm_next = new_itm;
83
84		if (time_after(new_itm, ia64_get_itc()))
85			break;
86
87		/*
88		 * Allow IPIs to interrupt the timer loop.
89		 */
90		local_irq_enable();
91		local_irq_disable();
92	}
93
94	do {
95		/*
96		 * If we're too close to the next clock tick for
97		 * comfort, we increase the safety margin by
98		 * intentionally dropping the next tick(s).  We do NOT
99		 * update itm.next because that would force us to call
100		 * do_timer() which in turn would let our clock run
101		 * too fast (with the potentially devastating effect
102		 * of losing monotony of time).
103		 */
104		while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2))
105			new_itm += local_cpu_data->itm_delta;
106		ia64_set_itm(new_itm);
107		/* double check, in case we got hit by a (slow) PMI: */
108	} while (time_after_eq(ia64_get_itc(), new_itm));
109	return IRQ_HANDLED;
110}
111
112/*
113 * Encapsulate access to the itm structure for SMP.
114 */
115void
116ia64_cpu_local_tick (void)
117{
118	int cpu = smp_processor_id();
119	unsigned long shift = 0, delta;
120
121	/* arrange for the cycle counter to generate a timer interrupt: */
122	ia64_set_itv(IA64_TIMER_VECTOR);
123
124	delta = local_cpu_data->itm_delta;
125	/*
126	 * Stagger the timer tick for each CPU so they don't occur all at (almost) the
127	 * same time:
128	 */
129	if (cpu) {
130		unsigned long hi = 1UL << ia64_fls(cpu);
131		shift = (2*(cpu - hi) + 1) * delta/hi/2;
132	}
133	local_cpu_data->itm_next = ia64_get_itc() + delta + shift;
134	ia64_set_itm(local_cpu_data->itm_next);
135}
136
137static int nojitter;
138
139static int __init nojitter_setup(char *str)
140{
141	nojitter = 1;
142	printk("Jitter checking for ITC timers disabled\n");
143	return 1;
144}
145
146__setup("nojitter", nojitter_setup);
147
148
149void __devinit
150ia64_init_itm (void)
151{
152	unsigned long platform_base_freq, itc_freq;
153	struct pal_freq_ratio itc_ratio, proc_ratio;
154	long status, platform_base_drift, itc_drift;
155
156	/*
157	 * According to SAL v2.6, we need to use a SAL call to determine the platform base
158	 * frequency and then a PAL call to determine the frequency ratio between the ITC
159	 * and the base frequency.
160	 */
161	status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
162				    &platform_base_freq, &platform_base_drift);
163	if (status != 0) {
164		printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status));
165	} else {
166		status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio);
167		if (status != 0)
168			printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status);
169	}
170	if (status != 0) {
171		/* invent "random" values */
172		printk(KERN_ERR
173		       "SAL/PAL failed to obtain frequency info---inventing reasonable values\n");
174		platform_base_freq = 100000000;
175		platform_base_drift = -1;	/* no drift info */
176		itc_ratio.num = 3;
177		itc_ratio.den = 1;
178	}
179	if (platform_base_freq < 40000000) {
180		printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n",
181		       platform_base_freq);
182		platform_base_freq = 75000000;
183		platform_base_drift = -1;
184	}
185	if (!proc_ratio.den)
186		proc_ratio.den = 1;	/* avoid division by zero */
187	if (!itc_ratio.den)
188		itc_ratio.den = 1;	/* avoid division by zero */
189
190	itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den;
191
192	local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ;
193	printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, "
194	       "ITC freq=%lu.%03luMHz", smp_processor_id(),
195	       platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000,
196	       itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000);
197
198	if (platform_base_drift != -1) {
199		itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den;
200		printk("+/-%ldppm\n", itc_drift);
201	} else {
202		itc_drift = -1;
203		printk("\n");
204	}
205
206	local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den;
207	local_cpu_data->itc_freq = itc_freq;
208	local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC;
209	local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT)
210					+ itc_freq/2)/itc_freq;
211
212	if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
213		itc_interpolator.frequency = local_cpu_data->itc_freq;
214		itc_interpolator.drift = itc_drift;
215#ifdef CONFIG_SMP
216		/* On IA64 in an SMP configuration ITCs are never accurately synchronized.
217		 * Jitter compensation requires a cmpxchg which may limit
218		 * the scalability of the syscalls for retrieving time.
219		 * The ITC synchronization is usually successful to within a few
220		 * ITC ticks but this is not a sure thing. If you need to improve
221		 * timer performance in SMP situations then boot the kernel with the
222		 * "nojitter" option. However, doing so may result in time fluctuating (maybe
223		 * even going backward) if the ITC offsets between the individual CPUs
224		 * are too large.
225		 */
226		if (!nojitter) itc_interpolator.jitter = 1;
227#endif
228		register_time_interpolator(&itc_interpolator);
229	}
230
231	/* Setup the CPU local timer tick */
232	ia64_cpu_local_tick();
233}
234
235static struct irqaction timer_irqaction = {
236	.handler =	timer_interrupt,
237	.flags =	IRQF_DISABLED | IRQF_IRQPOLL,
238	.name =		"timer"
239};
240
241void __devinit ia64_disable_timer(void)
242{
243	ia64_set_itv(1 << 16);
244}
245
246void __init
247time_init (void)
248{
249	register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction);
250	efi_gettimeofday(&xtime);
251	ia64_init_itm();
252
253	/*
254	 * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the
255	 * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC).
256	 */
257	set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
258}
259
260/*
261 * Generic udelay assumes that if preemption is allowed and the thread
262 * migrates to another CPU, that the ITC values are synchronized across
263 * all CPUs.
264 */
265static void
266ia64_itc_udelay (unsigned long usecs)
267{
268	unsigned long start = ia64_get_itc();
269	unsigned long end = start + usecs*local_cpu_data->cyc_per_usec;
270
271	while (time_before(ia64_get_itc(), end))
272		cpu_relax();
273}
274
275void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay;
276
277void
278udelay (unsigned long usecs)
279{
280	(*ia64_udelay)(usecs);
281}
282EXPORT_SYMBOL(udelay);
283
284static unsigned long long ia64_itc_printk_clock(void)
285{
286	if (ia64_get_kr(IA64_KR_PER_CPU_DATA))
287		return sched_clock();
288	return 0;
289}
290
291static unsigned long long ia64_default_printk_clock(void)
292{
293	return (unsigned long long)(jiffies_64 - INITIAL_JIFFIES) *
294		(1000000000/HZ);
295}
296
297unsigned long long (*ia64_printk_clock)(void) = &ia64_default_printk_clock;
298
299unsigned long long printk_clock(void)
300{
301	return ia64_printk_clock();
302}
303
304void __init
305ia64_setup_printk_clock(void)
306{
307	if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT))
308		ia64_printk_clock = ia64_itc_printk_clock;
309}
310