1/* irq-mb93091.c: MB93091 FPGA interrupt handling
2 *
3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/ptrace.h>
13#include <linux/errno.h>
14#include <linux/signal.h>
15#include <linux/sched.h>
16#include <linux/ioport.h>
17#include <linux/interrupt.h>
18#include <linux/init.h>
19#include <linux/irq.h>
20
21#include <asm/io.h>
22#include <asm/system.h>
23#include <asm/bitops.h>
24#include <asm/delay.h>
25#include <asm/irq.h>
26#include <asm/irc-regs.h>
27
28#define __reg16(ADDR) (*(volatile unsigned short *)(ADDR))
29
30#define __get_IMR()	({ __reg16(0xffc00004); })
31#define __set_IMR(M)	do { __reg16(0xffc00004) = (M); wmb(); } while(0)
32#define __get_IFR()	({ __reg16(0xffc0000c); })
33#define __clr_IFR(M)	do { __reg16(0xffc0000c) = ~(M); wmb(); } while(0)
34
35
36/*
37 * on-motherboard FPGA PIC operations
38 */
39static void frv_fpga_mask(unsigned int irq)
40{
41	uint16_t imr = __get_IMR();
42
43	imr |= 1 << (irq - IRQ_BASE_FPGA);
44
45	__set_IMR(imr);
46}
47
48static void frv_fpga_ack(unsigned int irq)
49{
50	__clr_IFR(1 << (irq - IRQ_BASE_FPGA));
51}
52
53static void frv_fpga_mask_ack(unsigned int irq)
54{
55	uint16_t imr = __get_IMR();
56
57	imr |= 1 << (irq - IRQ_BASE_FPGA);
58	__set_IMR(imr);
59
60	__clr_IFR(1 << (irq - IRQ_BASE_FPGA));
61}
62
63static void frv_fpga_unmask(unsigned int irq)
64{
65	uint16_t imr = __get_IMR();
66
67	imr &= ~(1 << (irq - IRQ_BASE_FPGA));
68
69	__set_IMR(imr);
70}
71
72static struct irq_chip frv_fpga_pic = {
73	.name		= "mb93091",
74	.ack		= frv_fpga_ack,
75	.mask		= frv_fpga_mask,
76	.mask_ack	= frv_fpga_mask_ack,
77	.unmask		= frv_fpga_unmask,
78};
79
80/*
81 * FPGA PIC interrupt handler
82 */
83static irqreturn_t fpga_interrupt(int irq, void *_mask)
84{
85	uint16_t imr, mask = (unsigned long) _mask;
86
87	imr = __get_IMR();
88	mask = mask & ~imr & __get_IFR();
89
90	/* poll all the triggered IRQs */
91	while (mask) {
92		int irq;
93
94		asm("scan %1,gr0,%0" : "=r"(irq) : "r"(mask));
95		irq = 31 - irq;
96		mask &= ~(1 << irq);
97
98		generic_handle_irq(IRQ_BASE_FPGA + irq);
99	}
100
101	return IRQ_HANDLED;
102}
103
104/*
105 * define an interrupt action for each FPGA PIC output
106 * - use dev_id to indicate the FPGA PIC input to output mappings
107 */
108static struct irqaction fpga_irq[4]  = {
109	[0] = {
110		.handler	= fpga_interrupt,
111		.flags		= IRQF_DISABLED | IRQF_SHARED,
112		.mask		= CPU_MASK_NONE,
113		.name		= "fpga.0",
114		.dev_id		= (void *) 0x0028UL,
115	},
116	[1] = {
117		.handler	= fpga_interrupt,
118		.flags		= IRQF_DISABLED | IRQF_SHARED,
119		.mask		= CPU_MASK_NONE,
120		.name		= "fpga.1",
121		.dev_id		= (void *) 0x0050UL,
122	},
123	[2] = {
124		.handler	= fpga_interrupt,
125		.flags		= IRQF_DISABLED | IRQF_SHARED,
126		.mask		= CPU_MASK_NONE,
127		.name		= "fpga.2",
128		.dev_id		= (void *) 0x1c00UL,
129	},
130	[3] = {
131		.handler	= fpga_interrupt,
132		.flags		= IRQF_DISABLED | IRQF_SHARED,
133		.mask		= CPU_MASK_NONE,
134		.name		= "fpga.3",
135		.dev_id		= (void *) 0x6386UL,
136	}
137};
138
139/*
140 * initialise the motherboard FPGA's PIC
141 */
142void __init fpga_init(void)
143{
144	int irq;
145
146	/* all PIC inputs are all set to be low-level driven, apart from the
147	 * NMI button (15) which is fixed at falling-edge
148	 */
149	__set_IMR(0x7ffe);
150	__clr_IFR(0x0000);
151
152	for (irq = IRQ_BASE_FPGA + 1; irq <= IRQ_BASE_FPGA + 14; irq++)
153		set_irq_chip_and_handler(irq, &frv_fpga_pic, handle_level_irq);
154
155	set_irq_chip_and_handler(IRQ_FPGA_NMI, &frv_fpga_pic, handle_edge_irq);
156
157	/* the FPGA drives the first four external IRQ inputs on the CPU PIC */
158	setup_irq(IRQ_CPU_EXTERNAL0, &fpga_irq[0]);
159	setup_irq(IRQ_CPU_EXTERNAL1, &fpga_irq[1]);
160	setup_irq(IRQ_CPU_EXTERNAL2, &fpga_irq[2]);
161	setup_irq(IRQ_CPU_EXTERNAL3, &fpga_irq[3]);
162}
163